From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 644903858D33 for ; Fri, 22 Dec 2023 08:19:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 644903858D33 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 644903858D33 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1703233187; cv=none; b=rV5Qg6u6IssTfjPo6v2+irBst5IraQQqCpyIlruzzJ3af2k43gpqgfazOrxaWj0UR68vURyxVfbcLj0DOqdskvXrlSMM+p/Zpv++UHQrXqWL4tBumtB3y9Xw1DbJ0BGPWVMmj+HJJcVZTW8YdCVDYe/M7pBsKKeVyD+yH3HmUd0= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1703233187; c=relaxed/simple; bh=qctFQ36PNJkFRxj40ANUXDAT5WUf5wZyprtjbcucyOA=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=pQiZzB9n+j2u7HkJxAyR9MziRUSah/AKGA4Xi1Ftu200R1vROgukleZnbkU16P7WVGMlLPQ0XQsw/g4CMQ5ZZxC/+PCJ/5R/XigRENUGRIIfW9eFTfQ6cibwZdbzDulw1qXyx0/jVi34SfI2TTlMrDd+MD+pcmq6NT5ADSjejyk= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.2.6.5]) by gateway (Coremail) with SMTP id _____8DxS+l+RoVl5csDAA--.19430S3; Fri, 22 Dec 2023 16:19:11 +0800 (CST) Received: from 5.5.5 (unknown [10.2.6.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxfb52RoVljFcFAA--.19449S4; Fri, 22 Dec 2023 16:19:05 +0800 (CST) From: Chenghui Pan To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, chenglulu@loongson.cn, xuchenghua@loongson.cn, Chenghui Pan Subject: [PATCH v1] LoongArch: Fix ICE when passing two same vector argument consecutively Date: Fri, 22 Dec 2023 16:18:44 +0800 Message-Id: <20231222081844.782313-1-panchenghui@loongson.cn> X-Mailer: git-send-email 2.39.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:AQAAf8Cxfb52RoVljFcFAA--.19449S4 X-CM-SenderInfo: psdquxxhqjx33l6o00pqjv00gofq/1tbiAQALBGWCTy4GLwAusP X-Coremail-Antispam: 1Uk129KBj93XoW3XFWrtw1DJw1UAF1xuFW8Xwc_yoW3XFW3pr Zru3Z3tr4kJr4vgryDA3y3Xr1DJry2gr12vFy3tryxCrsrWw1jvryFyr9IvFy5Ka15ury2 qr40v3W5WF15GagCm3ZEXasCq-sJn29KB7ZKAUJUUUU5529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkFb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1Y6r17McIj6I8E87Iv 67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6x kF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07jb_-PUUUUU= X-Spam-Status: No, score=-12.8 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Following code will cause ICE on LoongArch target: #include extern void bar (__m128i, __m128i); __m128i a; void foo () { bar (a, a); } It is caused by missing constraint definition in mov_lsx. This patch fixes the template and remove the unnecessary processing from loongarch_split_move () function. This patch also cleanup the redundant definition from loongarch_split_move () and loongarch_split_move_p (). gcc/ChangeLog: * config/loongarch/lasx.md: Use loongarch_split_move and loongarch_split_move_p directly. * config/loongarch/loongarch-protos.h (loongarch_split_move): Remove unnecessary argument. (loongarch_split_move_insn_p): Delete. (loongarch_split_move_insn): Delete. * config/loongarch/loongarch.cc (loongarch_split_move_insn_p): Delete. (loongarch_load_store_insns): Use loongarch_split_move_p directly. (loongarch_split_move): remove the unnecessary processing. (loongarch_split_move_insn): Delete. * config/loongarch/lsx.md: Use loongarch_split_move and loongarch_split_move_p directly. gcc/testsuite/ChangeLog: * gcc.target/loongarch/vector/lsx/lsx-mov-1.c: New test. --- gcc/config/loongarch/lasx.md | 4 +- gcc/config/loongarch/loongarch-protos.h | 4 +- gcc/config/loongarch/loongarch.cc | 49 +------------------ gcc/config/loongarch/lsx.md | 10 ++-- .../loongarch/vector/lsx/lsx-mov-1.c | 14 ++++++ 5 files changed, 24 insertions(+), 57 deletions(-) create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mov-1.c diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md index eeac8cd984b..6418ff52fe5 100644 --- a/gcc/config/loongarch/lasx.md +++ b/gcc/config/loongarch/lasx.md @@ -912,10 +912,10 @@ (define_split [(set (match_operand:LASX 0 "nonimmediate_operand") (match_operand:LASX 1 "move_operand"))] "reload_completed && ISA_HAS_LASX - && loongarch_split_move_insn_p (operands[0], operands[1])" + && loongarch_split_move_p (operands[0], operands[1])" [(const_int 0)] { - loongarch_split_move_insn (operands[0], operands[1], curr_insn); + loongarch_split_move (operands[0], operands[1]); DONE; }) diff --git a/gcc/config/loongarch/loongarch-protos.h b/gcc/config/loongarch/loongarch-protos.h index c66ab932d67..7bf21a45c69 100644 --- a/gcc/config/loongarch/loongarch-protos.h +++ b/gcc/config/loongarch/loongarch-protos.h @@ -82,11 +82,9 @@ extern rtx loongarch_legitimize_call_address (rtx); extern rtx loongarch_subword (rtx, bool); extern bool loongarch_split_move_p (rtx, rtx); -extern void loongarch_split_move (rtx, rtx, rtx); +extern void loongarch_split_move (rtx, rtx); extern bool loongarch_addu16i_imm12_operand_p (HOST_WIDE_INT, machine_mode); extern void loongarch_split_plus_constant (rtx *, machine_mode); -extern bool loongarch_split_move_insn_p (rtx, rtx); -extern void loongarch_split_move_insn (rtx, rtx, rtx); extern void loongarch_split_128bit_move (rtx, rtx); extern bool loongarch_split_128bit_move_p (rtx, rtx); extern void loongarch_split_256bit_move (rtx, rtx); diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index 390e3206a17..98709123770 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -2562,7 +2562,6 @@ loongarch_split_const_insns (rtx x) return low + high; } -bool loongarch_split_move_insn_p (rtx dest, rtx src); /* Return one word of 128-bit value OP, taking into account the fixed endianness of certain registers. BYTE selects from the byte address. */ @@ -2602,7 +2601,7 @@ loongarch_load_store_insns (rtx mem, rtx_insn *insn) { set = single_set (insn); if (set - && !loongarch_split_move_insn_p (SET_DEST (set), SET_SRC (set))) + && !loongarch_split_move_p (SET_DEST (set), SET_SRC (set))) might_split_p = false; } @@ -4220,7 +4219,7 @@ loongarch_split_move_p (rtx dest, rtx src) SPLIT_TYPE describes the split condition. */ void -loongarch_split_move (rtx dest, rtx src, rtx insn_) +loongarch_split_move (rtx dest, rtx src) { rtx low_dest; @@ -4258,33 +4257,6 @@ loongarch_split_move (rtx dest, rtx src, rtx insn_) loongarch_subword (src, true)); } } - - /* This is a hack. See if the next insn uses DEST and if so, see if we - can forward SRC for DEST. This is most useful if the next insn is a - simple store. */ - rtx_insn *insn = (rtx_insn *) insn_; - struct loongarch_address_info addr = {}; - if (insn) - { - rtx_insn *next = next_nonnote_nondebug_insn_bb (insn); - if (next) - { - rtx set = single_set (next); - if (set && SET_SRC (set) == dest) - { - if (MEM_P (src)) - { - rtx tmp = XEXP (src, 0); - loongarch_classify_address (&addr, tmp, GET_MODE (tmp), - true); - if (addr.reg && !reg_overlap_mentioned_p (dest, addr.reg)) - validate_change (next, &SET_SRC (set), src, false); - } - else - validate_change (next, &SET_SRC (set), src, false); - } - } - } } /* Check if adding an integer constant value for a specific mode can be @@ -4331,23 +4303,6 @@ loongarch_split_plus_constant (rtx *op, machine_mode mode) op[2] = gen_int_mode (v, mode); } -/* Return true if a move from SRC to DEST in INSN should be split. */ - -bool -loongarch_split_move_insn_p (rtx dest, rtx src) -{ - return loongarch_split_move_p (dest, src); -} - -/* Split a move from SRC to DEST in INSN, given that - loongarch_split_move_insn_p holds. */ - -void -loongarch_split_move_insn (rtx dest, rtx src, rtx insn) -{ - loongarch_split_move (dest, src, insn); -} - /* Implement TARGET_CONSTANT_ALIGNMENT. */ static HOST_WIDE_INT diff --git a/gcc/config/loongarch/lsx.md b/gcc/config/loongarch/lsx.md index dbdb423011b..bd32b7e9ad3 100644 --- a/gcc/config/loongarch/lsx.md +++ b/gcc/config/loongarch/lsx.md @@ -807,21 +807,21 @@ (define_expand "movmisalign" }) (define_insn "mov_lsx" - [(set (match_operand:LSX 0 "nonimmediate_operand" "=f,f,R,*r,*f") - (match_operand:LSX 1 "move_operand" "fYGYI,R,f,*f,*r"))] + [(set (match_operand:LSX 0 "nonimmediate_operand" "=f,f,R,*r,*f,*r") + (match_operand:LSX 1 "move_operand" "fYGYI,R,f,*f,*r,*r"))] "ISA_HAS_LSX" { return loongarch_output_move (operands[0], operands[1]); } - [(set_attr "type" "simd_move,simd_load,simd_store,simd_copy,simd_insert") + [(set_attr "type" "simd_move,simd_load,simd_store,simd_copy,simd_insert,simd_copy") (set_attr "mode" "")]) (define_split [(set (match_operand:LSX 0 "nonimmediate_operand") (match_operand:LSX 1 "move_operand"))] "reload_completed && ISA_HAS_LSX - && loongarch_split_move_insn_p (operands[0], operands[1])" + && loongarch_split_move_p (operands[0], operands[1])" [(const_int 0)] { - loongarch_split_move_insn (operands[0], operands[1], curr_insn); + loongarch_split_move (operands[0], operands[1]); DONE; }) diff --git a/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mov-1.c b/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mov-1.c new file mode 100644 index 00000000000..7f9d792eb79 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mov-1.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-mlsx -O2" } */ + +#include + +extern void bar (__m128i, __m128i); + +__m128i a; + +void +foo () +{ + bar (a, a); +} -- 2.39.3