From: Yang Yujie <yangyujie@loongson.cn>
To: gcc-patches@gcc.gnu.org
Cc: xry111@xry111.site, chenglulu@loongson.cn,
xuchenghua@loongson.cn, Yang Yujie <yangyujie@loongson.cn>
Subject: [PATCH v2 3/4] LoongArch: Use enums for constants
Date: Mon, 8 Jan 2024 09:14:09 +0800 [thread overview]
Message-ID: <20240108011410.305003-4-yangyujie@loongson.cn> (raw)
In-Reply-To: <20240108011410.305003-1-yangyujie@loongson.cn>
Target features constants from loongarch-def.h are currently defined as macros.
Switch to enums for better look in the debugger.
gcc/ChangeLog:
* config/loongarch/loongarch-def.h: Define constants with
enums instead of Macros.
---
gcc/config/loongarch/loongarch-def.h | 115 ++++++++++++++++-----------
1 file changed, 67 insertions(+), 48 deletions(-)
diff --git a/gcc/config/loongarch/loongarch-def.h b/gcc/config/loongarch/loongarch-def.h
index f8cb3adf509..a1237ecf1fd 100644
--- a/gcc/config/loongarch/loongarch-def.h
+++ b/gcc/config/loongarch/loongarch-def.h
@@ -23,12 +23,10 @@ along with GCC; see the file COPYING3. If not see
- ISA extensions (isa_ext),
- base ABI types (abi_base),
- ABI extension types (abi_ext).
-
- - code models (cmodel)
- - other command-line switches (switch)
+ - code models (cmodel)
These values are primarily used for implementing option handling
- logic in "loongarch.opt", "loongarch-driver.c" and "loongarch-opt.c".
+ logic in "loongarch.opt", "loongarch-driver.cc" and "loongarch-opt.cc".
As for the result of this option handling process, the following
scheme is adopted to represent the final configuration:
@@ -53,30 +51,40 @@ along with GCC; see the file COPYING3. If not see
#include "loongarch-def-array.h"
#include "loongarch-tune.h"
-/* enum isa_base */
-/* LoongArch64 */
-#define ISA_BASE_LA64 0
-#define N_ISA_BASE_TYPES 1
+/* ISA base */
+enum {
+ ISA_BASE_LA64 = 0, /* LoongArch64 */
+ N_ISA_BASE_TYPES = 1
+};
+
extern loongarch_def_array<const char *, N_ISA_BASE_TYPES>
loongarch_isa_base_strings;
-/* enum isa_ext_* */
-#define ISA_EXT_NONE 0
-#define ISA_EXT_FPU32 1
-#define ISA_EXT_FPU64 2
-#define N_ISA_EXT_FPU_TYPES 3
-#define ISA_EXT_SIMD_LSX 3
-#define ISA_EXT_SIMD_LASX 4
-#define N_ISA_EXT_TYPES 5
+
+/* ISA extensions */
+enum {
+ ISA_EXT_NONE = 0,
+ ISA_EXT_FPU32 = 1,
+ ISA_EXT_FPU64 = 2,
+ N_ISA_EXT_FPU_TYPES = 3,
+ ISA_EXT_SIMD_LSX = 3,
+ ISA_EXT_SIMD_LASX = 4,
+ N_ISA_EXT_TYPES = 5
+};
+
extern loongarch_def_array<const char *, N_ISA_EXT_TYPES>
loongarch_isa_ext_strings;
-/* enum abi_base */
-#define ABI_BASE_LP64D 0
-#define ABI_BASE_LP64F 1
-#define ABI_BASE_LP64S 2
-#define N_ABI_BASE_TYPES 3
+
+/* Base ABI */
+enum {
+ ABI_BASE_LP64D = 0,
+ ABI_BASE_LP64F = 1,
+ ABI_BASE_LP64S = 2,
+ N_ABI_BASE_TYPES = 3
+};
+
extern loongarch_def_array<const char *, N_ABI_BASE_TYPES>
loongarch_abi_base_strings;
@@ -90,28 +98,38 @@ extern loongarch_def_array<const char *, N_ABI_BASE_TYPES>
(abi_base == ABI_BASE_LP64S)
-/* enum abi_ext */
-#define ABI_EXT_BASE 0
-#define N_ABI_EXT_TYPES 1
+/* ABI Extension */
+enum {
+ ABI_EXT_BASE = 0,
+ N_ABI_EXT_TYPES = 1
+};
+
extern loongarch_def_array<const char *, N_ABI_EXT_TYPES>
loongarch_abi_ext_strings;
-/* enum cmodel */
-#define CMODEL_NORMAL 0
-#define CMODEL_TINY 1
-#define CMODEL_TINY_STATIC 2
-#define CMODEL_MEDIUM 3
-#define CMODEL_LARGE 4
-#define CMODEL_EXTREME 5
-#define N_CMODEL_TYPES 6
+
+/* Code Model */
+enum {
+ CMODEL_NORMAL = 0,
+ CMODEL_TINY = 1,
+ CMODEL_TINY_STATIC = 2,
+ CMODEL_MEDIUM = 3,
+ CMODEL_LARGE = 4,
+ CMODEL_EXTREME = 5,
+ N_CMODEL_TYPES = 6
+};
+
extern loongarch_def_array<const char *, N_CMODEL_TYPES>
loongarch_cmodel_strings;
-/* enum explicit_relocs */
-#define EXPLICIT_RELOCS_AUTO 0
-#define EXPLICIT_RELOCS_NONE 1
-#define EXPLICIT_RELOCS_ALWAYS 2
-#define N_EXPLICIT_RELOCS_TYPES 3
+
+/* Explicit Reloc Type */
+enum {
+ EXPLICIT_RELOCS_AUTO = 0,
+ EXPLICIT_RELOCS_NONE = 1,
+ EXPLICIT_RELOCS_ALWAYS = 2,
+ N_EXPLICIT_RELOCS_TYPES = 3
+};
/* The common default value for variables whose assignments
are triggered by command-line options. */
@@ -159,17 +177,18 @@ struct loongarch_target
int cmodel; /* CMODEL_ */
};
-/* CPU properties. */
-/* index */
-#define CPU_NATIVE 0
-#define CPU_ABI_DEFAULT 1
-#define CPU_LOONGARCH64 2
-#define CPU_LA464 3
-#define CPU_LA664 4
-#define N_ARCH_TYPES 5
-#define N_TUNE_TYPES 5
-
-/* parallel tables. */
+/* CPU model */
+enum {
+ CPU_NATIVE = 0,
+ CPU_ABI_DEFAULT = 1,
+ CPU_LOONGARCH64 = 2,
+ CPU_LA464 = 3,
+ CPU_LA664 = 4,
+ N_ARCH_TYPES = 5,
+ N_TUNE_TYPES = 5
+};
+
+/* CPU model properties */
extern loongarch_def_array<const char *, N_ARCH_TYPES>
loongarch_cpu_strings;
extern loongarch_def_array<loongarch_isa, N_ARCH_TYPES>
--
2.43.0
next prev parent reply other threads:[~2024-01-08 1:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-08 1:14 [PATCH v2 0/4] Adjust option handling code Yang Yujie
2024-01-08 1:14 ` [PATCH v2 1/4] LoongArch: Handle ISA evolution switches along with other options Yang Yujie
2024-01-08 1:14 ` [PATCH v2 2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64 Yang Yujie
2024-01-08 1:14 ` Yang Yujie [this message]
2024-01-08 1:14 ` [PATCH v2 4/4] LoongArch: Simplify -mexplicit-reloc definitions Yang Yujie
2024-01-10 3:57 ` Re:[pushed] [PATCH v2 0/4] Adjust option handling code chenglulu
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