From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id B8F9D3858D34 for ; Sun, 17 Mar 2024 02:02:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B8F9D3858D34 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org B8F9D3858D34 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1710640983; cv=none; b=DvaBMvq9AzE1MKLrJT/OvncIa5ghRXAUFCrGOGMgLqWwG9xRPLbG5TldY/rI9SDNbZRXMD2uW67uS5XpCKSyXf1XEQH47uZP1QrqluZ5EKmn08eYxAmHuZTR7qos/PAjrLrhF+3ZB/C0iddulhuL2RSjerMdp9TZEuqU25fhhAQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1710640983; c=relaxed/simple; bh=jKdY8XCe/l+zrxstOjEy2nHGKqXu2dVCmpdo5I9QxiU=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=ZzPYz2ObAcCw8Y82am/RSayudc7Wgxp0HLVO3LsmQDnf4FFw2BLvmBBVDUYac0tXPFWnHb7ydwaL6gnwPR+k3EiC+gdJhqH9ApCyguiKWEPFAI4gb5rc1XuS84wA/CEhtLlD28mL79BQEQ95LRVJeNF4y5/7IjHwt336Rg+rdv0= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.20.4.107]) by gateway (Coremail) with SMTP id _____8DxvutKT_ZlNQMaAA--.62181S3; Sun, 17 Mar 2024 10:02:50 +0800 (CST) Received: from loongson-pc.loongson.cn (unknown [10.20.4.107]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxZMxGT_Zlmt1bAA--.50893S2; Sun, 17 Mar 2024 10:02:48 +0800 (CST) From: Lulu Cheng To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn, chenglulu@loongson.cn Subject: [PATCH] LoongArch: gcc12: Implement option save/restore. Date: Sun, 17 Mar 2024 10:02:41 +0800 Message-Id: <20240317020242.22325-1-chenglulu@loongson.cn> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:AQAAf8CxZMxGT_Zlmt1bAA--.50893S2 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoWfJFWkuF4UJF1xWryrJw4rCrX_yoWkCr43pr 9rZw15tr48GFZagr1qqa98Xw15Aw1Igr4293WfXa18Aa15Xr1UZF1vvr9xXFy7uayrX342 qFn5K3WY9a1UAwcCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUyEb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVWUJVW8JwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ Jr0_Gr1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4 xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v2 6r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwI xGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480 Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIxAIcVC0I7 IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k2 6cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxV AFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU1CPfJUUUUU== X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: LTO option streaming and target attributes both require per-function target configuration, which is achieved via option save/restore. We implement TARGET_OPTION_{SAVE,RESTORE} to switch the la_target context in addition to other automatically maintained option states (via the "Save" option property in the .opt files). PR target/113233 gcc/ChangeLog: * config/loongarch/genopts/loongarch.opt.in: Mark options with the "Save" property. * config/loongarch/loongarch-opts.cc (loongarch_update_gcc_opt_status): Update the value of the la_target to global_options. * config/loongarch/loongarch-opts.h (loongarch_update_gcc_opt_status): Add a function declaration. * config/loongarch/loongarch.cc (loongarch_option_override_internal): Call the function loongarch_update_gcc_opt_status. (loongarch_option_save): New functions. (loongarch_option_restore): Likewise. (TARGET_OPTION_SAVE): Define macro. (TARGET_OPTION_RESTORE): Likewise. * config/loongarch/loongarch.opt: Regenerate. --- gcc/config/loongarch/genopts/loongarch.opt.in | 22 ++++++------ gcc/config/loongarch/loongarch-opts.cc | 22 ++++++++++++ gcc/config/loongarch/loongarch-opts.h | 6 ++++ gcc/config/loongarch/loongarch.cc | 34 +++++++++++++++++-- gcc/config/loongarch/loongarch.opt | 22 ++++++------ 5 files changed, 82 insertions(+), 24 deletions(-) diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in b/gcc/config/loongarch/genopts/loongarch.opt.in index 420a3941b3b..a3107cb2294 100644 --- a/gcc/config/loongarch/genopts/loongarch.opt.in +++ b/gcc/config/loongarch/genopts/loongarch.opt.in @@ -58,7 +58,7 @@ EnumValue Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64) m@@OPTSTR_ISA_EXT_FPU@@= -Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save -m@@OPTSTR_ISA_EXT_FPU@@=FPU Generate code for the given FPU. m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@ @@ -92,11 +92,11 @@ EnumValue Enum(cpu_type) String(@@STR_CPU_LA464@@) Value(CPU_LA464) m@@OPTSTR_ARCH@@= -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save -m@@OPTSTR_ARCH@@=PROCESSOR Generate code for the given PROCESSOR ISA. m@@OPTSTR_TUNE@@= -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save -m@@OPTSTR_TUNE@@=PROCESSOR Generate optimized code for PROCESSOR. @@ -127,31 +127,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN mbranch-cost= -Target RejectNegative Joined UInteger Var(loongarch_branch_cost) +Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save -mbranch-cost=COST Set the cost of branches to roughly COST instructions. mcheck-zero-division -Target Mask(CHECK_ZERO_DIV) +Target Mask(CHECK_ZERO_DIV) Save Trap on integer divide by zero. mcond-move-int -Target Var(TARGET_COND_MOVE_INT) Init(1) +Target Var(TARGET_COND_MOVE_INT) Init(1) Save Conditional moves for integral are enabled. mcond-move-float -Target Var(TARGET_COND_MOVE_FLOAT) Init(1) +Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save Conditional moves for float are enabled. mmemcpy -Target Mask(MEMCPY) +Target Mask(MEMCPY) Save Prevent optimizing block moves, which is also the default behavior of -Os. mstrict-align -Target Var(TARGET_STRICT_ALIGN) Init(0) +Target Var(TARGET_STRICT_ALIGN) Init(0) Save Do not generate unaligned memory accesses. mmax-inline-memcpy-size= -Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) +Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save -mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024. ; The code model option names for -mcmodel. @@ -175,7 +175,7 @@ EnumValue Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME) mcmodel= -Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) +Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save Specify the code model. mrelax diff --git a/gcc/config/loongarch/loongarch-opts.cc b/gcc/config/loongarch/loongarch-opts.cc index eb9c2a52f9e..b55baeccd2f 100644 --- a/gcc/config/loongarch/loongarch-opts.cc +++ b/gcc/config/loongarch/loongarch-opts.cc @@ -575,3 +575,25 @@ multilib_enabled_abi_list () return XOBFINISH (&msg_obstack, const char *); } + +/* option status feedback for "gcc --help=target -Q" */ +void +loongarch_update_gcc_opt_status (struct loongarch_target *target, + struct gcc_options *opts, + struct gcc_options *opts_set) +{ + (void) opts_set; + + /* status of -mabi */ + opts->x_la_opt_abi_base = target->abi.base; + + /* status of -march and -mtune */ + opts->x_la_opt_cpu_arch = target->cpu_arch; + opts->x_la_opt_cpu_tune = target->cpu_tune; + + /* status of -mcmodel */ + opts->x_la_opt_cmodel = target->cmodel; + + /* status of -mfpu */ + opts->x_la_opt_fpu = target->isa.fpu; +} diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h index b4115dd7f85..0557fff630d 100644 --- a/gcc/config/loongarch/loongarch-opts.h +++ b/gcc/config/loongarch/loongarch-opts.h @@ -39,6 +39,12 @@ loongarch_config_target (struct loongarch_target *target, int opt_arch, int opt_tune, int opt_fpu, int opt_abi_base, int opt_abi_ext, int opt_cmodel, int follow_multilib_list); + +/* option status feedback for "gcc --help=target -Q" */ +void +loongarch_update_gcc_opt_status (struct loongarch_target *target, + struct gcc_options *opts, + struct gcc_options *opts_set); #endif diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index 41819eba3d5..33b1919e7a3 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -5502,7 +5502,8 @@ loongarch_init_machine_status (void) } static void -loongarch_option_override_internal (struct gcc_options *opts) +loongarch_option_override_internal (struct gcc_options *opts, + struct gcc_options *opts_set) { int i, regno, mode; @@ -5514,6 +5515,8 @@ loongarch_option_override_internal (struct gcc_options *opts) la_opt_cpu_arch, la_opt_cpu_tune, la_opt_fpu, la_opt_abi_base, la_opt_abi_ext, la_opt_cmodel, 0); + loongarch_update_gcc_opt_status (&la_target, opts, opts_set); + if (TARGET_ABI_LP64) flag_pcc_struct_return = 0; @@ -5576,7 +5579,30 @@ loongarch_option_override_internal (struct gcc_options *opts) static void loongarch_option_override (void) { - loongarch_option_override_internal (&global_options); + loongarch_option_override_internal (&global_options, &global_options_set); +} + +/* Implement TARGET_OPTION_SAVE. */ +static void +loongarch_option_save (struct cl_target_option *, + struct gcc_options *opts, + struct gcc_options *opts_set) +{ + loongarch_update_gcc_opt_status (&la_target, opts, opts_set); +} + +/* Implement TARGET_OPTION_RESTORE. */ +static void +loongarch_option_restore (struct gcc_options *, + struct gcc_options *, + struct cl_target_option *ptr) +{ + la_target.cpu_arch = ptr->x_la_opt_cpu_arch; + la_target.cpu_tune = ptr->x_la_opt_cpu_tune; + + la_target.isa.fpu = ptr->x_la_opt_fpu; + + la_target.cmodel = ptr->x_la_opt_cmodel; } /* Implement TARGET_CONDITIONAL_REGISTER_USAGE. */ @@ -5798,6 +5824,10 @@ loongarch_starting_frame_offset (void) #undef TARGET_OPTION_OVERRIDE #define TARGET_OPTION_OVERRIDE loongarch_option_override +#define TARGET_OPTION_SAVE loongarch_option_save +#undef TARGET_OPTION_RESTORE +#define TARGET_OPTION_RESTORE loongarch_option_restore + #undef TARGET_LEGITIMIZE_ADDRESS #define TARGET_LEGITIMIZE_ADDRESS loongarch_legitimize_address diff --git a/gcc/config/loongarch/loongarch.opt b/gcc/config/loongarch/loongarch.opt index 3a39dcbd92e..7aef075c8c1 100644 --- a/gcc/config/loongarch/loongarch.opt +++ b/gcc/config/loongarch/loongarch.opt @@ -65,7 +65,7 @@ EnumValue Enum(isa_ext_fpu) String(64) Value(ISA_EXT_FPU64) mfpu= -Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save -mfpu=FPU Generate code for the given FPU. mfpu=0 @@ -99,11 +99,11 @@ EnumValue Enum(cpu_type) String(la464) Value(CPU_LA464) march= -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save -march=PROCESSOR Generate code for the given PROCESSOR ISA. mtune= -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save -mtune=PROCESSOR Generate optimized code for PROCESSOR. @@ -134,31 +134,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN mbranch-cost= -Target RejectNegative Joined UInteger Var(loongarch_branch_cost) +Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save -mbranch-cost=COST Set the cost of branches to roughly COST instructions. mcheck-zero-division -Target Mask(CHECK_ZERO_DIV) +Target Mask(CHECK_ZERO_DIV) Save Trap on integer divide by zero. mcond-move-int -Target Var(TARGET_COND_MOVE_INT) Init(1) +Target Var(TARGET_COND_MOVE_INT) Init(1) Save Conditional moves for integral are enabled. mcond-move-float -Target Var(TARGET_COND_MOVE_FLOAT) Init(1) +Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save Conditional moves for float are enabled. mmemcpy -Target Mask(MEMCPY) +Target Mask(MEMCPY) Save Prevent optimizing block moves, which is also the default behavior of -Os. mstrict-align -Target Var(TARGET_STRICT_ALIGN) Init(0) +Target Var(TARGET_STRICT_ALIGN) Init(0) Save Do not generate unaligned memory accesses. mmax-inline-memcpy-size= -Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) +Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save -mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024. ; The code model option names for -mcmodel. @@ -182,7 +182,7 @@ EnumValue Enum(cmodel) String(extreme) Value(CMODEL_EXTREME) mcmodel= -Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) +Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save Specify the code model. mrelax -- 2.39.3