From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) by sourceware.org (Postfix) with ESMTPS id E64F73858D33 for ; Tue, 26 Mar 2024 06:08:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E64F73858D33 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org E64F73858D33 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1711433294; cv=none; b=EmxZotN74CEPAh27PSxYBg9W9dq7uBTqRmOBPXXlHI8S/sJMy3kbwf026GFDai1bpwWJqArlRDPzfYw97Wuqfsjr89Bh2XYmOb3pH0x+YOHR6DfmWAsD/+Rs/1FrYan0o+GQmrLLhprutxrCZNlr+OFoNZeUR8Th2pZpasUy/Kc= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1711433294; c=relaxed/simple; bh=mD2WYMZaUUenn+iQx75M2q1BgT+E4ZrB21HkkJ07Xbc=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=gCk6Hr6ZNLUexbJOqGaAaw/H2dpGY6NhpTJ0HxNrlcXQgCF7ds2y44w/PhoI3kYi49M11SvVd8iIwlJ+1sCfmiuHSuKL0UGcWtJBgTzULuPk0dvDYZguUZfHumLlcKoBOzdnwWPI14DvJCdNl9YyGGPQ+na9m7Ic8UpUDT10ASg= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1711433287; x=1742969287; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mD2WYMZaUUenn+iQx75M2q1BgT+E4ZrB21HkkJ07Xbc=; b=kCrpdPSyRNWNLex6voPiS2OUmew7iWSh08meY8vUEfKj65V3dq7cv0lE Nhr5mkctFLVV6l8+ib14hp7u2vEXnP6/Yqn1Yt+HJH07s8cwhOlW7OBBH rZvJSS2TXZN+h07BhTpXtqVWjebRWcmNBE31j9DZbMzlK4n/0NLOEix00 p990cNkWZtNrpJYX0J09npHTMvP0a+ByKwfd2KYzhhlGf6mx1F69O3PDx 5WqQxm3qMQhcJFCXbMzy05968c394Cy2QSTRAFm9rRFRYD5cp7Cry9ZAN Kr9jEHIMtAbFVEX8TTmW6/zuFBgoKX1DzpvOKro+K1lgxT2M11ybQF1wr Q==; X-IronPort-AV: E=McAfee;i="6600,9927,11024"; a="6596579" X-IronPort-AV: E=Sophos;i="6.07,155,1708416000"; d="scan'208";a="6596579" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Mar 2024 23:08:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,155,1708416000"; d="scan'208";a="15826453" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmviesa007.fm.intel.com with ESMTP; 25 Mar 2024 23:08:03 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id C96311005678; Tue, 26 Mar 2024 14:08:02 +0800 (CST) From: liuhongt To: gcc-patches@gcc.gnu.org Cc: jakub@redhat.com Subject: [PATCH V2] sanitizer: [PR110027] Align asan_vec[0] to MAX (BIGGEST_ALIGNMENT / BITS_PER_UNIT, ASAN_RED_ZONE_SIZE) Date: Tue, 26 Mar 2024 14:08:02 +0800 Message-Id: <20240326060802.3443261-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > > So, try to add some other variable with larger size and smaller alignment > > to the frame (and make sure it isn't optimized away). > > > > alignb above is the alignment of the first partition's var, if > > align_frame_offset really needs to depend on the var alignment, it probably > > should be the maximum alignment of all the vars with alignment > > alignb * BITS_PER_UNIT <=3D MAX_SUPPORTED_STACK_ALIGNMENT > > In asan_emit_stack_protection, when it allocated fake stack, it assume bottom of stack is also aligned to alignb. And the place violated this is the first var partition. which is 32 bytes offsets, it should be BIGGEST_ALIGNMENT / BITS_PER_UNIT. So I think we need to use MAX (BIGGEST_ALIGNMENT / BITS_PER_UNIT, ASAN_RED_ZONE_SIZE) for the first var partition. Ok? gcc/ChangeLog: PR sanitizer/110027 * cfgexpand.cc (expand_stack_vars): Align frame offset to MAX (BIGGEST_ALIGNMENT / BITS_PER_UNIT, ASAN_RED_ZONE_SIZE). gcc/testsuite/ChangeLog: * g++.dg/asan/pr110027.C: New test. --- gcc/cfgexpand.cc | 3 ++- gcc/testsuite/g++.dg/asan/pr110027.C | 20 ++++++++++++++++++++ 2 files changed, 22 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/g++.dg/asan/pr110027.C diff --git a/gcc/cfgexpand.cc b/gcc/cfgexpand.cc index 0de299c62e3..70cc89b29f4 100644 --- a/gcc/cfgexpand.cc +++ b/gcc/cfgexpand.cc @@ -1214,7 +1214,8 @@ expand_stack_vars (bool (*pred) (size_t), class stack_vars_data *data) { if (data->asan_vec.is_empty ()) { - align_frame_offset (ASAN_RED_ZONE_SIZE); + align_frame_offset (MAX (BIGGEST_ALIGNMENT / BITS_PER_UNIT, + ASAN_RED_ZONE_SIZE)); prev_offset = frame_offset.to_constant (); } prev_offset = align_base (prev_offset, diff --git a/gcc/testsuite/g++.dg/asan/pr110027.C b/gcc/testsuite/g++.dg/asan/pr110027.C new file mode 100644 index 00000000000..0067781bc89 --- /dev/null +++ b/gcc/testsuite/g++.dg/asan/pr110027.C @@ -0,0 +1,20 @@ +/* PR sanitizer/110027 */ +/* { dg-do run } */ +/* { dg-require-effective-target avx512f_runtime } */ +/* { dg-options "-std=gnu++23 -mavx512f -fsanitize=address -O0 -g -fstack-protector-strong" } */ + +#include +#include + +template +using Vec [[gnu::vector_size(W * sizeof(T))]] = T; + +auto foo() { + Vec<8, int64_t> ret{}; + return ret; +} + +int main() { + foo(); + return 0; +} -- 2.31.1