From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166]) by sourceware.org (Postfix) with ESMTPS id A262C3858C41 for ; Sat, 11 May 2024 13:14:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A262C3858C41 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai ARC-Filter: OpenARC Filter v1.0.0 sourceware.org A262C3858C41 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=54.206.16.166 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1715433276; cv=none; b=QRcthNfM+VLzBpscQjuqLE4zcQzgxaKUfmz/sLHVLkCrewOOXxi1eVuLmhpBjeeHjnox8/PNreG/sdKn1t3/nZuABz8zFKT9QJY4ORuy8vG3It9ujdDVLUvKfempNLUChjVaPI6XBdTYBzZ6CYV2EF88cooTJyq0pF3Z9Sa2LVc= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1715433276; c=relaxed/simple; bh=t/Bt4xISfFVUJ1DeJoH/e5pOGBTVwVz+QV/lGMCakRY=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=xCM3jsQJze0EMwPwm6AQ6wsdVNY3VyVPo6CtY3a5BsscL178tZsi6Xuxwfdp/wLNwrFJe3kk7a0s8RqjtUqDEYkwAifkRyd1Lw/D6Dtvnrmbf062a60fUeAKGFHUkNvQ6+sY2ACU+pOKOKIQ4NI0DQ2MNTp0i6HLHuaJnaobMmA= ARC-Authentication-Results: i=1; server2.sourceware.org X-QQ-mid: bizesmtp87t1715433260tismjep2 X-QQ-Originating-IP: lgijQRaOvvE5qgtyMoW/J7wYHBuTuLVKVVuW24ady/o= Received: from rios-cad121.hadoop.rioslab.org ( [58.60.1.28]) by bizesmtp.qq.com (ESMTP) with id ; Sat, 11 May 2024 21:14:19 +0800 (CST) X-QQ-SSF: 01400000000000H0V000000A0000000 X-QQ-FEAT: 90EFqYDyPxC8Qq1yRwlDCwpYYfHYiYDXXufcGtRQxZsfeRK4Y0okqunmHdl/G 1bge599LMx0KkX43VHp+SwQpI2Mp8eYwV/FuZKL/5mIwdhcQXQC+PuKIb5U5eO7+PlCdNZ/ 9HvX0BpuX+DdkumpZMHavN8MevyvdUTeigm0xGPZ7YP+U/njxO/taxz0YfCuupqWuedED+Y Iiv/91f/DtXLupLygOO0BQx2bFv/ByE3fnLTnGpHmJWxPn68aSeZiFX2OVMbKxeIsbN0FRh LyfyJQ9Swhn6uUjIj0V1F6/fP1aH0m2vOzevNrgis16JRJ9ZZnUHJrYhdS56xf5D7Ba0Dn1 be6PFo9jRJPMrkEoDcP47sObokPZst18yJMfZ6vCGx8FANiXudfx9F2dOIj1Qu3J73RFRiV 1KC5HuvpQtIAkpscY8Nffg== X-QQ-GoodBg: 2 X-BIZMAIL-ID: 4905437119996741541 From: Juzhe-Zhong To: gcc-patches@gcc.gnu.org Cc: vmakarov@redhat.com, richard.sandiford@arm.com, jin.xia@rivai.ai, Juzhe-Zhong , Lehua Ding Subject: [SUBREG V3 1/4] DF: Add -ftrack-subreg-liveness option Date: Sat, 11 May 2024 21:14:10 +0800 Message-Id: <20240511131413.3394912-2-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 In-Reply-To: <20240511131413.3394912-1-juzhe.zhong@rivai.ai> References: <20240511131413.3394912-1-juzhe.zhong@rivai.ai> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-10.3 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,RCVD_IN_BARRACUDACENTRAL,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Add new flag -ftrack-subreg-liveness to enable track-subreg-liveness. This flag is enabled at -O3/fast. Co-authored-by: Lehua Ding gcc/ChangeLog: * common.opt: Add -ftrack-subreg-liveness option. * common.opt.urls: Ditto. * doc/invoke.texi: Ditto. * opts.cc: Ditto. --- gcc/common.opt | 4 ++++ gcc/common.opt.urls | 3 +++ gcc/doc/invoke.texi | 8 ++++++++ gcc/opts.cc | 1 + 4 files changed, 16 insertions(+) diff --git a/gcc/common.opt b/gcc/common.opt index 40cab3cb36a..5710e817abe 100644 --- a/gcc/common.opt +++ b/gcc/common.opt @@ -2163,6 +2163,10 @@ fira-share-spill-slots Common Var(flag_ira_share_spill_slots) Init(1) Optimization Share stack slots for spilled pseudo-registers. +ftrack-subreg-liveness +Common Var(flag_track_subreg_liveness) Init(0) Optimization +Track subreg liveness information. + fira-verbose= Common RejectNegative Joined UInteger Var(flag_ira_verbose) Init(5) -fira-verbose= Control IRA's level of diagnostic messages. diff --git a/gcc/common.opt.urls b/gcc/common.opt.urls index f71ed80a34b..59f27a6f7c6 100644 --- a/gcc/common.opt.urls +++ b/gcc/common.opt.urls @@ -880,6 +880,9 @@ UrlSuffix(gcc/Optimize-Options.html#index-fira-share-save-slots) fira-share-spill-slots UrlSuffix(gcc/Optimize-Options.html#index-fira-share-spill-slots) +ftrack-subreg-liveness +UrlSuffix(gcc/Optimize-Options.html#index-ftrack-subreg-liveness) + fira-verbose= UrlSuffix(gcc/Developer-Options.html#index-fira-verbose) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index ddcd5213f06..fbcde8aa745 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -13188,6 +13188,14 @@ Disable sharing of stack slots allocated for pseudo-registers. Each pseudo-register that does not get a hard register gets a separate stack slot, and as a result function stack frames are larger. +@opindex ftrack-subreg-liveness +@item -ftrack-subreg-liveness +Enable tracking subreg liveness information. This infomation allows IRA +and LRA to support subreg coalesce feature which can improve the quality +of register allocation. + +This option is enabled at level @option{-O3} for all targets. + @opindex flra-remat @item -flra-remat Enable CFG-sensitive rematerialization in LRA. Instead of loading diff --git a/gcc/opts.cc b/gcc/opts.cc index 3333600e0ea..50c0b62c5af 100644 --- a/gcc/opts.cc +++ b/gcc/opts.cc @@ -689,6 +689,7 @@ static const struct default_options default_options_table[] = { OPT_LEVELS_3_PLUS, OPT_funswitch_loops, NULL, 1 }, { OPT_LEVELS_3_PLUS, OPT_fvect_cost_model_, NULL, VECT_COST_MODEL_DYNAMIC }, { OPT_LEVELS_3_PLUS, OPT_fversion_loops_for_strides, NULL, 1 }, + { OPT_LEVELS_3_PLUS, OPT_ftrack_subreg_liveness, NULL, 1 }, /* -O3 parameters. */ { OPT_LEVELS_3_PLUS, OPT__param_max_inline_insns_auto_, NULL, 30 }, -- 2.36.3