From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) by sourceware.org (Postfix) with ESMTPS id 5A4953858D1E for ; Wed, 22 May 2024 01:57:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5A4953858D1E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 5A4953858D1E Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.14 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716343069; cv=none; b=vEKDdbQrfk0qmPGBBYWBdA8icNVHhqyupL0ttsliq9FFh26N9NbaaOZgxmk4Qm25vkIhnDmvf2L5mdYMukHyPQ3H0I4fNuUN/RGJvydUtaqwOAnLz/9PV/vlb3DEEqhNdbciyIcKRDIvFpQ4vTAGeX3TEJKXqQIvExIhIjFaBBs= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716343069; c=relaxed/simple; bh=oGW8jLhVtwuWDIcc7aaPBwmnUY14CAsjN2CidaTCQ0c=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=q83vNbEifRgNnEiAFDVE85vBMXpitPP8/n50gB/bcl84ZxsRRgC9yDjZdlrNj+ZWltzCYvXkQ38L1JD0izWZ/KXvzLRZUlVf09f07A/lzNQ99jH+nJoz155rXN06q0HCvY/hkKN2HQBjt40N50AlGQGFPkr6ZSKWlBfZe/okmcg= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716343068; x=1747879068; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=oGW8jLhVtwuWDIcc7aaPBwmnUY14CAsjN2CidaTCQ0c=; b=Tk7fqj47Hyc8AwKqEl5dqn8d8J1ebv+FdXGYd3DMp+FjclOUUyDAvqrq PC6zVqHdtBxPj8RPtvesQyzk96OS+7npwuDFt5QvCe5GbYkpMt7URSqhE v0WlVkKAr3abJZh9jwRp0u0sIgr+0tL0toqZ3ulHm65zfxhxEmj02GRTC +wKsxCLYz6Ihfl3Fg++OgG/L83u/fypR/O76rD8xtH1sv+UlzR2Molc/a lB6jzq2LRARRg4ETRAyXfY6UtI9g8iwSG5ndBhIjnEaIq92IaKgGXsowz F7lEZT5YexwDtzFObO67ZYLuec3WD3IK4K35Gt5FiX8DN7A3LVsvROpY0 A==; X-CSE-ConnectionGUID: AzTg/OL4S3+Hq1IErPhgYw== X-CSE-MsgGUID: Bcvpy1gqTQSmepJPCNboAQ== X-IronPort-AV: E=McAfee;i="6600,9927,11079"; a="16399329" X-IronPort-AV: E=Sophos;i="6.08,179,1712646000"; d="scan'208";a="16399329" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 May 2024 18:57:47 -0700 X-CSE-ConnectionGUID: wESoVANFTS6tKVpLvZiOfA== X-CSE-MsgGUID: ON8QuU8SQXy2Yjp0PEspaw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,179,1712646000"; d="scan'208";a="33651999" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orviesa008.jf.intel.com with ESMTP; 21 May 2024 18:57:45 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 90321100736B; Wed, 22 May 2024 09:57:43 +0800 (CST) From: liuhongt To: gcc-patches@gcc.gnu.org Cc: jakub@redhat.com, pinskia@gmail.com Subject: [PATCH] Don't simplify NAN/INF or out-of-range constant for FIX/UNSIGNED_FIX. Date: Wed, 22 May 2024 09:57:43 +0800 Message-Id: <20240522015743.275499-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: According to IEEE standard, for conversions from floating point to integer. When a NaN or infinite operand cannot be represented in the destination format and this cannot otherwise be indicated, the invalid operation exception shall be signaled. When a numeric operand would convert to an integer outside the range of the destination format, the invalid operation exception shall be signaled if this situation cannot otherwise be indicated. The patch prevent simplication of the conversion from floating point to integer for NAN/INF/out-of-range constant when flag_trapping_math. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,} Ok for trunk? gcc/ChangeLog: PR rtl-optimization/100927 PR rtl-optimization/115161 PR rtl-optimization/115115 * simplify-rtx.cc (simplify_const_unary_operation): Prevent simplication of FIX/UNSIGNED_FIX for NAN/INF/out-of-range constant when flag_trapping_math. gcc/testsuite/ChangeLog: * gcc.target/i386/pr100927.c: New test. --- gcc/simplify-rtx.cc | 23 ++++++++++++++++---- gcc/testsuite/gcc.target/i386/pr100927.c | 27 ++++++++++++++++++++++++ 2 files changed, 46 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr100927.c diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc index 53f54d1d392..b7a770dad60 100644 --- a/gcc/simplify-rtx.cc +++ b/gcc/simplify-rtx.cc @@ -2256,14 +2256,25 @@ simplify_const_unary_operation (enum rtx_code code, machine_mode mode, switch (code) { case FIX: + /* According to IEEE standard, for conversions from floating point to + integer. When a NaN or infinite operand cannot be represented in + the destination format and this cannot otherwise be indicated, the + invalid operation exception shall be signaled. When a numeric + operand would convert to an integer outside the range of the + destination format, the invalid operation exception shall be + signaled if this situation cannot otherwise be indicated. */ if (REAL_VALUE_ISNAN (*x)) - return const0_rtx; + return flag_trapping_math ? NULL_RTX : const0_rtx; + + if (REAL_VALUE_ISINF (*x) && flag_trapping_math) + return NULL_RTX; /* Test against the signed upper bound. */ wmax = wi::max_value (width, SIGNED); real_from_integer (&t, VOIDmode, wmax, SIGNED); if (real_less (&t, x)) - return immed_wide_int_const (wmax, mode); + return (flag_trapping_math + ? NULL_RTX : immed_wide_int_const (wmax, mode)); /* Test against the signed lower bound. */ wmin = wi::min_value (width, SIGNED); @@ -2276,13 +2287,17 @@ simplify_const_unary_operation (enum rtx_code code, machine_mode mode, case UNSIGNED_FIX: if (REAL_VALUE_ISNAN (*x) || REAL_VALUE_NEGATIVE (*x)) - return const0_rtx; + return flag_trapping_math ? NULL_RTX : const0_rtx; + + if (REAL_VALUE_ISINF (*x) && flag_trapping_math) + return NULL_RTX; /* Test against the unsigned upper bound. */ wmax = wi::max_value (width, UNSIGNED); real_from_integer (&t, VOIDmode, wmax, UNSIGNED); if (real_less (&t, x)) - return immed_wide_int_const (wmax, mode); + return (flag_trapping_math + ? NULL_RTX : immed_wide_int_const (wmax, mode)); return immed_wide_int_const (real_to_integer (x, &fail, width), mode); diff --git a/gcc/testsuite/gcc.target/i386/pr100927.c b/gcc/testsuite/gcc.target/i386/pr100927.c new file mode 100644 index 00000000000..b137396c30f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr100927.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-msse2 -O2 -ftrapping-math" } */ +/* { dg-final { scan-assembler-times "cvttps2dq" 3 } } */ + +#include + +__m128i foo_ofr() { + const __m128i iv = _mm_set_epi32(0x4f000000, 0x4f000000, 0x4f000000, 0x4f000000); + const __m128 fv = _mm_castsi128_ps(iv); + const __m128i riv = _mm_cvttps_epi32(fv); + return riv; +} + +__m128i foo_nan() { + const __m128i iv = _mm_set_epi32(0xff800001, 0xff800001, 0xff800001, 0xff800001); + const __m128 fv = _mm_castsi128_ps(iv); + const __m128i riv = _mm_cvttps_epi32(fv); + return riv; +} + +__m128i foo_inf() { + const __m128i iv = _mm_set_epi32(0xff800000, 0xff800000, 0xff800000, 0xff800000); + const __m128 fv = _mm_castsi128_ps(iv); + const __m128i riv = _mm_cvttps_epi32(fv); + return riv; +} + -- 2.31.1