From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) by sourceware.org (Postfix) with ESMTPS id 8D9753858C78 for ; Wed, 29 May 2024 03:13:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 8D9753858C78 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 8D9753858C78 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716952385; cv=none; b=MVhK4j4Lqd958MyUzDSd44dTgWv6OgV+QOAzpRncpLf56ATLgmG3x31K2w6v5YEGKKBBfbSsY30qvx561k2qJpPGbo9VLX1g9zE2l8jHaD7JOfPTBSbBK4+T6Q28B0z9jsNDxVWKlEegAaAgmXm9OID3m9cNwDRNPGzllYKkMcc= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716952385; c=relaxed/simple; bh=VAs+mn2uVmcnNW2RPdApq/brfSwuJd22r6pHBVxw8mM=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=jjO1kbAeaXsvG728NH24Ejp7igHrbD+UsPFnaM0D/uI7pGKjkJV7ia8o/MrKIvSCc3syOw9+COKuTxfTAzvzFy5iN+qOpF2ajVtwFwd2Vj9/7Q1DVNHkOziTHAqujsB+gu0EhJEBM2egjipWKKRfdI0ZvhPXSdcnwGNdu+PH3TY= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716952383; x=1748488383; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=VAs+mn2uVmcnNW2RPdApq/brfSwuJd22r6pHBVxw8mM=; b=VL1ErGgYU7+GZQEzoUcxIS2z1X0sPZ4X5dcOdMVsZkkjn5Cymdx8JrX6 i05K1D8UUojd5Gr1FWuRX7aUS7UlYQK0SyKdvO2IqrN4ssrmqWZJ19F3u 14NqmSVBlRfz4iDpHgh/eXxVHqGnZcfZtXJ3EQVNg3TMzA5bfZXW3xdUn h3rU6xfCK+D+/B99Kt66jfrGfisX/ouWuOt/lD18/udHuyeLvl6oWUUWJ YvzqVJ+Rzpgwj+viBlWXFganB3igPLUjGu5G2JwAjm+d9SCiE8DFpLNWz OVpPfYkubj8Mi5MQvTggOO6gQoNUQLaLu76nHnHwc1upuDkaf1nhrVeGg A==; X-CSE-ConnectionGUID: RP5oH73gQJOhwYcDo2te0g== X-CSE-MsgGUID: D/dWn7U+RJulJGvBgVT7Bg== X-IronPort-AV: E=McAfee;i="6600,9927,11085"; a="13279982" X-IronPort-AV: E=Sophos;i="6.08,197,1712646000"; d="scan'208";a="13279982" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2024 20:13:02 -0700 X-CSE-ConnectionGUID: pCsRMbNMRMuEZlUohWLDtg== X-CSE-MsgGUID: EGySltTuTsOnVNEHy3bGvg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,197,1712646000"; d="scan'208";a="40111558" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orviesa003.jf.intel.com with ESMTP; 28 May 2024 20:13:00 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id B77361007C04; Wed, 29 May 2024 11:12:58 +0800 (CST) From: liuhongt To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com Subject: [PATCH] [x86] Support vcond_mask_qiqi and friends. Date: Wed, 29 May 2024 11:10:58 +0800 Message-Id: <20240529031058.4109962-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ready push to trunk. gcc/ChangeLog: * config/i386/sse.md (vcond_mask_): New expander. gcc/testsuite/ChangeLog: * gcc.target/i386/pr114125.c: New test. --- gcc/config/i386/sse.md | 20 ++++++++++++++++++++ gcc/testsuite/gcc.target/i386/pr114125.c | 10 ++++++++++ 2 files changed, 30 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr114125.c diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 0f4fbcb2c5d..7cd912eeeb1 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -4807,6 +4807,26 @@ (define_expand "vcond_mask_" DONE; }) +(define_expand "vcond_mask_" + [(match_operand:SWI1248_AVX512BW 0 "register_operand") + (match_operand:SWI1248_AVX512BW 1 "register_operand") + (match_operand:SWI1248_AVX512BW 2 "register_operand") + (match_operand:SWI1248_AVX512BW 3 "register_operand")] + "TARGET_AVX512F" +{ + /* (operand[1] & operand[3]) | (operand[2] & ~operand[3]) */ + rtx op1 = gen_reg_rtx (mode); + rtx op2 = gen_reg_rtx (mode); + rtx op3 = gen_reg_rtx (mode); + + emit_insn (gen_and3 (op1, operands[1], operands[3])); + emit_insn (gen_one_cmpl2 (op3, operands[3])); + emit_insn (gen_and3 (op2, operands[2], op3)); + emit_insn (gen_ior3 (operands[0], op1, op2)); + + DONE; +}) + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Parallel floating point logical operations diff --git a/gcc/testsuite/gcc.target/i386/pr114125.c b/gcc/testsuite/gcc.target/i386/pr114125.c new file mode 100644 index 00000000000..e63fbffe965 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr114125.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=x86-64-v4 -fdump-tree-forwprop3-raw " } */ + +typedef long vec __attribute__((vector_size(16))); +vec f(vec x){ + vec y = x < 10; + return y & (y == 0); +} + +/* { dg-final { scan-tree-dump-not "_expr" "forwprop3" } } */ -- 2.31.1