From: Edwin Lu <ewlu@rivosinc.com>
To: gcc-patches@gcc.gnu.org
Cc: gnu-toolchain@rivosinc.com, Edwin Lu <ewlu@rivosinc.com>
Subject: [PATCH 0/2] Fix ICE with vwsll combine on 32bit targets
Date: Tue, 11 Jun 2024 15:25:30 -0700 [thread overview]
Message-ID: <20240611222532.2986116-1-ewlu@rivosinc.com> (raw)
The following testcases have been failing on rv32 targets since
r15-953-gaf4bf422a69:
FAIL: gcc.target/riscv/rvv/autovec/binop/vwsll-1.c (internal compiler error: in maybe_legitimize_operand, at optabs.cc:8056)
FAIL: gcc.target/riscv/rvv/autovec/binop/vwsll-1.c (test for excess errors)
Fix the bug and also robustify our emit_insn by making an assertion
check unconditional
I'm not sure if this ICE warrants its own separate testcase since it is
already being tested. I do have a minimal testcase on hand if we would
like to add one.
Edwin Lu (2):
RISC-V: Fix vwsll combine on rv32 targets
RISC-V: Move mode assertion out of conditional branch in emit_insn
gcc/config/riscv/autovec-opt.md | 1 +
gcc/config/riscv/riscv-v.cc | 10 +++++-----
2 files changed, 6 insertions(+), 5 deletions(-)
--
2.34.1
next reply other threads:[~2024-06-11 22:25 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-11 22:25 Edwin Lu [this message]
2024-06-11 22:25 ` [PATCH 1/2] RISC-V: Fix vwsll combine on rv32 targets Edwin Lu
2024-06-12 7:42 ` Robin Dapp
2024-06-12 20:19 ` Edwin Lu
2024-06-13 14:43 ` Robin Dapp
2024-06-11 22:25 ` [PATCH 2/2] RISC-V: Move mode assertion out of conditional branch in emit_insn Edwin Lu
2024-06-12 7:39 ` Robin Dapp
2024-06-12 20:25 ` Edwin Lu
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