From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by sourceware.org (Postfix) with ESMTPS id 450903858D26 for ; Sun, 16 Jun 2024 08:53:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 450903858D26 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 450903858D26 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::12f ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718527992; cv=none; b=GNWQDbzgOpM+w1gSWQdEsHV+K0fFuCfjbiqCjSuphX1vcvjSryLWx2BaGAiSQu++It1HHbIyboq0R2VPniBe0GMMtfDl1bcPR3y94p4aYJPZ83CmIzJyL02rVQXb7+KhVDpj9ZCFt4potM8/cZVXRsfYYNsxOeoPjHP/zBF671Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718527992; c=relaxed/simple; bh=waJb8aOWV7Iw9a2eLlEoPCIS/OvsGnquihEvxXXhiYU=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=no8pNd38QmkGYrOUrAHlEk+tuhgw83wHhc2mXl1SkcLIsiMoyeiQUO2Wp0YxMMN/IZ69WwYJzHgGSc6ZNLGlaRGiZo8XiZ2ew43Xu8kRLogSIj2l7PiLnwfBiD5RjBaTcdAii4z2wwm1ya1q04tjMX4v5QJG6w++n+DecVCYpAo= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-lf1-x12f.google.com with SMTP id 2adb3069b0e04-52c525257feso4431902e87.1 for ; Sun, 16 Jun 2024 01:53:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1718527988; x=1719132788; darn=gcc.gnu.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=6Vrn/RnfnK/XXZcSNC7eBWcl2zcClIOGknRAH5PcTMs=; b=gthdA/e9CZIyuGt/ALEegIZe/IFBwDUYE5MgZRWYhdLOhzyIN0hRYThLCwse/II4SE tvFn03Zs1f0e9+xIeTkv7xUHcbarFMMCpKZaFZUnu9X154hYjvUMt96s8N9E0Ni9PNwk AxbBdH1TJOn5Ejo2FojGGzoaKOnJXyvZ2vm52USd6WJdcph9Ess3wyUogIh5Q6vf2uO3 kszJnsqdnYvv+SB4wau9rOeyEd+lyDfxrjIjIA4i2c+ZZSop6jhMhZajvJwzTWa7cO+z xxGdIzLSHn6LsUEjL1noE7FzQZZL8hPhUBU+XxGMyzrgV38dOaQqxqU596y4MFXUjrsQ TA3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718527988; x=1719132788; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=6Vrn/RnfnK/XXZcSNC7eBWcl2zcClIOGknRAH5PcTMs=; b=Bne4DkSVh25ivmS6HVhAXoRodVBeXfPm225gTgy5KxB/8xW3n+YrmAXxKsGDd4JgPn jZL4GMUBgtKRHaS151nOND/lrZhlGPe/cPVN2r+LqbBtzMNuf4RM7JMWktBIY7nPwmhM zT6VrsQSdNRezduCvn/ZnNPA3Jcl7yRjaPBDS+XX9cGWyimT8T+eCT23AbGlI+cOiGcA hNqw2fVqvo1jQgIHS3B2Mub+7KmYjL8wEzlmX2EhgIKhmkVg43nitkm5xHdURhVP3L6T 5JC05a6aTH9y7K3VyLsAHUYVhweN59RQQ+0/5E1tFYFrwiaQuLqVmNPgg563AE1i+mMH Pb6A== X-Gm-Message-State: AOJu0Yx6zvtvdwKBUGiQiWgODYFJBNrElRLO4g0p1RuFTl3G3diXxQOD z/j5DCsEIOtk1EWtrgB7/SKi4aRTmu+Ll1Qp/u/UVNX4Ca0kXqQBFnPJ/Q== X-Google-Smtp-Source: AGHT+IHdqOM3g1d/bpOVgVjYUTe0rJ/6xwadbPxpn3KXbUMFM2ovtnHIaJp4z+5AmOgzmzFWSprBsw== X-Received: by 2002:ac2:4ed4:0:b0:52c:9421:2739 with SMTP id 2adb3069b0e04-52ca6e55de3mr3787621e87.9.1718527987633; Sun, 16 Jun 2024 01:53:07 -0700 (PDT) Received: from hp-envy-17.lan ([78.62.135.63]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52ca390b493sm890217e87.161.2024.06.16.01.53.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Jun 2024 01:53:07 -0700 (PDT) From: Siarhei Volkau To: gcc-patches@gcc.gnu.org Cc: Siarhei Volkau Subject: [RFC PATCH] ARM: thumb1: Use LDMIA/STMIA for DI/DF loads/stores Date: Sun, 16 Jun 2024 11:51:45 +0300 Message-ID: <20240616085145.751639-1-lis8215@gmail.com> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-10.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: If the address register is dead after load/store operation it looks beneficial to use LDMIA/STMIA instead of pair of LDR/STR instructions, at least if optimizing for size. E.g. ldr r0, [r3, #0] ldr r1, [r3, #4] @ r3 is dead after will be replaced by ldmia r3!, {r0, r1} also for reused reg is legal to: ldr r2, [r3, #0] ldr r3, [r3, #4] @ r3 reused will be replaced by ldmia r3, {r2, r3} However, I know little about other thumb CPUs except Cortex M0/M0+. 1. Is there any drawbacks if optimizing speed? 2. Might it be profitable for thumb2? Regarding code size with the patch gives for v6-m/nofp: libgcc: -52 bytes / -0.10% Newlib's libc: -68 bytes / -0.03% libm: -96 bytes / -0.10% libstdc++: -140 bytes / -0.02% Also I have questions regarding testing the patch. It's obscure how to do it properly, for now I compile for arm-none-eabi target and make check seems failing on any compilable test due to missing symbols from libnosys. I guess that arm-gnu-elf is the correct triple but it still advisable for proper commands to make & run the testsuite. Signed-off-by: Siarhei Volkau --- gcc/config/arm/arm-protos.h | 2 +- gcc/config/arm/arm.cc | 7 ++++++- gcc/config/arm/thumb1.md | 10 ++++++++-- 3 files changed, 15 insertions(+), 4 deletions(-) diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index 2cd560c9925..548bfbaccdc 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -254,7 +254,7 @@ extern int thumb_shiftable_const (unsigned HOST_WIDE_INT); extern enum arm_cond_code maybe_get_arm_condition_code (rtx); extern void thumb1_final_prescan_insn (rtx_insn *); extern void thumb2_final_prescan_insn (rtx_insn *); -extern const char *thumb_load_double_from_address (rtx *); +extern const char *thumb_load_double_from_address (rtx *, rtx_insn *); extern const char *thumb_output_move_mem_multiple (int, rtx *); extern const char *thumb_call_via_reg (rtx); extern void thumb_expand_cpymemqi (rtx *); diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index b8c32db0a1d..73c2478ed77 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -28350,7 +28350,7 @@ thumb1_output_interwork (void) a computed memory address. The computed address may involve a register which is overwritten by the load. */ const char * -thumb_load_double_from_address (rtx *operands) +thumb_load_double_from_address (rtx *operands, rtx_insn *insn) { rtx addr; rtx base; @@ -28368,6 +28368,11 @@ thumb_load_double_from_address (rtx *operands) switch (GET_CODE (addr)) { case REG: + if (find_reg_note (insn, REG_DEAD, addr)) + return "ldmia\t%m1!, {%0, %H0}"; + else if (REGNO (addr) == REGNO (operands[0]) + 1) + return "ldmia\t%m1, {%0, %H0}"; + operands[2] = adjust_address (operands[1], SImode, 4); if (REGNO (operands[0]) == REGNO (addr)) diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md index d7074b43f60..8da6887b560 100644 --- a/gcc/config/arm/thumb1.md +++ b/gcc/config/arm/thumb1.md @@ -637,8 +637,11 @@ case 5: return \"stmia\\t%0, {%1, %H1}\"; case 6: - return thumb_load_double_from_address (operands); + return thumb_load_double_from_address (operands, insn); case 7: + if (MEM_P (operands[0]) && REG_P (XEXP (operands[0], 0)) + && find_reg_note (insn, REG_DEAD, XEXP (operands[0], 0))) + return \"stmia\\t%m0!, {%1, %H1}\"; operands[2] = gen_rtx_MEM (SImode, plus_constant (Pmode, XEXP (operands[0], 0), 4)); output_asm_insn (\"str\\t%1, %0\;str\\t%H1, %2\", operands); @@ -970,8 +973,11 @@ case 2: return \"stmia\\t%0, {%1, %H1}\"; case 3: - return thumb_load_double_from_address (operands); + return thumb_load_double_from_address (operands, insn); case 4: + if (MEM_P (operands[0]) && REG_P (XEXP (operands[0], 0)) + && find_reg_note (insn, REG_DEAD, XEXP (operands[0], 0))) + return \"stmia\\t%m0!, {%1, %H1}\"; operands[2] = gen_rtx_MEM (SImode, plus_constant (Pmode, XEXP (operands[0], 0), 4)); -- 2.45.2