[PATCH V3 0/2] Fix ICE with vwsll combine on 32bit targets

[Edwin Lu <ewlu@rivosinc.com>]

The following testcases have been failing on rv32 targets since 
r15-953-gaf4bf422a69:
FAIL: gcc.target/riscv/rvv/autovec/binop/vwsll-1.c (internal compiler
error: in maybe_legitimize_operand, at optabs.cc:8056)
FAIL: gcc.target/riscv/rvv/autovec/binop/vwsll-1.c (test for excess
errors)

Fix the bug and also robustify our emit_insn by making an assertion
check unconditional

I'm not sure if this ICE warrants its own separate testcase since it is
already being tested. I do have a minimal testcase on hand if we would
like to add one.

V2: Remove subreg condition and change assert to internal error

V3: Update the _trunc_scalar splitter as well

Edwin Lu (2):
  RISC-V: Fix vwsll combine on rv32 targets
  RISC-V: Move mode assertion out of conditional branch in emit_insn

 gcc/config/riscv/autovec-opt.md |  6 ++----
 gcc/config/riscv/riscv-v.cc     | 25 +++++++++++++++++++------
 2 files changed, 21 insertions(+), 10 deletions(-)

-- 
2.34.1