* [PATCH 0/3] RISC-V: AMO testsuite cleanup
@ 2024-06-25 21:14 Patrick O'Neill
2024-06-25 21:14 ` [PATCH 1/3] RISC-V: Rename amo testcases Patrick O'Neill
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Patrick O'Neill @ 2024-06-25 21:14 UTC (permalink / raw)
To: gcc-patches
Cc: jeffreyalaw, kito.cheng, palmer, gnu-toolchain, Patrick O'Neill
This is another round of AMO testcase cleanup. Consolidates a lot of testcases
and unifies the testcase names.
Patrick O'Neill (3):
RISC-V: Rename amo testcases
RISC-V: Consolidate amo testcase variants
RISC-V: Update testcase comments to point to PSABI rather than Table
A.6
.../gcc.target/riscv/amo/a-rvwmo-fence.c | 56 +++++++++++++
...le-a-6-load-2.c => a-rvwmo-load-acquire.c} | 2 +-
...le-a-6-load-1.c => a-rvwmo-load-relaxed.c} | 2 +-
...le-a-6-load-3.c => a-rvwmo-load-seq-cst.c} | 2 +-
...pat-3.c => a-rvwmo-store-compat-seq-cst.c} | 3 +-
...-a-6-store-1.c => a-rvwmo-store-relaxed.c} | 2 +-
...-a-6-store-2.c => a-rvwmo-store-release.c} | 2 +-
.../gcc.target/riscv/amo/a-ztso-fence.c | 52 +++++++++++++
...le-ztso-load-2.c => a-ztso-load-acquire.c} | 2 +-
...le-ztso-load-1.c => a-ztso-load-relaxed.c} | 2 +-
...le-ztso-load-3.c => a-ztso-load-seq-cst.c} | 2 +-
...tore-3.c => a-ztso-store-compat-seq-cst.c} | 3 +-
...-ztso-store-1.c => a-ztso-store-relaxed.c} | 2 +-
...-ztso-store-2.c => a-ztso-store-release.c} | 2 +-
.../riscv/amo/amo-table-a-6-amo-add-1.c | 17 ----
.../riscv/amo/amo-table-a-6-amo-add-2.c | 17 ----
.../riscv/amo/amo-table-a-6-amo-add-3.c | 17 ----
.../riscv/amo/amo-table-a-6-amo-add-4.c | 17 ----
.../riscv/amo/amo-table-a-6-amo-add-5.c | 17 ----
.../riscv/amo/amo-table-a-6-fence-1.c | 15 ----
.../riscv/amo/amo-table-a-6-fence-2.c | 16 ----
.../riscv/amo/amo-table-a-6-fence-3.c | 16 ----
.../riscv/amo/amo-table-a-6-fence-4.c | 16 ----
.../riscv/amo/amo-table-a-6-fence-5.c | 16 ----
.../riscv/amo/amo-table-ztso-amo-add-1.c | 17 ----
.../riscv/amo/amo-table-ztso-amo-add-2.c | 17 ----
.../riscv/amo/amo-table-ztso-amo-add-3.c | 17 ----
.../riscv/amo/amo-table-ztso-amo-add-4.c | 17 ----
.../riscv/amo/amo-table-ztso-amo-add-5.c | 17 ----
.../riscv/amo/amo-table-ztso-fence-1.c | 15 ----
.../riscv/amo/amo-table-ztso-fence-2.c | 15 ----
.../riscv/amo/amo-table-ztso-fence-3.c | 15 ----
.../riscv/amo/amo-table-ztso-fence-4.c | 15 ----
.../riscv/amo/amo-table-ztso-fence-5.c | 16 ----
.../riscv/amo/amo-zalrsc-amo-add-1.c | 22 ------
.../riscv/amo/amo-zalrsc-amo-add-2.c | 22 ------
.../riscv/amo/amo-zalrsc-amo-add-3.c | 22 ------
.../riscv/amo/amo-zalrsc-amo-add-4.c | 22 ------
.../riscv/amo/amo-zalrsc-amo-add-5.c | 22 ------
...zalrsc.c => zaamo-preferred-over-zalrsc.c} | 0
.../riscv/amo/zaamo-rvwmo-amo-add-int.c | 57 ++++++++++++++
.../riscv/amo/zaamo-ztso-amo-add-int.c | 57 ++++++++++++++
.../riscv/amo/zalrsc-rvwmo-amo-add-int.c | 78 +++++++++++++++++++
...mo-compare-exchange-int-acquire-release.c} | 2 +-
...lrsc-rvwmo-compare-exchange-int-acquire.c} | 2 +-
...lrsc-rvwmo-compare-exchange-int-consume.c} | 2 +-
...lrsc-rvwmo-compare-exchange-int-relaxed.c} | 2 +-
...lrsc-rvwmo-compare-exchange-int-release.c} | 2 +-
...mo-compare-exchange-int-seq-cst-relaxed.c} | 3 +-
...lrsc-rvwmo-compare-exchange-int-seq-cst.c} | 2 +-
...lrsc-rvwmo-subword-amo-add-char-acq-rel.c} | 2 +-
...lrsc-rvwmo-subword-amo-add-char-acquire.c} | 2 +-
...lrsc-rvwmo-subword-amo-add-char-relaxed.c} | 2 +-
...lrsc-rvwmo-subword-amo-add-char-release.c} | 2 +-
...lrsc-rvwmo-subword-amo-add-char-seq-cst.c} | 2 +-
.../riscv/amo/zalrsc-ztso-amo-add-int.c | 78 +++++++++++++++++++
...so-compare-exchange-int-acquire-release.c} | 3 +-
...alrsc-ztso-compare-exchange-int-acquire.c} | 2 +-
...alrsc-ztso-compare-exchange-int-consume.c} | 2 +-
...alrsc-ztso-compare-exchange-int-relaxed.c} | 2 +-
...alrsc-ztso-compare-exchange-int-release.c} | 2 +-
...so-compare-exchange-int-seq-cst-relaxed.c} | 3 +-
...alrsc-ztso-compare-exchange-int-seq-cst.c} | 2 +-
...alrsc-ztso-subword-amo-add-char-acq-rel.c} | 2 +-
...alrsc-ztso-subword-amo-add-char-acquire.c} | 2 +-
...alrsc-ztso-subword-amo-add-char-relaxed.c} | 2 +-
...alrsc-ztso-subword-amo-add-char-release.c} | 2 +-
...alrsc-ztso-subword-amo-add-char-seq-cst.c} | 2 +-
68 files changed, 419 insertions(+), 471 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-fence.c
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-load-2.c => a-rvwmo-load-acquire.c} (94%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-load-1.c => a-rvwmo-load-relaxed.c} (94%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-load-3.c => a-rvwmo-load-seq-cst.c} (94%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-store-compat-3.c => a-rvwmo-store-compat-seq-cst.c} (93%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-store-1.c => a-rvwmo-store-relaxed.c} (94%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-store-2.c => a-rvwmo-store-release.c} (94%)
create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-ztso-fence.c
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-load-2.c => a-ztso-load-acquire.c} (94%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-load-1.c => a-ztso-load-relaxed.c} (94%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-load-3.c => a-ztso-load-seq-cst.c} (94%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-store-3.c => a-ztso-store-compat-seq-cst.c} (93%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-store-1.c => a-ztso-store-relaxed.c} (94%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-store-2.c => a-ztso-store-release.c} (94%)
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-1.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-2.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-3.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-4.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-5.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-1.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-2.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-3.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-4.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-5.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-1.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-2.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-3.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-4.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-5.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-1.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-2.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-3.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-4.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-5.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-1.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-2.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-3.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-4.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-5.c
rename gcc/testsuite/gcc.target/riscv/amo/{amo-zaamo-preferred-over-zalrsc.c => zaamo-preferred-over-zalrsc.c} (100%)
create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c
create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c
create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-6.c => zalrsc-rvwmo-compare-exchange-int-acquire-release.c} (81%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-3.c => zalrsc-rvwmo-compare-exchange-int-acquire.c} (79%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-2.c => zalrsc-rvwmo-compare-exchange-int-consume.c} (79%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-1.c => zalrsc-rvwmo-compare-exchange-int-relaxed.c} (79%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-4.c => zalrsc-rvwmo-compare-exchange-int-release.c} (79%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-7.c => zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c} (72%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-5.c => zalrsc-rvwmo-compare-exchange-int-seq-cst.c} (79%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-4.c => zalrsc-rvwmo-subword-amo-add-char-acq-rel.c} (77%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-2.c => zalrsc-rvwmo-subword-amo-add-char-acquire.c} (77%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-1.c => zalrsc-rvwmo-subword-amo-add-char-relaxed.c} (77%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-3.c => zalrsc-rvwmo-subword-amo-add-char-release.c} (77%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-5.c => zalrsc-rvwmo-subword-amo-add-char-seq-cst.c} (77%)
create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-6.c => zalrsc-ztso-compare-exchange-int-acquire-release.c} (72%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-3.c => zalrsc-ztso-compare-exchange-int-acquire.c} (79%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-2.c => zalrsc-ztso-compare-exchange-int-consume.c} (79%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-1.c => zalrsc-ztso-compare-exchange-int-relaxed.c} (79%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-4.c => zalrsc-ztso-compare-exchange-int-release.c} (79%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-7.c => zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c} (72%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-5.c => zalrsc-ztso-compare-exchange-int-seq-cst.c} (79%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-4.c => zalrsc-ztso-subword-amo-add-char-acq-rel.c} (77%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-2.c => zalrsc-ztso-subword-amo-add-char-acquire.c} (77%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-1.c => zalrsc-ztso-subword-amo-add-char-relaxed.c} (77%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-3.c => zalrsc-ztso-subword-amo-add-char-release.c} (77%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-5.c => zalrsc-ztso-subword-amo-add-char-seq-cst.c} (77%)
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/3] RISC-V: Rename amo testcases
2024-06-25 21:14 [PATCH 0/3] RISC-V: AMO testsuite cleanup Patrick O'Neill
@ 2024-06-25 21:14 ` Patrick O'Neill
2024-06-25 21:14 ` [PATCH 2/3] RISC-V: Consolidate amo testcase variants Patrick O'Neill
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Patrick O'Neill @ 2024-06-25 21:14 UTC (permalink / raw)
To: gcc-patches
Cc: jeffreyalaw, kito.cheng, palmer, gnu-toolchain, Patrick O'Neill
Rename riscv/amo/ testcases to follow a '{ext}-{model}-{name}-{memory order}.c'
naming convention.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/amo/amo-table-a-6-load-2.c: Move to...
* gcc.target/riscv/amo/a-rvwmo-load-acquire.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-load-1.c: Move to...
* gcc.target/riscv/amo/a-rvwmo-load-relaxed.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-load-3.c: Move to...
* gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c: Move to...
* gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-store-1.c: Move to...
* gcc.target/riscv/amo/a-rvwmo-store-relaxed.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-store-2.c: Move to...
* gcc.target/riscv/amo/a-rvwmo-store-release.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-load-2.c: Move to...
* gcc.target/riscv/amo/a-ztso-load-acquire.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-load-1.c: Move to...
* gcc.target/riscv/amo/a-ztso-load-relaxed.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-load-3.c: Move to...
* gcc.target/riscv/amo/a-ztso-load-seq-cst.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-store-3.c: Move to...
* gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-store-1.c: Move to...
* gcc.target/riscv/amo/a-ztso-store-relaxed.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-store-2.c: Move to...
* gcc.target/riscv/amo/a-ztso-store-release.c: ...here.
* gcc.target/riscv/amo/amo-zaamo-preferred-over-zalrsc.c: Move to...
* gcc.target/riscv/amo/zaamo-preferred-over-zalrsc.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-6.c: Move to...
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-3.c: Move to...
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-2.c: Move to...
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-1.c: Move to...
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-4.c: Move to...
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-7.c: Move to...
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-5.c: Move to...
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c: Move to...
* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c: Move to...
* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c: Move to...
* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c: Move to...
* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c: ...here.
* gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c: Move to...
* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-6.c: Move to...
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-3.c: Move to...
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-2.c: Move to...
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-1.c: Move to...
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-4.c: Move to...
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-7.c: Move to...
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-5.c: Move to...
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-4.c: Move to...
* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-2.c: Move to...
* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-1.c: Move to...
* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-3.c: Move to...
* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c: ...here.
* gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-5.c: Move to...
* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c: ...here.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
.../riscv/amo/{amo-table-a-6-load-2.c => a-rvwmo-load-acquire.c} | 0
.../riscv/amo/{amo-table-a-6-load-1.c => a-rvwmo-load-relaxed.c} | 0
.../riscv/amo/{amo-table-a-6-load-3.c => a-rvwmo-load-seq-cst.c} | 0
...-table-a-6-store-compat-3.c => a-rvwmo-store-compat-seq-cst.c} | 0
.../amo/{amo-table-a-6-store-1.c => a-rvwmo-store-relaxed.c} | 0
.../amo/{amo-table-a-6-store-2.c => a-rvwmo-store-release.c} | 0
.../riscv/amo/{amo-table-ztso-load-2.c => a-ztso-load-acquire.c} | 0
.../riscv/amo/{amo-table-ztso-load-1.c => a-ztso-load-relaxed.c} | 0
.../riscv/amo/{amo-table-ztso-load-3.c => a-ztso-load-seq-cst.c} | 0
.../{amo-table-ztso-store-3.c => a-ztso-store-compat-seq-cst.c} | 0
.../amo/{amo-table-ztso-store-1.c => a-ztso-store-relaxed.c} | 0
.../amo/{amo-table-ztso-store-2.c => a-ztso-store-release.c} | 0
...aamo-preferred-over-zalrsc.c => zaamo-preferred-over-zalrsc.c} | 0
...ge-6.c => zalrsc-rvwmo-compare-exchange-int-acquire-release.c} | 0
...e-exchange-3.c => zalrsc-rvwmo-compare-exchange-int-acquire.c} | 0
...e-exchange-2.c => zalrsc-rvwmo-compare-exchange-int-consume.c} | 0
...e-exchange-1.c => zalrsc-rvwmo-compare-exchange-int-relaxed.c} | 0
...e-exchange-4.c => zalrsc-rvwmo-compare-exchange-int-release.c} | 0
...ge-7.c => zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c} | 0
...e-exchange-5.c => zalrsc-rvwmo-compare-exchange-int-seq-cst.c} | 0
...rd-amo-add-4.c => zalrsc-rvwmo-subword-amo-add-char-acq-rel.c} | 0
...rd-amo-add-2.c => zalrsc-rvwmo-subword-amo-add-char-acquire.c} | 0
...rd-amo-add-1.c => zalrsc-rvwmo-subword-amo-add-char-relaxed.c} | 0
...rd-amo-add-3.c => zalrsc-rvwmo-subword-amo-add-char-release.c} | 0
...rd-amo-add-5.c => zalrsc-rvwmo-subword-amo-add-char-seq-cst.c} | 0
...nge-6.c => zalrsc-ztso-compare-exchange-int-acquire-release.c} | 0
...re-exchange-3.c => zalrsc-ztso-compare-exchange-int-acquire.c} | 0
...re-exchange-2.c => zalrsc-ztso-compare-exchange-int-consume.c} | 0
...re-exchange-1.c => zalrsc-ztso-compare-exchange-int-relaxed.c} | 0
...re-exchange-4.c => zalrsc-ztso-compare-exchange-int-release.c} | 0
...nge-7.c => zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c} | 0
...re-exchange-5.c => zalrsc-ztso-compare-exchange-int-seq-cst.c} | 0
...ord-amo-add-4.c => zalrsc-ztso-subword-amo-add-char-acq-rel.c} | 0
...ord-amo-add-2.c => zalrsc-ztso-subword-amo-add-char-acquire.c} | 0
...ord-amo-add-1.c => zalrsc-ztso-subword-amo-add-char-relaxed.c} | 0
...ord-amo-add-3.c => zalrsc-ztso-subword-amo-add-char-release.c} | 0
...ord-amo-add-5.c => zalrsc-ztso-subword-amo-add-char-seq-cst.c} | 0
37 files changed, 0 insertions(+), 0 deletions(-)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-load-2.c => a-rvwmo-load-acquire.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-load-1.c => a-rvwmo-load-relaxed.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-load-3.c => a-rvwmo-load-seq-cst.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-store-compat-3.c => a-rvwmo-store-compat-seq-cst.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-store-1.c => a-rvwmo-store-relaxed.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-store-2.c => a-rvwmo-store-release.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-load-2.c => a-ztso-load-acquire.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-load-1.c => a-ztso-load-relaxed.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-load-3.c => a-ztso-load-seq-cst.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-store-3.c => a-ztso-store-compat-seq-cst.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-store-1.c => a-ztso-store-relaxed.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-store-2.c => a-ztso-store-release.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-zaamo-preferred-over-zalrsc.c => zaamo-preferred-over-zalrsc.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-6.c => zalrsc-rvwmo-compare-exchange-int-acquire-release.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-3.c => zalrsc-rvwmo-compare-exchange-int-acquire.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-2.c => zalrsc-rvwmo-compare-exchange-int-consume.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-1.c => zalrsc-rvwmo-compare-exchange-int-relaxed.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-4.c => zalrsc-rvwmo-compare-exchange-int-release.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-7.c => zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-compare-exchange-5.c => zalrsc-rvwmo-compare-exchange-int-seq-cst.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-4.c => zalrsc-rvwmo-subword-amo-add-char-acq-rel.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-2.c => zalrsc-rvwmo-subword-amo-add-char-acquire.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-1.c => zalrsc-rvwmo-subword-amo-add-char-relaxed.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-3.c => zalrsc-rvwmo-subword-amo-add-char-release.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-a-6-subword-amo-add-5.c => zalrsc-rvwmo-subword-amo-add-char-seq-cst.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-6.c => zalrsc-ztso-compare-exchange-int-acquire-release.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-3.c => zalrsc-ztso-compare-exchange-int-acquire.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-2.c => zalrsc-ztso-compare-exchange-int-consume.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-1.c => zalrsc-ztso-compare-exchange-int-relaxed.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-4.c => zalrsc-ztso-compare-exchange-int-release.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-7.c => zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-compare-exchange-5.c => zalrsc-ztso-compare-exchange-int-seq-cst.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-4.c => zalrsc-ztso-subword-amo-add-char-acq-rel.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-2.c => zalrsc-ztso-subword-amo-add-char-acquire.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-1.c => zalrsc-ztso-subword-amo-add-char-relaxed.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-3.c => zalrsc-ztso-subword-amo-add-char-release.c} (100%)
rename gcc/testsuite/gcc.target/riscv/amo/{amo-table-ztso-subword-amo-add-5.c => zalrsc-ztso-subword-amo-add-char-seq-cst.c} (100%)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-2.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-acquire.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-2.c
rename to gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-acquire.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-1.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-relaxed.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-1.c
rename to gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-relaxed.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-3.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-3.c
rename to gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c
rename to gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-1.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-relaxed.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-1.c
rename to gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-relaxed.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-2.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-release.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-2.c
rename to gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-release.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-2.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-acquire.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-2.c
rename to gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-acquire.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-1.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-relaxed.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-1.c
rename to gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-relaxed.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-3.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-seq-cst.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-3.c
rename to gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-seq-cst.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-3.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-3.c
rename to gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-1.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-relaxed.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-1.c
rename to gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-relaxed.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-2.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-release.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-2.c
rename to gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-release.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-zaamo-preferred-over-zalrsc.c b/gcc/testsuite/gcc.target/riscv/amo/zaamo-preferred-over-zalrsc.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-zaamo-preferred-over-zalrsc.c
rename to gcc/testsuite/gcc.target/riscv/amo/zaamo-preferred-over-zalrsc.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-6.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-6.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-3.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-3.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-2.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-2.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-1.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-1.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-4.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-4.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-7.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-7.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-5.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-5.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-6.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-6.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-3.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-3.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-2.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-2.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-1.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-1.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-4.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-4.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-7.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-7.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-5.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-5.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-4.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-2.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-1.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-3.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c
similarity index 100%
rename from gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-5.c
rename to gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/3] RISC-V: Consolidate amo testcase variants
2024-06-25 21:14 [PATCH 0/3] RISC-V: AMO testsuite cleanup Patrick O'Neill
2024-06-25 21:14 ` [PATCH 1/3] RISC-V: Rename amo testcases Patrick O'Neill
@ 2024-06-25 21:14 ` Patrick O'Neill
2024-06-25 21:14 ` [PATCH 3/3] RISC-V: Update testcase comments to point to PSABI rather than Table A.6 Patrick O'Neill
2024-06-25 21:34 ` [PATCH 0/3] RISC-V: AMO testsuite cleanup Jeff Law
3 siblings, 0 replies; 6+ messages in thread
From: Patrick O'Neill @ 2024-06-25 21:14 UTC (permalink / raw)
To: gcc-patches
Cc: jeffreyalaw, kito.cheng, palmer, gnu-toolchain, Patrick O'Neill
Many riscv/amo/ testcases use check-function-bodies. These testcases can be
consolidated with related testcases (memory ordering variants) without affecting
the assertions.
Give functions descriptive names so testsuite failures are obvious from the
'FAIL:' line.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/amo/amo-table-a-6-amo-add-1.c: Removed.
* gcc.target/riscv/amo/amo-table-a-6-amo-add-2.c: Removed.
* gcc.target/riscv/amo/amo-table-a-6-amo-add-3.c: Removed.
* gcc.target/riscv/amo/amo-table-a-6-amo-add-4.c: Removed.
* gcc.target/riscv/amo/amo-table-a-6-amo-add-5.c: Removed.
* gcc.target/riscv/amo/amo-table-a-6-fence-1.c: Removed.
* gcc.target/riscv/amo/amo-table-a-6-fence-2.c: Removed.
* gcc.target/riscv/amo/amo-table-a-6-fence-3.c: Removed.
* gcc.target/riscv/amo/amo-table-a-6-fence-4.c: Removed.
* gcc.target/riscv/amo/amo-table-a-6-fence-5.c: Removed.
* gcc.target/riscv/amo/amo-table-ztso-amo-add-1.c: Removed.
* gcc.target/riscv/amo/amo-table-ztso-amo-add-2.c: Removed.
* gcc.target/riscv/amo/amo-table-ztso-amo-add-3.c: Removed.
* gcc.target/riscv/amo/amo-table-ztso-amo-add-4.c: Removed.
* gcc.target/riscv/amo/amo-table-ztso-amo-add-5.c: Removed.
* gcc.target/riscv/amo/amo-table-ztso-fence-1.c: Removed.
* gcc.target/riscv/amo/amo-table-ztso-fence-2.c: Removed.
* gcc.target/riscv/amo/amo-table-ztso-fence-3.c: Removed.
* gcc.target/riscv/amo/amo-table-ztso-fence-4.c: Removed.
* gcc.target/riscv/amo/amo-table-ztso-fence-5.c: Removed.
* gcc.target/riscv/amo/amo-zalrsc-amo-add-1.c: Removed.
* gcc.target/riscv/amo/amo-zalrsc-amo-add-2.c: Removed.
* gcc.target/riscv/amo/amo-zalrsc-amo-add-3.c: Removed.
* gcc.target/riscv/amo/amo-zalrsc-amo-add-4.c: Removed.
* gcc.target/riscv/amo/amo-zalrsc-amo-add-5.c: Removed.
* gcc.target/riscv/amo/a-rvwmo-fence.c: New test.
* gcc.target/riscv/amo/a-ztso-fence.c: New test.
* gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c: New test.
* gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c: New test.
* gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c: New test.
* gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c: New test.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
.../gcc.target/riscv/amo/a-rvwmo-fence.c | 56 +++++++++++++
.../gcc.target/riscv/amo/a-ztso-fence.c | 52 +++++++++++++
.../riscv/amo/amo-table-a-6-amo-add-1.c | 17 ----
.../riscv/amo/amo-table-a-6-amo-add-2.c | 17 ----
.../riscv/amo/amo-table-a-6-amo-add-3.c | 17 ----
.../riscv/amo/amo-table-a-6-amo-add-4.c | 17 ----
.../riscv/amo/amo-table-a-6-amo-add-5.c | 17 ----
.../riscv/amo/amo-table-a-6-fence-1.c | 15 ----
.../riscv/amo/amo-table-a-6-fence-2.c | 16 ----
.../riscv/amo/amo-table-a-6-fence-3.c | 16 ----
.../riscv/amo/amo-table-a-6-fence-4.c | 16 ----
.../riscv/amo/amo-table-a-6-fence-5.c | 16 ----
.../riscv/amo/amo-table-ztso-amo-add-1.c | 17 ----
.../riscv/amo/amo-table-ztso-amo-add-2.c | 17 ----
.../riscv/amo/amo-table-ztso-amo-add-3.c | 17 ----
.../riscv/amo/amo-table-ztso-amo-add-4.c | 17 ----
.../riscv/amo/amo-table-ztso-amo-add-5.c | 17 ----
.../riscv/amo/amo-table-ztso-fence-1.c | 15 ----
.../riscv/amo/amo-table-ztso-fence-2.c | 15 ----
.../riscv/amo/amo-table-ztso-fence-3.c | 15 ----
.../riscv/amo/amo-table-ztso-fence-4.c | 15 ----
.../riscv/amo/amo-table-ztso-fence-5.c | 16 ----
.../riscv/amo/amo-zalrsc-amo-add-1.c | 22 ------
.../riscv/amo/amo-zalrsc-amo-add-2.c | 22 ------
.../riscv/amo/amo-zalrsc-amo-add-3.c | 22 ------
.../riscv/amo/amo-zalrsc-amo-add-4.c | 22 ------
.../riscv/amo/amo-zalrsc-amo-add-5.c | 22 ------
.../riscv/amo/zaamo-rvwmo-amo-add-int.c | 57 ++++++++++++++
.../riscv/amo/zaamo-ztso-amo-add-int.c | 57 ++++++++++++++
.../riscv/amo/zalrsc-rvwmo-amo-add-int.c | 78 +++++++++++++++++++
.../riscv/amo/zalrsc-ztso-amo-add-int.c | 78 +++++++++++++++++++
31 files changed, 378 insertions(+), 435 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-fence.c
create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-ztso-fence.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-1.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-2.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-3.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-4.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-5.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-1.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-2.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-3.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-4.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-5.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-1.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-2.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-3.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-4.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-5.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-1.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-2.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-3.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-4.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-5.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-1.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-2.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-3.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-4.c
delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-5.c
create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c
create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c
create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-fence.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-fence.c
new file mode 100644
index 00000000000..5b9400f7da8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-fence.c
@@ -0,0 +1,56 @@
+/* { dg-do compile } */
+/* Verify that fence mappings match Table A.6's recommended mapping. */
+/* { dg-options "-O3" } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** fence_relaxed:
+** ret
+*/
+void fence_relaxed()
+{
+ __atomic_thread_fence(__ATOMIC_RELAXED);
+}
+
+/*
+** fence_acquire:
+** fence\tr,rw
+** ret
+*/
+void fence_acquire()
+{
+ __atomic_thread_fence(__ATOMIC_ACQUIRE);
+}
+
+/*
+** fence_release:
+** fence\trw,w
+** ret
+*/
+void fence_release()
+{
+ __atomic_thread_fence(__ATOMIC_RELEASE);
+}
+
+/*
+** fence_acq_rel:
+** fence\.tso
+** ret
+*/
+void fence_acq_rel()
+{
+ __atomic_thread_fence(__ATOMIC_ACQ_REL);
+}
+
+/*
+** fence_seq_cst:
+** fence\trw,rw
+** ret
+*/
+void fence_seq_cst()
+{
+ __atomic_thread_fence(__ATOMIC_SEQ_CST);
+}
+
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-fence.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-fence.c
new file mode 100644
index 00000000000..37daeda8354
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-fence.c
@@ -0,0 +1,52 @@
+/* { dg-do compile } */
+/* Verify that fence mappings match the Ztso suggested mapping. */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** fence_relaxed:
+** ret
+*/
+void fence_relaxed()
+{
+ __atomic_thread_fence(__ATOMIC_RELAXED);
+}
+
+/*
+** fence_acquire:
+** ret
+*/
+void fence_acquire()
+{
+ __atomic_thread_fence(__ATOMIC_ACQUIRE);
+}
+
+/*
+** fence_release:
+** ret
+*/
+void fence_release()
+{
+ __atomic_thread_fence(__ATOMIC_RELEASE);
+}
+
+/*
+** fence_acq_rel:
+** ret
+*/
+void fence_acq_rel()
+{
+ __atomic_thread_fence(__ATOMIC_ACQ_REL);
+}
+
+/*
+** fence_seq_cst:
+** fence\trw,rw
+** ret
+*/
+void fence_seq_cst()
+{
+ __atomic_thread_fence(__ATOMIC_SEQ_CST);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-1.c
deleted file mode 100644
index 2acad7d44bf..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-1.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile } */
-/* Verify that atomic op mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zaamo } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** amoadd\.w\tzero,a1,0\(a0\)
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-2.c
deleted file mode 100644
index ab21f079eaa..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-2.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile } */
-/* Verify that atomic op mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zaamo } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** amoadd\.w\.aq\tzero,a1,0\(a0\)
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-3.c
deleted file mode 100644
index 919ff37d096..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-3.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile } */
-/* Verify that atomic op mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zaamo } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** amoadd\.w\.rl\tzero,a1,0\(a0\)
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-4.c
deleted file mode 100644
index 1531d3763b7..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-4.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile } */
-/* Verify that atomic op mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zaamo } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** amoadd\.w\.aqrl\tzero,a1,0\(a0\)
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-5.c
deleted file mode 100644
index 03b70111a74..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-amo-add-5.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile } */
-/* Verify that atomic op mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zaamo } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** amoadd\.w\.aqrl\tzero,a1,0\(a0\)
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-1.c
deleted file mode 100644
index 202479a005e..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-1.c
+++ /dev/null
@@ -1,15 +0,0 @@
-/* { dg-do compile } */
-/* Verify that fence mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** ret
-*/
-void foo()
-{
- __atomic_thread_fence(__ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-2.c
deleted file mode 100644
index 7d6c73a6b50..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-2.c
+++ /dev/null
@@ -1,16 +0,0 @@
-/* { dg-do compile } */
-/* Verify that fence mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** fence\tr,rw
-** ret
-*/
-void foo()
-{
- __atomic_thread_fence(__ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-3.c
deleted file mode 100644
index a53889a4fa1..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-3.c
+++ /dev/null
@@ -1,16 +0,0 @@
-/* { dg-do compile } */
-/* Verify that fence mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** fence\trw,w
-** ret
-*/
-void foo()
-{
- __atomic_thread_fence(__ATOMIC_RELEASE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-4.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-4.c
deleted file mode 100644
index 63a3a234d43..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-4.c
+++ /dev/null
@@ -1,16 +0,0 @@
-/* { dg-do compile } */
-/* Verify that fence mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** fence\.tso
-** ret
-*/
-void foo()
-{
- __atomic_thread_fence(__ATOMIC_ACQ_REL);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-5.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-5.c
deleted file mode 100644
index 78040bd11e9..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-fence-5.c
+++ /dev/null
@@ -1,16 +0,0 @@
-/* { dg-do compile } */
-/* Verify that fence mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** fence\trw,rw
-** ret
-*/
-void foo()
-{
- __atomic_thread_fence(__ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-1.c
deleted file mode 100644
index 000407a2583..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-1.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile } */
-/* Verify that atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zaamo } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** amoadd\.w\tzero,a1,0\(a0\)
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-2.c
deleted file mode 100644
index 3e441cadbf3..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-2.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile } */
-/* Verify that atomic op mappings the Ztso suggested mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zaamo } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** amoadd\.w\tzero,a1,0\(a0\)
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-3.c
deleted file mode 100644
index 8af1a2f79a4..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-3.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile } */
-/* Verify that atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zaamo } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** amoadd\.w\tzero,a1,0\(a0\)
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-4.c
deleted file mode 100644
index 0b3a7e59689..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-4.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile } */
-/* Verify that atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zaamo } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** amoadd\.w\tzero,a1,0\(a0\)
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-5.c
deleted file mode 100644
index f189827d6cf..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-amo-add-5.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile } */
-/* Verify that atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zaamo } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** amoadd\.w\tzero,a1,0\(a0\)
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-1.c
deleted file mode 100644
index ec008d25794..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-1.c
+++ /dev/null
@@ -1,15 +0,0 @@
-/* { dg-do compile } */
-/* Verify that fence mappings match the Ztso suggested mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** ret
-*/
-void foo()
-{
- __atomic_thread_fence(__ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-2.c
deleted file mode 100644
index acef911573f..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-2.c
+++ /dev/null
@@ -1,15 +0,0 @@
-/* { dg-do compile } */
-/* Verify that fence mappings match the Ztso suggested mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** ret
-*/
-void foo()
-{
- __atomic_thread_fence(__ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-3.c
deleted file mode 100644
index 6931ba0a799..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-3.c
+++ /dev/null
@@ -1,15 +0,0 @@
-/* { dg-do compile } */
-/* Verify that fence mappings match the Ztso suggested mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** ret
-*/
-void foo()
-{
- __atomic_thread_fence(__ATOMIC_RELEASE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-4.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-4.c
deleted file mode 100644
index b5a04294ad0..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-4.c
+++ /dev/null
@@ -1,15 +0,0 @@
-/* { dg-do compile } */
-/* Verify that fence mappings match the Ztso suggested mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** ret
-*/
-void foo()
-{
- __atomic_thread_fence(__ATOMIC_ACQ_REL);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-5.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-5.c
deleted file mode 100644
index 860fb978cbc..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-fence-5.c
+++ /dev/null
@@ -1,16 +0,0 @@
-/* { dg-do compile } */
-/* Verify that fence mappings match the Ztso suggested mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** fence\trw,rw
-** ret
-*/
-void foo()
-{
- __atomic_thread_fence(__ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-1.c
deleted file mode 100644
index 582e96534de..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-1.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/* { dg-do compile } */
-/* Verify that lrsc atomic op mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_zaamo } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** 1:
-** lr.w\t[atx][0-9]+, 0\(a0\)
-** add\t[atx][0-9]+, [atx][0-9]+, a1
-** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
-** bnez\t[atx][0-9]+, 1b
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-2.c
deleted file mode 100644
index 987429640de..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-2.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/* { dg-do compile } */
-/* Verify that lrsc atomic op mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_zaamo } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** 1:
-** lr.w.aq\t[atx][0-9]+, 0\(a0\)
-** add\t[atx][0-9]+, [atx][0-9]+, a1
-** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
-** bnez\t[atx][0-9]+, 1b
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-3.c
deleted file mode 100644
index b29966ce7d7..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-3.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/* { dg-do compile } */
-/* Verify that lrsc atomic op mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_zaamo } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** 1:
-** lr.w\t[atx][0-9]+, 0\(a0\)
-** add\t[atx][0-9]+, [atx][0-9]+, a1
-** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
-** bnez\t[atx][0-9]+, 1b
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-4.c
deleted file mode 100644
index 5dfb7ac2bac..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-4.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/* { dg-do compile } */
-/* Verify that lrsc atomic op mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_zaamo } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** 1:
-** lr.w.aq\t[atx][0-9]+, 0\(a0\)
-** add\t[atx][0-9]+, [atx][0-9]+, a1
-** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
-** bnez\t[atx][0-9]+, 1b
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-5.c
deleted file mode 100644
index fcc64131fec..00000000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-zalrsc-amo-add-5.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/* { dg-do compile } */
-/* Verify that lrsc atomic op mappings match Table A.6's recommended mapping. */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_zaamo } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-** 1:
-** lr.w.aqrl\t[atx][0-9]+, 0\(a0\)
-** add\t[atx][0-9]+, [atx][0-9]+, a1
-** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
-** bnez\t[atx][0-9]+, 1b
-** ret
-*/
-void foo (int* bar, int baz)
-{
- __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c b/gcc/testsuite/gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c
new file mode 100644
index 00000000000..22187243314
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c
@@ -0,0 +1,57 @@
+/* { dg-do compile } */
+/* Verify that atomic op mappings match Table A.6's recommended mapping. */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_zaamo } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_add_fetch_int_relaxed:
+** amoadd\.w\tzero,a1,0\(a0\)
+** ret
+*/
+void atomic_add_fetch_int_relaxed (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_add_fetch_int_acquire:
+** amoadd\.w\.aq\tzero,a1,0\(a0\)
+** ret
+*/
+void atomic_add_fetch_int_acquire (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
+}
+
+/*
+** atomic_add_fetch_int_release:
+** amoadd\.w\.rl\tzero,a1,0\(a0\)
+** ret
+*/
+void atomic_add_fetch_int_release (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
+}
+
+/*
+** atomic_add_fetch_int_acq_rel:
+** amoadd\.w\.aqrl\tzero,a1,0\(a0\)
+** ret
+*/
+void atomic_add_fetch_int_acq_rel (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
+}
+
+/*
+** atomic_add_fetch_int_seq_cst:
+** amoadd\.w\.aqrl\tzero,a1,0\(a0\)
+** ret
+*/
+void atomic_add_fetch_int_seq_cst (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c b/gcc/testsuite/gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c
new file mode 100644
index 00000000000..8cfd601f12a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c
@@ -0,0 +1,57 @@
+/* { dg-do compile } */
+/* Verify that atomic op mappings match Table A.6's recommended mapping. */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_zaamo } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_add_fetch_int_relaxed:
+** amoadd\.w\tzero,a1,0\(a0\)
+** ret
+*/
+void atomic_add_fetch_int_relaxed (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_add_fetch_int_acquire:
+** amoadd\.w\tzero,a1,0\(a0\)
+** ret
+*/
+void atomic_add_fetch_int_acquire (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
+}
+
+/*
+** atomic_add_fetch_int_release:
+** amoadd\.w\tzero,a1,0\(a0\)
+** ret
+*/
+void atomic_add_fetch_int_release (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
+}
+
+/*
+** atomic_add_fetch_int_acq_rel:
+** amoadd\.w\tzero,a1,0\(a0\)
+** ret
+*/
+void atomic_add_fetch_int_acq_rel (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
+}
+
+/*
+** atomic_add_fetch_int_seq_cst:
+** amoadd\.w\tzero,a1,0\(a0\)
+** ret
+*/
+void atomic_add_fetch_int_seq_cst (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
new file mode 100644
index 00000000000..4cf617d6035
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-amo-add-int.c
@@ -0,0 +1,78 @@
+/* { dg-do compile } */
+/* Verify that lrsc atomic op mappings match the PSABI doc's recommended mapping. */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_zaamo } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_add_fetch_int_relaxed:
+** 1:
+** lr.w\t[atx][0-9]+, 0\(a0\)
+** add\t[atx][0-9]+, [atx][0-9]+, a1
+** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
+** bnez\t[atx][0-9]+, 1b
+** ret
+*/
+void atomic_add_fetch_int_relaxed (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_add_fetch_int_acquire:
+** 1:
+** lr.w.aq\t[atx][0-9]+, 0\(a0\)
+** add\t[atx][0-9]+, [atx][0-9]+, a1
+** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
+** bnez\t[atx][0-9]+, 1b
+** ret
+*/
+void atomic_add_fetch_int_acquire (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
+}
+
+/*
+** atomic_add_fetch_int_release:
+** 1:
+** lr.w\t[atx][0-9]+, 0\(a0\)
+** add\t[atx][0-9]+, [atx][0-9]+, a1
+** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
+** bnez\t[atx][0-9]+, 1b
+** ret
+*/
+void atomic_add_fetch_int_release (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
+}
+
+/*
+** atomic_add_fetch_int_acq_rel:
+** 1:
+** lr.w.aq\t[atx][0-9]+, 0\(a0\)
+** add\t[atx][0-9]+, [atx][0-9]+, a1
+** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
+** bnez\t[atx][0-9]+, 1b
+** ret
+*/
+void atomic_add_fetch_int_acq_rel (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
+}
+
+/*
+** atomic_add_fetch_int_seq_cst:
+** 1:
+** lr.w.aqrl\t[atx][0-9]+, 0\(a0\)
+** add\t[atx][0-9]+, [atx][0-9]+, a1
+** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
+** bnez\t[atx][0-9]+, 1b
+** ret
+*/
+void atomic_add_fetch_int_seq_cst (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
new file mode 100644
index 00000000000..3fb16c01191
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-amo-add-int.c
@@ -0,0 +1,78 @@
+/* { dg-do compile } */
+/* Verify that lrsc atomic op mappings match the PSABI doc's recommended mapping. */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-remove-options riscv_zaamo } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_add_fetch_int_relaxed:
+** 1:
+** lr.w\t[atx][0-9]+, 0\(a0\)
+** add\t[atx][0-9]+, [atx][0-9]+, a1
+** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
+** bnez\t[atx][0-9]+, 1b
+** ret
+*/
+void atomic_add_fetch_int_relaxed (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_add_fetch_int_acquire:
+** 1:
+** lr.w\t[atx][0-9]+, 0\(a0\)
+** add\t[atx][0-9]+, [atx][0-9]+, a1
+** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
+** bnez\t[atx][0-9]+, 1b
+** ret
+*/
+void atomic_add_fetch_int_acquire (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
+}
+
+/*
+** atomic_add_fetch_int_release:
+** 1:
+** lr.w\t[atx][0-9]+, 0\(a0\)
+** add\t[atx][0-9]+, [atx][0-9]+, a1
+** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
+** bnez\t[atx][0-9]+, 1b
+** ret
+*/
+void atomic_add_fetch_int_release (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
+}
+
+/*
+** atomic_add_fetch_int_acq_rel:
+** 1:
+** lr.w\t[atx][0-9]+, 0\(a0\)
+** add\t[atx][0-9]+, [atx][0-9]+, a1
+** sc.w\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
+** bnez\t[atx][0-9]+, 1b
+** ret
+*/
+void atomic_add_fetch_int_acq_rel (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
+}
+
+/*
+** atomic_add_fetch_int_seq_cst:
+** 1:
+** lr.w.aqrl\t[atx][0-9]+, 0\(a0\)
+** add\t[atx][0-9]+, [atx][0-9]+, a1
+** sc.w.rl\t[atx][0-9]+, [atx][0-9]+, 0\(a0\)
+** bnez\t[atx][0-9]+, 1b
+** ret
+*/
+void atomic_add_fetch_int_seq_cst (int* bar, int baz)
+{
+ __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
+}
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 3/3] RISC-V: Update testcase comments to point to PSABI rather than Table A.6
2024-06-25 21:14 [PATCH 0/3] RISC-V: AMO testsuite cleanup Patrick O'Neill
2024-06-25 21:14 ` [PATCH 1/3] RISC-V: Rename amo testcases Patrick O'Neill
2024-06-25 21:14 ` [PATCH 2/3] RISC-V: Consolidate amo testcase variants Patrick O'Neill
@ 2024-06-25 21:14 ` Patrick O'Neill
2024-06-25 21:34 ` [PATCH 0/3] RISC-V: AMO testsuite cleanup Jeff Law
3 siblings, 0 replies; 6+ messages in thread
From: Patrick O'Neill @ 2024-06-25 21:14 UTC (permalink / raw)
To: gcc-patches
Cc: jeffreyalaw, kito.cheng, palmer, gnu-toolchain, Patrick O'Neill
Table A.6 was originally the source of truth for the recommended mappings.
Point to the PSABI doc since the memory model mappings have been moved there.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/amo/a-rvwmo-fence.c: Replace A.6 reference with PSABI.
* gcc.target/riscv/amo/a-rvwmo-load-acquire.c: Ditto.
* gcc.target/riscv/amo/a-rvwmo-load-relaxed.c: Ditto.
* gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c: Ditto.
* gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c: Ditto.
* gcc.target/riscv/amo/a-rvwmo-store-relaxed.c: Ditto.
* gcc.target/riscv/amo/a-rvwmo-store-release.c: Ditto.
* gcc.target/riscv/amo/a-ztso-fence.c: Ditto.
* gcc.target/riscv/amo/a-ztso-load-acquire.c: Ditto.
* gcc.target/riscv/amo/a-ztso-load-relaxed.c: Ditto.
* gcc.target/riscv/amo/a-ztso-load-seq-cst.c: Ditto.
* gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c: Ditto.
* gcc.target/riscv/amo/a-ztso-store-relaxed.c: Ditto.
* gcc.target/riscv/amo/a-ztso-store-release.c: Ditto.
* gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c: Ditto.
* gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c: Ditto.
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c: Ditto.
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c: Ditto.
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c: Ditto.
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c: Ditto.
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c: Ditto.
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c: Ditto.
* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c: Ditto.
* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c: Ditto.
* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c: Ditto.
* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c: Ditto.
* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c: Ditto.
* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c: Ditto.
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c: Ditto.
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c: Ditto.
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c: Ditto.
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c: Ditto.
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c: Ditto.
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c: Ditto.
* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c: Ditto.
* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c: Ditto.
* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c: Ditto.
* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c: Ditto.
* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c: Ditto.
* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c: Ditto.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-fence.c | 2 +-
gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-acquire.c | 2 +-
gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-relaxed.c | 2 +-
gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c | 2 +-
.../gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c | 3 ++-
gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-relaxed.c | 2 +-
gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-release.c | 2 +-
gcc/testsuite/gcc.target/riscv/amo/a-ztso-fence.c | 2 +-
gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-acquire.c | 2 +-
gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-relaxed.c | 2 +-
gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-seq-cst.c | 2 +-
.../gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c | 3 ++-
gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-relaxed.c | 2 +-
gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-release.c | 2 +-
gcc/testsuite/gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c | 2 +-
gcc/testsuite/gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c | 2 +-
.../amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c | 2 +-
.../riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c | 2 +-
.../riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c | 2 +-
.../riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c | 2 +-
.../riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c | 2 +-
.../amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c | 3 ++-
.../riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c | 2 +-
.../riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c | 2 +-
.../riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c | 2 +-
.../riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c | 2 +-
.../riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c | 2 +-
.../riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c | 2 +-
.../amo/zalrsc-ztso-compare-exchange-int-acquire-release.c | 3 ++-
.../riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c | 2 +-
.../riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c | 2 +-
.../riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c | 2 +-
.../riscv/amo/zalrsc-ztso-compare-exchange-int-release.c | 2 +-
.../amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c | 3 ++-
.../riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c | 2 +-
.../riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c | 2 +-
.../riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c | 2 +-
.../riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c | 2 +-
.../riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c | 2 +-
.../riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c | 2 +-
40 files changed, 45 insertions(+), 40 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-fence.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-fence.c
index 5b9400f7da8..6803bf92aa3 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-fence.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-fence.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that fence mappings match Table A.6's recommended mapping. */
+/* Verify that fence mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-remove-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-acquire.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-acquire.c
index f9871b92c0b..93a0c68ae8a 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-acquire.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-acquire.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that load mappings match Table A.6's recommended mapping. */
+/* Verify that load mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-remove-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-relaxed.c
index 7b99db06d75..2403d53c131 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-relaxed.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-relaxed.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that load mappings match Table A.6's recommended mapping. */
+/* Verify that load mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-remove-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c
index 35f196c23c0..31b35cf9f6a 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that load mappings match Table A.6's recommended mapping. */
+/* Verify that load mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-remove-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c
index 43880b9734a..45c9abb1425 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
-/* Verify that store mapping are compatible with Table A.6 & A.7. */
+/* Verify that store mappings match the PSABI doc's recommended compatibility
+ mapping. */
/* { dg-options "-O3" } */
/* { dg-remove-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-relaxed.c
index eb67d1968e0..4b321b2b75f 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-relaxed.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-relaxed.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that store mappings match Table A.6's recommended mapping. */
+/* Verify that store mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-remove-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-release.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-release.c
index 25a998b86eb..a2a617c4d15 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-release.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-release.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that store mappings match Table A.6's recommended mapping. */
+/* Verify that store mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-remove-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-fence.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-fence.c
index 37daeda8354..153f6ef8a3d 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-fence.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-fence.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that fence mappings match the Ztso suggested mapping. */
+/* Verify that fence mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-acquire.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-acquire.c
index 4e94191812b..76a12059f39 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-acquire.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-acquire.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that load mappings match the Ztso suggested mapping. */
+/* Verify that load mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-relaxed.c
index ef5dee6ee60..c4ee56e2cc0 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-relaxed.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-relaxed.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that load mappings match the Ztso suggested mapping. */
+/* Verify that load mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-seq-cst.c
index 93cd8bb909c..7163311433c 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-seq-cst.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-seq-cst.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that load mappings match the Ztso suggested mapping. */
+/* Verify that load mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c
index e32cfb1a3cb..2f4c9124aaf 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
-/* Verify that store mappings match the Ztso suggested mapping. */
+/* Verify that store mappings match the PSABI doc's recommended compatibility
+ mapping. */
/* { dg-options "-O3" } */
/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-relaxed.c
index 2f46470ae15..d469bf348d9 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-relaxed.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-relaxed.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that store mappings match the Ztso suggested mapping. */
+/* Verify that store mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-release.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-release.c
index dd2db3a7878..3a275740401 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-release.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-release.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that store mappings match the Ztso suggested mapping. */
+/* Verify that store mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c b/gcc/testsuite/gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c
index 22187243314..ca40a49f9b5 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zaamo-rvwmo-amo-add-int.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that atomic op mappings match Table A.6's recommended mapping. */
+/* Verify that atomic op mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-add-options riscv_zaamo } */
/* { dg-remove-options riscv_ztso } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c b/gcc/testsuite/gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c
index 8cfd601f12a..8ebdc61992e 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zaamo-ztso-amo-add-int.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that atomic op mappings match Table A.6's recommended mapping. */
+/* Verify that atomic op mappings match the PSABI doc's recommended mapping. */
/* { dg-options "-O3" } */
/* { dg-add-options riscv_zaamo } */
/* { dg-add-options riscv_ztso } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c
index 0cbc89c617c..49eeda9cb33 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-remove-options riscv_ztso } */
/* Mixed mappings need to be unioned. */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c
index 70107c40a53..b9e3adece8d 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-remove-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c
index b3cffad005d..11839d84f14 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-remove-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c
index fd8a8bfe9c6..852ec99df76 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-remove-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c
index faab1ab728c..9c51a082d0b 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-remove-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c
index 957aa3c0afd..d985e2cef8b 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
+/* Mixed mappings need to be unioned. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-remove-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c
index a1435a07a21..6efd232ce21 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-remove-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c
index 3f5fa20c87c..2c2df133a28 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that subword atomic op mappings match Table A.6's recommended mapping. */
+/* Verify that subword atomic op mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-remove-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c
index 782ffcb0a70..abfbf63902c 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that subword atomic op mappings match Table A.6's recommended mapping. */
+/* Verify that subword atomic op mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-remove-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c
index 50009f021dc..1f61c89da88 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that subword atomic op mappings match Table A.6's recommended mapping. */
+/* Verify that subword atomic op mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-remove-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c
index 76ec8a81d1f..343503ce79c 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that subword atomic op mappings match Table A.6's recommended mapping. */
+/* Verify that subword atomic op mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-remove-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c
index 7417a67f692..045434b2579 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that subword atomic op mappings match Table A.6's recommended mapping. */
+/* Verify that subword atomic op mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-remove-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c
index 7da3b1dce48..9761a955ede 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
+/* Mixed mappings need to be unioned. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c
index 0a443b461f3..3303f8021e1 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c
index 20e325f2e7c..7474e832bb1 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c
index 46a9f0c918a..e43193820f2 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c
index 35e01cdc8be..a0d5872e1bd 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c
index 53f6e6ace0b..fc464ab1ff5 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
+/* Mixed mappings need to be unioned. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c
index cd884931bdf..152806cfde3 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping. */
+/* Verify that compare exchange mappings match the PSABI doc's recommended mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c
index a88e409063a..f64b10a076a 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that subword atomic op mappings match the Ztso suggested mapping. */
+/* Verify that subword atomic op mappings match the PSABI doc's suggested mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c
index 8d28569c79c..5d743f0ab83 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that subword atomic op mappings match the Ztso suggested mapping. */
+/* Verify that subword atomic op mappings match the PSABI doc's suggested mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c
index a44d6980ece..3e7dda9c8c4 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that subword atomic op mappings match the Ztso suggested mapping. */
+/* Verify that subword atomic op mappings match the PSABI doc's suggested mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c
index fb803ab9cbf..ffd832eef78 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that subword atomic op mappings match the Ztso suggested mapping. */
+/* Verify that subword atomic op mappings match the PSABI doc's suggested mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c
index d851e5e5944..e9ea3f5ff3b 100644
--- a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* Verify that subword atomic op mappings match the Ztso suggested mapping. */
+/* Verify that subword atomic op mappings match the PSABI doc's suggested mapping. */
/* { dg-add-options riscv_zalrsc } */
/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 0/3] RISC-V: AMO testsuite cleanup
2024-06-25 21:14 [PATCH 0/3] RISC-V: AMO testsuite cleanup Patrick O'Neill
` (2 preceding siblings ...)
2024-06-25 21:14 ` [PATCH 3/3] RISC-V: Update testcase comments to point to PSABI rather than Table A.6 Patrick O'Neill
@ 2024-06-25 21:34 ` Jeff Law
2024-06-26 16:42 ` [Committed] " Patrick O'Neill
3 siblings, 1 reply; 6+ messages in thread
From: Jeff Law @ 2024-06-25 21:34 UTC (permalink / raw)
To: Patrick O'Neill, gcc-patches; +Cc: kito.cheng, palmer, gnu-toolchain
On 6/25/24 3:14 PM, Patrick O'Neill wrote:
> This is another round of AMO testcase cleanup. Consolidates a lot of testcases
> and unifies the testcase names.
>
> Patrick O'Neill (3):
> RISC-V: Rename amo testcases
> RISC-V: Consolidate amo testcase variants
> RISC-V: Update testcase comments to point to PSABI rather than Table
> A.6
[ ... ]
This series is OK for the trunk.
Thanks,
Jeff
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Committed] RISC-V: AMO testsuite cleanup
2024-06-25 21:34 ` [PATCH 0/3] RISC-V: AMO testsuite cleanup Jeff Law
@ 2024-06-26 16:42 ` Patrick O'Neill
0 siblings, 0 replies; 6+ messages in thread
From: Patrick O'Neill @ 2024-06-26 16:42 UTC (permalink / raw)
To: Jeff Law, gcc-patches; +Cc: kito.cheng, palmer, gnu-toolchain
On 6/25/24 14:34, Jeff Law wrote:
>
>
> On 6/25/24 3:14 PM, Patrick O'Neill wrote:
>> This is another round of AMO testcase cleanup. Consolidates a lot of
>> testcases
>> and unifies the testcase names.
>>
>> Patrick O'Neill (3):
>> RISC-V: Rename amo testcases
>> RISC-V: Consolidate amo testcase variants
>> RISC-V: Update testcase comments to point to PSABI rather than Table
>> A.6
> [ ... ]
> This series is OK for the trunk.
>
> Thanks,
> Jeff
>
Committed.
Patrick
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-06-26 16:42 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2024-06-25 21:14 [PATCH 0/3] RISC-V: AMO testsuite cleanup Patrick O'Neill
2024-06-25 21:14 ` [PATCH 1/3] RISC-V: Rename amo testcases Patrick O'Neill
2024-06-25 21:14 ` [PATCH 2/3] RISC-V: Consolidate amo testcase variants Patrick O'Neill
2024-06-25 21:14 ` [PATCH 3/3] RISC-V: Update testcase comments to point to PSABI rather than Table A.6 Patrick O'Neill
2024-06-25 21:34 ` [PATCH 0/3] RISC-V: AMO testsuite cleanup Jeff Law
2024-06-26 16:42 ` [Committed] " Patrick O'Neill
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