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From: Eric Botcazou <ebotcazou@adacore.com>
To: Jakub Jelinek <jakub@redhat.com>
Cc: gcc-patches@gcc.gnu.org, Hans-Peter Nilsson <hp@bitrange.com>,
	Alexandre Oliva <aoliva@redhat.com>
Subject: Re: [RFA:] fix PR55030, wrong code from __builtin_setjmp_receiver
Date: Tue, 27 Nov 2012 17:39:00 -0000	[thread overview]
Message-ID: <20520021.fBU7p54CN9@polaris> (raw)
In-Reply-To: <20121127120347.GU2315@tucnak.redhat.com>

> I strongly disagree with this.  Outputs and clobbers have significant
> meaning even on volatile asms, asm volatile doesn't mean all registers and
> all memory are supposed to be considered clobbered.  For memory you have
> "memory" clobber for that, for registers it is users responsibility to
> describe exactly what changes, either in clobbers or in outputs.
> The difference between non-volatile and volatile asm is, as the
> documentation states:
> 
> The `volatile' keyword indicates that the instruction has important
> side-effects.  GCC will not delete a volatile `asm' if it is reachable.
> 
> Volatile asm acts as an optimization barrier to some extent, but it really
> can't modify registers or memory that aren't described as modified in the
> asm pattern.  The important side-effects are of some other kind than
> modifying registers or memory visible from the current function.
> Ditto for UNSPEC_VOLATILE.

Well, the last sentence would essentially void the entire argument I think.  
It's well established in the RTL middle-end that UNSPEC_VOLATILE can do pretty 
much everything behind the back of the compiler.

Now I agree that the discussion exists for volatile asms.  But you have for 
example in the unmodified cse.c:

  /* A volatile ASM invalidates everything.  */
  if (NONJUMP_INSN_P (insn)
      && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
      && MEM_VOLATILE_P (PATTERN (insn)))
    flush_hash_table ();

and the comment of volatile_insn_p is rather explicit:

/* Nonzero if X contains any volatile instructions.  These are instructions
   which may cause unpredictable machine state instructions, and thus no
   instructions should be moved or combined across them.  This includes
   only volatile asms and UNSPEC_VOLATILE instructions.  */

The problem is that the various RTL passes don't have a consistent view on 
that so the patch attempts to tidy this up in a conservative manner.

I think that a compromise could be to say that volatile asms without outputs 
are full barriers (like UNSPEC_VOLATILE) but other volatile asms aren't.
That's what the unmodified cse.c, cselib.c and dse.c currently implement.
But implementing it consistently would mean weakening volatile_insn_p.

> So, at least from var-tracking POV which doesn't attempt to perform any
> optimizations across any insn, just tries to track where values live, IMHO a
> volatile asm acts exactly the same as non-volatile, that is why I'm testing
> following patch right now.
> 
> But the question is also what effects your patch can have e.g. on RTL DSE.

It will make all volatile asms be treated as volatile asms without outputs.

-- 
Eric Botcazou

  parent reply	other threads:[~2012-11-27 17:39 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-11-12  4:49 Hans-Peter Nilsson
2012-11-12  8:28 ` Eric Botcazou
2012-11-19  3:54   ` Hans-Peter Nilsson
2012-11-19  9:35     ` Eric Botcazou
2012-11-26  3:30       ` Hans-Peter Nilsson
2012-11-27 11:44       ` Hans-Peter Nilsson
2012-11-27 12:04         ` Jakub Jelinek
2012-11-27 12:27           ` Hans-Peter Nilsson
2012-11-27 13:32           ` Jakub Jelinek
2012-11-27 17:39           ` Eric Botcazou [this message]
2012-11-27 18:20             ` Jakub Jelinek
2012-12-01  0:03               ` Eric Botcazou
2012-11-28 20:10             ` Richard Sandiford
2012-11-28 20:46             ` Richard Henderson
2012-11-28 13:44           ` Hans-Peter Nilsson
2012-11-28 13:56             ` Jakub Jelinek
2012-11-28 20:53           ` Richard Henderson
2012-11-27 19:30 Uros Bizjak
2012-11-28  9:50 ` Uros Bizjak

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