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Message-ID: <22ed42cf42737eec212f3708a65a755f2af41c24.camel@xry111.site>
Subject: Re: [PATCH v3] LoongArch: Add prefetch instructions.
From: Xi Ruoyao <xry111@xry111.site>
To: Lulu Cheng <chenglulu@loongson.cn>, WANG Xuerui <i@xen0n.name>, 
	gcc-patches@gcc.gnu.org
Cc: xuchenghua@loongson.cn, xujiahao <xujiahao@loongson.cn>
Date: Thu, 17 Nov 2022 00:22:26 +0800
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On Wed, 2022-11-16 at 11:19 +0800, Lulu Cheng wrote:
> The "m" constraint is defined as follows:
> =C2=A0(define_memory_constraint "m"
> =C2=A0=C2=A0 (and (match_code "mem")
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 (match_test "loongarch_12bit_offset_=
address_p (XEXP (op, 0),
> mode)")))
> This setting must be a memory operand.
> ''ZD" constraint is a address operand.=20
> I think (mem:mode (address operand)) =3D memory operand.

Yes they are different.  I tried reusing "m" in my previous attempt to
add prefetch instruction but it didn't work.

--=20
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University