From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from esa2.mentor.iphmx.com (esa2.mentor.iphmx.com [68.232.141.98]) by sourceware.org (Postfix) with ESMTPS id AEA7C3857003 for ; Tue, 30 Jun 2020 16:35:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org AEA7C3857003 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=Kwok_Yeung@mentor.com IronPort-SDR: CRgpBcd/Mw0IadGXTVA4RcHr7yNk2HYqkT0Rn0HnV5qJ7YxsEowBSNYm3yxn7BaSozk7kTbOgd ZEwf/EXePC5pbFSqoCTFm0u8Y7t2FA3ptuywXttlpCTyZpLzwDYtiO/0Co2dLfBvpyhToZerqn 8E05HXGNQm5WOAz2q/9XDfTo2FvZMeVwriLCkAtvXNKV81Hq4Eiz583cbw9OYN+Y1Os4Stcfp/ yujkm26Z+diP47lUjevDOR3DPnhhCotj9f3aC2nk+Q9bIbfH00GrI2XbtSyVjdB7o94ZsDYxw9 vo4= X-IronPort-AV: E=Sophos;i="5.75,298,1589270400"; d="scan'208";a="50461802" Received: from orw-gwy-01-in.mentorg.com ([192.94.38.165]) by esa2.mentor.iphmx.com with ESMTP; 30 Jun 2020 08:35:32 -0800 IronPort-SDR: 40iM3CTj8URu3NcNBeLSlAj1Q68fnb5RoN1eGxoz/IE6Iso3Vj7PLkZ+KbQf6ZGsPkBV5mmYP8 NRURWSjRIScsE/g+qP09Be8k5fZor6CuNUtwc/zdijEezEXlnUyY8xEwvU9psmPTxDBNK94kWl rNjBQgDLrm6yYt6hkm1Re7Xhqf20HEasKoH2/9hBXnudvHzrHo9TPAugTwdg7FlxSmKqjn6KQi JS9sT31NaA5A0+LgRp7S0w90NG5oHY8AuuBkVUFH9cw+oHw9pkb3ogO0AFN0dHAVJFLkiMFu02 DO8= Subject: Re: [PATCH] nvptx: Add support for subword compare-and-swap To: Jakub Jelinek , Thomas Schwinge CC: Tom de Vries , References: <3cbe58e6-b427-ff0d-b7d1-8723aac82b18@codesourcery.com> <87o8p920lx.fsf@euler.schwinge.homeip.net> <20200623165107.GA8462@tucnak> From: Kwok Cheung Yeung Message-ID: <232ab5e8-af3f-e162-346b-854fb78f1245@codesourcery.com> Date: Tue, 30 Jun 2020 17:35:26 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:68.0) Gecko/20100101 Thunderbird/68.9.0 MIME-Version: 1.0 In-Reply-To: <20200623165107.GA8462@tucnak> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: SVR-IES-MBX-08.mgc.mentorg.com (139.181.222.8) To SVR-IES-MBX-03.mgc.mentorg.com (139.181.222.3) X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Jun 2020 16:35:40 -0000 On 23/06/2020 5:51 pm, Jakub Jelinek wrote: > On Tue, Jun 23, 2020 at 06:44:26PM +0200, Thomas Schwinge wrote: >> On 2020-06-15T21:28:12+0100, Kwok Cheung Yeung wrote: >>> This patch adds support on nvptx for __sync_val_compare_and_swap operations on >>> 1- and 2-byte values. >> >> Is this a thorough review that these are the only functions missing, or >> did you just implement what you found missing for some test case you've >> been looking into? Other architectures' similar libgcc files seem to be >> defining more of such related functions. >> It seems a bit unfortunate to have such a thing outlined in a separate >> function, given we're talking about performance-critical code here? Even >> more so for GCN, where there's no JIT compiler that can inline it later, >> as it's the case for nvptx? > > I think this should really be handled by the backend inline, like many other > targets do it when they only support 32-bit+ and not 8/16-bit atomics. > See e.g. sparc backend. I can see both approaches being used - e.g. Sparc, Alpha, and RS6000 expand the subword atomics into loops in the backend. However, there are various linux-atomic.c files in the subdirectories of libgcc/config/ (e.g. for Arm, PA-RISC, m68k etc.), which use a system-call to do the 32-bit compare-and-swap, then express smaller operations in terms of that. TilePro, AMDGCN and RISC-V have atomic.c files that do the subword compare-and-swap in terms of a larger native compare-and-swap. I don't know - is it worth doing this in the backend on this architecture? One thing to keep in mind is that nvptx is a virtual instruction set, so the JIT compiler would likely inline the libgcc library calls anyway. Thanks Kwok