From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4252 invoked by alias); 4 Sep 2016 20:14:15 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 4190 invoked by uid 89); 4 Sep 2016 20:14:15 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=1.4 required=5.0 tests=AWL,BAYES_50,KAM_ASCII_DIVIDERS,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=no version=3.3.2 spammy=null_rtx, NULL_RTX, SImode, simode X-HELO: smtp.eu.adacore.com Received: from mel.act-europe.fr (HELO smtp.eu.adacore.com) (194.98.77.210) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sun, 04 Sep 2016 20:14:05 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id E5D9A8132E for ; Sun, 4 Sep 2016 22:14:02 +0200 (CEST) Received: from smtp.eu.adacore.com ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id c7dESEUktLTM for ; Sun, 4 Sep 2016 22:14:02 +0200 (CEST) Received: from arcturus.home (ADijon-653-1-102-91.w90-48.abo.wanadoo.fr [90.48.245.91]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.eu.adacore.com (Postfix) with ESMTPSA id 97A2D8132C for ; Sun, 4 Sep 2016 22:14:02 +0200 (CEST) From: Eric Botcazou To: gcc-patches@gcc.gnu.org Subject: [patch v2] Get rid of stack trampolines for nested functions (3/4) Date: Sun, 04 Sep 2016 20:15:00 -0000 Message-ID: <2332440.uHF5nx4qG9@arcturus.home> User-Agent: KMail/4.14.10 (Linux/3.16.7-42-desktop; KDE/4.14.9; x86_64; ; ) In-Reply-To: <1518726.5fkcUnkpqM@arcturus.home> References: <1518726.5fkcUnkpqM@arcturus.home> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="nextPart2412547.hYACaNlPW5" Content-Transfer-Encoding: 7Bit X-SW-Source: 2016-09/txt/msg00177.txt.bz2 This is a multi-part message in MIME format. --nextPart2412547.hYACaNlPW5 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Content-length: 1198 These are the individual back-end changes. Only the architectures for which native platforms are available are changed for now. The changes were tested at AdaCore over the years for every architecture and I'll retest them if they are accepted, except for those I cannot access any more (Alpha, MIPS, PA). 2016-07-04 Eric Botcazou * config/aarch64/aarch64.h(TARGET_CUSTOM_FUNCTION_DESCRIPTORS):Define * config/alpha/alpha.h (TARGET_CUSTOM_FUNCTION_DESCRIPTORS):Likewise. * config/arm/arm.h (TARGET_CUSTOM_FUNCTION_DESCRIPTORS): Likewise. * config/arm/arm.c (arm_function_ok_for_sibcall): Return false for an indirect call by descriptor if all the argument registers are used. (arm_relayout_function): Use FUNCTION_ALIGNMENT. * config/i386/i386.h (TARGET_CUSTOM_FUNCTION_DESCRIPTORS): Define. * config/ia64/ia64.h (TARGET_CUSTOM_FUNCTION_DESCRIPTORS): Likewise. * config/mips/mips.h (TARGET_CUSTOM_FUNCTION_DESCRIPTORS): Likewise. * config/pa/pa.h (TARGET_CUSTOM_FUNCTION_DESCRIPTORS): Likewise. * config/rs6000/rs6000.h(TARGET_CUSTOM_FUNCTION_DESCRIPTORS):Likewise * config/sparc/sparc.h (TARGET_CUSTOM_FUNCTION_DESCRIPTORS):Likewise. -- Eric Botcazou --nextPart2412547.hYACaNlPW5 Content-Disposition: attachment; filename="p3.diff" Content-Transfer-Encoding: 7Bit Content-Type: text/x-patch; charset="UTF-8"; name="p3.diff" Content-length: 6102 Index: config/aarch64/aarch64.h =================================================================== --- config/aarch64/aarch64.h (revision 239944) +++ config/aarch64/aarch64.h (working copy) @@ -806,6 +806,10 @@ typedef struct correctly. */ #define TRAMPOLINE_SECTION text_section +/* Use custom descriptors instead of trampolines when possible, but + TARGET_PTRMEMFUNC_VBIT_LOCATION is defined so use bit #1. */ +#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2 + /* To start with. */ #define BRANCH_COST(SPEED_P, PREDICTABLE_P) \ (aarch64_branch_cost (SPEED_P, PREDICTABLE_P)) Index: config/alpha/alpha.h =================================================================== --- config/alpha/alpha.h (revision 239944) +++ config/alpha/alpha.h (working copy) @@ -996,3 +996,6 @@ extern long alpha_auto_offset; #define NO_IMPLICIT_EXTERN_C #define TARGET_SUPPORTS_WIDE_INT 1 + +/* Use custom descriptors instead of trampolines when possible if not VMS. */ +#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS (TARGET_ABI_OPEN_VMS ? 0 : 1) Index: config/arm/arm.c =================================================================== --- config/arm/arm.c (revision 239944) +++ config/arm/arm.c (working copy) @@ -6818,6 +6818,29 @@ arm_function_ok_for_sibcall (tree decl, tree exp) && DECL_WEAK (decl)) return false; + /* We cannot do a tailcall for an indirect call by descriptor if all the + argument registers are used because the only register left to load the + address is IP and it will already contain the static chain. */ + if (!decl && CALL_EXPR_BY_DESCRIPTOR (exp) && !flag_trampolines) + { + tree fntype = TREE_TYPE (TREE_TYPE (CALL_EXPR_FN (exp))); + CUMULATIVE_ARGS cum; + cumulative_args_t cum_v; + + arm_init_cumulative_args (&cum, fntype, NULL_RTX, NULL_TREE); + cum_v = pack_cumulative_args (&cum); + + for (tree t = TYPE_ARG_TYPES (fntype); t; t = TREE_CHAIN (t)) + { + tree type = TREE_VALUE (t); + if (!VOID_TYPE_P (type)) + arm_function_arg_advance (cum_v, TYPE_MODE (type), type, true); + } + + if (!arm_function_arg (cum_v, SImode, integer_type_node, true)) + return false; + } + /* Everything else is ok. */ return true; } @@ -30187,7 +30210,9 @@ arm_relayout_function (tree fndecl) callee_tree = target_option_default_node; struct cl_target_option *opts = TREE_TARGET_OPTION (callee_tree); - SET_DECL_ALIGN (fndecl, FUNCTION_BOUNDARY_P (opts->x_target_flags)); + SET_DECL_ALIGN (fndecl, + FUNCTION_ALIGNMENT + (FUNCTION_BOUNDARY_P (opts->x_target_flags))); } /* Inner function to process the attribute((target(...))), take an argument and Index: config/arm/arm.h =================================================================== --- config/arm/arm.h (revision 239944) +++ config/arm/arm.h (working copy) @@ -1645,6 +1645,10 @@ typedef struct /* Alignment required for a trampoline in bits. */ #define TRAMPOLINE_ALIGNMENT 32 + +/* Use custom descriptors instead of trampolines when possible, but + TARGET_PTRMEMFUNC_VBIT_LOCATION is defined so use bit #1. */ +#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2 /* Addressing modes, and classification of registers for them. */ #define HAVE_POST_INCREMENT 1 Index: config/i386/i386.h =================================================================== --- config/i386/i386.h (revision 239944) +++ config/i386/i386.h (working copy) @@ -2670,6 +2670,9 @@ extern void debug_dispatch_window (int); #define TARGET_SUPPORTS_WIDE_INT 1 +/* Use custom descriptors instead of trampolines when possible. */ +#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 1 + /* Local variables: version-control: t Index: config/ia64/ia64.h =================================================================== --- config/ia64/ia64.h (revision 239944) +++ config/ia64/ia64.h (working copy) @@ -1714,4 +1714,7 @@ struct GTY(()) machine_function /* Switch on code for querying unit reservations. */ #define CPU_UNITS_QUERY 1 +/* IA-64 already uses descriptors for its standard calling sequence. */ +#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 0 + /* End of ia64.h */ Index: config/mips/mips.h =================================================================== --- config/mips/mips.h (revision 239944) +++ config/mips/mips.h (working copy) @@ -3413,3 +3413,7 @@ struct GTY(()) machine_function { #define ENABLE_LD_ST_PAIRS \ (TARGET_LOAD_STORE_PAIRS && (TUNE_P5600 || TUNE_I6400) \ && !TARGET_MICROMIPS && !TARGET_FIX_24K) + +/* Use custom descriptors instead of trampolines when possible, but + TARGET_PTRMEMFUNC_VBIT_LOCATION is defined so use bit #1. */ +#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2 Index: config/pa/pa.h =================================================================== --- config/pa/pa.h (revision 239944) +++ config/pa/pa.h (working copy) @@ -1313,3 +1313,6 @@ do { \ seven and four instructions, respectively. */ #define MAX_PCREL17F_OFFSET \ (flag_pic ? (TARGET_HPUX ? 198164 : 221312) : 240000) + +/* HP-PA already uses descriptors for its standard calling sequence. */ +#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 0 Index: config/rs6000/rs6000.h =================================================================== --- config/rs6000/rs6000.h (revision 239944) +++ config/rs6000/rs6000.h (working copy) @@ -2914,3 +2914,6 @@ extern GTY(()) tree rs6000_builtin_types[RS6000_BT extern GTY(()) tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT]; #define TARGET_SUPPORTS_WIDE_INT 1 + +/* Use custom descriptors instead of trampolines when possible if not AIX. */ +#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS (DEFAULT_ABI == ABI_AIX ? 0 : 1) Index: config/sparc/sparc.h =================================================================== --- config/sparc/sparc.h (revision 239944) +++ config/sparc/sparc.h (working copy) @@ -1817,3 +1817,6 @@ extern int sparc_indent_opcode; #define SPARC_LOW_FE_EXCEPT_VALUES 0 #define TARGET_SUPPORTS_WIDE_INT 1 + +/* Use custom descriptors instead of trampolines when possible. */ +#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 1 --nextPart2412547.hYACaNlPW5--