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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 May 2023 17:33:12.9719 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 54ca5a1d-d91b-44a7-4a38-08db50b3770c X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT041.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR08MB6050 X-Spam-Status: No, score=-12.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 5/9/23 19:31, Kyrylo Tkachov wrote: > > >> -----Original Message----- >> From: Christophe Lyon >> Sent: Tuesday, May 9, 2023 6:18 PM >> To: Kyrylo Tkachov ; gcc-patches@gcc.gnu.org; >> Richard Earnshaw ; Richard Sandiford >> >> Subject: Re: [PATCH 06/16] arm: add smax/smin expanders for v*hf >> >> >> >> On 5/9/23 15:48, Kyrylo Tkachov wrote: >>> >>> >>>> -----Original Message----- >>>> From: Christophe Lyon >>>> Sent: Tuesday, May 9, 2023 1:19 PM >>>> To: gcc-patches@gcc.gnu.org; Kyrylo Tkachov ; >>>> Richard Earnshaw ; Richard Sandiford >>>> >>>> Cc: Christophe Lyon >>>> Subject: [PATCH 06/16] arm: add smax/smin expanders for v*hf >>>> >>>> This patch adds the missing expanders for smax/smin for v*hf modes. >>>> >>>> 2022-09-08 Christophe Lyon >>>> >>>> gcc/ >>>> * config/arm/vec-common.md (smin3): New. >>>> (smax3): New. >>>> --- >>>> gcc/config/arm/vec-common.md | 14 ++++++++++++++ >>>> 1 file changed, 14 insertions(+) >>>> >>>> diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec- >>>> common.md >>>> index b5fc86fdf28..1f9b7992da4 100644 >>>> --- a/gcc/config/arm/vec-common.md >>>> +++ b/gcc/config/arm/vec-common.md >>>> @@ -116,6 +116,13 @@ (define_expand "smin3" >>>> "ARM_HAVE__ARITH" >>>> ) >>>> >>>> +(define_expand "smin3" >>>> + [(set (match_operand:VH 0 "s_register_operand") >>>> + (smin:VH (match_operand:VH 1 "s_register_operand") >>>> + (match_operand:VH 2 "s_register_operand")))] >>>> + "ARM_HAVE__ARITH" >>>> +) >>>> + >>>> (define_expand "umin3" >>>> [(set (match_operand:VINTW 0 "s_register_operand") >>>> (umin:VINTW (match_operand:VINTW 1 "s_register_operand") >>>> @@ -130,6 +137,13 @@ (define_expand "smax3" >>>> "ARM_HAVE__ARITH" >>>> ) >>>> >>>> +(define_expand "smax3" >>>> + [(set (match_operand:VH 0 "s_register_operand") >>>> + (smax:VH (match_operand:VH 1 "s_register_operand") >>>> + (match_operand:VH 2 "s_register_operand")))] >>>> + "ARM_HAVE__ARITH" >>>> +) >>> >>> We already have expanders for smin and smax, can we just extend their >> mode iterators to include the VH modes? >>> The ARM_HAVE__ARITH checks should still gate them properly and >> we could avoid adding more bloat in this file. >> >> I opted for the most localized changes, to avoid breaking Neon since >> there are already so many similar iterators ;-) >> >> It seems I can just use the existing VDQWH, which seems to be VALLW (as >> already used by smax) plus V8HF/V4HF which is just what we want. > > Yes, let's use that. > Thanks, I'll do that. OK to push with change, or do you want me to post the updated patch? >> >> Also, ISTM that VALLW == VDQW, am I misreading? > > They do look the same. I'm generally okay with removing duplicate iterators unless their name seems to have a very specific meaning that would be confusing in other contexts. > But VALLW and VDQW seem equally confusing 😉 Thanks for confirming the "confusing" bit :-) Christophe > Thanks, > KYrill > >> >> Thanks, >> >> Christophe >> >> >>> Thanks, >>> Kyrill >>> >>>> + >>>> (define_expand "umax3" >>>> [(set (match_operand:VINTW 0 "s_register_operand") >>>> (umax:VINTW (match_operand:VINTW 1 "s_register_operand") >>>> -- >>>> 2.34.1 >>>