From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qk1-x72b.google.com (mail-qk1-x72b.google.com [IPv6:2607:f8b0:4864:20::72b]) by sourceware.org (Postfix) with ESMTPS id 016A83858D37 for ; Mon, 23 Oct 2023 22:46:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 016A83858D37 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 016A83858D37 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::72b ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1698101193; cv=none; b=S4laEM1X2v0MuQZ/CXnC7rW8OJJo+I6qhqnwraV9uniopWMzpQxf0KnY1b+hoyVzdhrcs3p6WHb7gXtF6NPFo3i8bMJBSsu4LTZZS38d4hL3YXi2VJaGIankRBnkHQj66KrSJQ/PjtFs9TAJ73zWU+nIuHyVX9EftzkDXv/Slk4= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1698101193; c=relaxed/simple; bh=HeFmtLpYvY9q/ojZgoUboDFee8IbbiQcc7Rts3759oQ=; h=DKIM-Signature:Message-ID:Date:MIME-Version:Subject:To:From; b=mEKJ/Fy/zMxQBUyi5/+HapP6hMs5Id8FWe8/6VhHcHfS6W1MIl672iwN+L1W1l80x+nyw/xTE40/CYOnU8cBKXD7lzaFpp6odFMz+r8aAUq8Y40WSiGupCeSscubRYjOryhrCsB5uw+z/BZDc00TgHtOdqCWmsULwpvsgNxL2Z4= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-qk1-x72b.google.com with SMTP id af79cd13be357-7789577b53fso241416885a.3 for ; Mon, 23 Oct 2023 15:46:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1698101189; x=1698705989; darn=gcc.gnu.org; h=in-reply-to:from:references:cc:to:content-language:subject :user-agent:mime-version:date:message-id:from:to:cc:subject:date :message-id:reply-to; bh=SsmEaO+YIpGg8Ms+CoGVCsE3mVdISUocQpyU25Q9qvU=; b=DTYh7xF9IsVZohx93/wzDEcDLaoR3/g/TAPYQMOiAXC3P8+ssil42ykcbfHvkJKRFJ PaMoijgO7FiGB/c+w/l5X5qIByL3O9VCR6jabg3x92aPtA7S1CWCXtyPt1naY6Rhm9yQ 4eZH3ce8ofQQoncXho+Rmv6mmcUAWff+8R56eWuZcm+sQ56ntjDRDvCQL6Sxf4dVBlGq PJVDUviOFBWAb5GJTadOLinCL5mUhuyv1ElKjIUHeDluz/oF6Uk8o7w6hzOANwRYEaFr Od3WA5WcXpO+YpNh6ZP1DKBq0T4anN4QP4wJ8FlDQQhMVifPs+PREuGOZlUbOk6jEDaG M6XA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698101189; x=1698705989; h=in-reply-to:from:references:cc:to:content-language:subject :user-agent:mime-version:date:message-id:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=SsmEaO+YIpGg8Ms+CoGVCsE3mVdISUocQpyU25Q9qvU=; b=WkaUmkEAkDDpiywJbd0l7XHPwJdw5ysFxPQkNMpSrJxzNNPpQ85TpPBZRMCPXlYPkm 69h91qpl0vXtruuMASfew3Xbrk+I4nOFYMLo47YVfltrsX1rU2YjscZ8LQIByr5HAgI5 agMexj+59yKzhb2OHbhrMVo+14X4XQS8nEdEhPnOKvpAyrJDBTXhJxCX1x1Z+c67k+Ce DpK2ssYbzKOW1JKKObJD7l8lQdzYjjPsbHWynrVbOA4SmIdOJnUB4vmZ855RtDvZJeTz rikAL/zecQdxYRRwbN3DaY9wHskzycXOJgdQpZO1Ez5VeZ5Vrcy3y6yroH3z4PhB27AD vnjA== X-Gm-Message-State: AOJu0YwBko1RI1PQ46BvfbhadKgitp1IM8HyN0XbJlwTyyhaPThunjes HRLDZx5krbDFFw6z8i7HbZulmw== X-Google-Smtp-Source: AGHT+IHivdD1DQctwoWQY6zwff9Miak1pMo9vknhH0vx32U2lpaWnNC70B0/169b4Djq0GmEF4B+rQ== X-Received: by 2002:a05:620a:414a:b0:777:5d7:d62 with SMTP id k10-20020a05620a414a00b0077705d70d62mr13420247qko.13.1698101189231; Mon, 23 Oct 2023 15:46:29 -0700 (PDT) Received: from [10.0.17.156] ([208.116.208.98]) by smtp.gmail.com with ESMTPSA id b1-20020a05620a118100b0077438383a07sm3035050qkk.80.2023.10.23.15.46.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 Oct 2023 15:46:28 -0700 (PDT) Content-Type: multipart/alternative; boundary="------------907W3Tqc0vb9B5xDTwcjRA7e" Message-ID: <24afa372-3fc6-5e29-8aa5-dfa979985367@rivosinc.com> Date: Mon, 23 Oct 2023 15:46:25 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH V3 00/11] Refactor and cleanup vsetvl pass Content-Language: en-US To: =?UTF-8?B?6ZKf5bGF5ZOy?= , =?UTF-8?B?5LiB5LmQ5Y2O?= Cc: "kito.cheng" , "rdapp.gcc" , palmer , Jeff Law , gcc-patches References: <20231019083333.2052340-1-lehua.ding@rivai.ai> <17037AC761126CB1+2023101916505449794275@rivai.ai> <010dab03-b995-be03-8a73-241d7595452d@rivosinc.com> <511B7EAC877E7053+2023102405413061810991@rivai.ai> From: Patrick O'Neill In-Reply-To: <511B7EAC877E7053+2023102405413061810991@rivai.ai> X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,HTML_MESSAGE,KAM_SHORT,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This is a multi-part message in MIME format. --------------907W3Tqc0vb9B5xDTwcjRA7e Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit You're on top of it - thanks for fixing this! I'll send the testcase. Unrelated to this failure, I'm seeing a build failure on glibc rv32/64gcv when RTL checking is enabled. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111947 Thanks, Patrick On 10/23/23 14:41, 钟居哲 wrote: > I have fixed it: > https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=0c4bd1321a6def5eb44c530e83b01a415633b660 > > Plz verify it and send a patch with testcase pr111941.c if you confirm > it has been fixed on the trunk. > > Thanks. > ------------------------------------------------------------------------ > juzhe.zhong@rivai.ai > > *From:* Patrick O'Neill > *Date:* 2023-10-24 02:30 > *To:* Lehua Ding > *CC:* kito.cheng ; rdapp.gcc > ; palmer ; > Jeff Law ; gcc-patches > ; 钟居哲 > *Subject:* Re: [PATCH V3 00/11] Refactor and cleanup vsetvl pass > Hi Lehua, > This patch causes a build failure with newlib 4.1.0 with > -march=rv64gv_zbb. > I've creduced the failure here: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111941 > Thanks, > Patrick > On 10/19/23 20:58, Lehua Ding wrote: > > Committed, thanks Patrick and Juzhe. > > > > On 2023/10/20 2:04, Patrick O'Neill wrote: > >> I tested it this morning on my machine and it passed! > >> > >> Tested against: > >> 04d6c74564b7eb51660a00b35353aeab706b5a50 > >> > >> Using targets: > >> glibc rv32gcv qemu > >> glibc rv64gcv qemu > >> > >> This patch series does not introduce any new failures. > >> > >> Here's a list of *resolved* failures by this patch series: > >> rv64gcv: > >> FAIL: gfortran.dg/host_assoc_function_7.f90 -O3 > >> -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer > >> -finline-functions  execution test > >> FAIL: gfortran.dg/host_assoc_function_7.f90 -O3 -g  execution test > >> > >> rv32gcv: > >> FAIL: gcc.target/riscv/rvv/autovec/binop/narrow_run-1.c > execution test > >> FAIL: gfortran.dg/host_assoc_function_7.f90 -O3 > >> -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer > >> -finline-functions  execution test > >> FAIL: gfortran.dg/host_assoc_function_7.f90 -O3 -g  execution test > >> > >> Thanks for the quick revision Lehua! > >> > >> Tested-by: Patrick O'Neill > >> > >> Patrick > >> > >> On 10/19/23 01:50, 钟居哲 wrote: > >>> LGTM now. But wait for Patrick CI testing. > >>> > >>> Hi, @Patrick. Could you apply this patch and trigger CI in your > >>> github  so that we can see the full running result. > >>> > >>> Issues · patrick-rivos/riscv-gnu-toolchain · GitHub > >>> > >>> > >>> > ------------------------------------------------------------------------ > > >>> > >>> juzhe.zhong@rivai.ai > >>> > >>>     *From:* Lehua Ding > >>>     *Date:* 2023-10-19 16:33 > >>>     *To:* gcc-patches > >>>     *CC:* juzhe.zhong ; kito.cheng > >>> ; rdapp.gcc > >>> ; palmer ; > >>>     jeffreyalaw ; lehua.ding > >>> > >>>     *Subject:* [PATCH V3 00/11] Refactor and cleanup vsetvl pass > >>>     This patch refactors and cleanups the vsetvl pass in order > to make > >>>     the code > >>>     easier to modify and understand. This patch does several > things: > >>>     1. Introducing a virtual CFG for vsetvl infos and Phase 1, > 2 and 3 > >>>     only maintain > >>>        and modify this virtual CFG. Phase 4 performs insertion, > >>>     modification and > >>>        deletion of vsetvl insns based on the virtual CFG. The > Basic > >>>     block in the > >>>        virtual CFG is called vsetvl_block_info and the vsetvl > >>>     information inside > >>>        is called vsetvl_info. > >>>     2. Combine Phase 1 and 2 into a single Phase 1 and unified the > >>>     demand system, > >>>        this Phase only fuse local vsetvl info in forward > direction. > >>>     3. Refactor Phase 3, change the logic for determining > whether to > >>>     uplift vsetvl > >>>        info to a pred basic block to a more unified method > that there > >>>     is a vsetvl > >>>        info in the vsetvl defintion reaching in compatible > with it. > >>>     4. Place all modification operations to the RTL in Phase 4 and > >>>     Phase 5. > >>>        Phase 4 is responsible for inserting, modifying and > deleting > >>> vsetvl > >>>        instructions based on fully optimized vsetvl infos. Phase 5 > >>>     removes the avl > >>>        operand from the RVV instruction and removes the unused > dest > >>>     operand > >>>        register from the vsetvl insns. > >>>     These modifications resulted in some testcases needing to be > >>>     updated. The reasons > >>>     for updating are summarized below: > >>>     1. more optimized > >>> vlmax_back_prop-25.c/vlmax_back_prop-26.c/vlmax_conflict-3.c/ > >>> vlmax_conflict-12.c/vsetvl-13.c/vsetvl-23.c/ > >>> avl_single-23.c/avl_single-89.c/avl_single-95.c/pr109773-1.c > >>>     2. less unnecessary fusion > >>> avl_single-46.c/imm_bb_prop-1.c/pr109743-2.c/vsetvl-18.c > >>>     3. local fuse direction (backward -> forward) > >>>        scalar_move-1.c/ > >>>     4. add some bugfix testcases. > >>>        pr111037-3.c/pr111037-4.c > >>>        avl_single-89.c > >>>     PR target/111037 > >>>     PR target/111234 > >>>     PR target/111725 > >>>     Lehua Ding (11): > >>>       RISC-V: P1: Refactor > >>> avl_info/vl_vtype_info/vector_insn_info/vector_block_info > >>>       RISC-V: P2: Refactor and cleanup demand system > >>>       RISC-V: P3: Refactor vector_infos_manager > >>>       RISC-V: P4: move method from pass_vsetvl to pre_vsetvl > >>>       RISC-V: P5: combine phase 1 and 2 > >>>       RISC-V: P6: Add computing reaching definition data flow > >>>       RISC-V: P7: Move earliest fuse and lcm code to > pre_vsetvl class > >>>       RISC-V: P8: Refactor emit-vsetvl phase and delete post > >>> optimization > >>>       RISC-V: P9: Cleanup and reorganize helper functions > >>>       RISC-V: P10: Delete riscv-vsetvl.h and adjust > riscv-vsetvl.def > >>>       RISC-V: P11: Adjust and add testcases > >>> gcc/config/riscv/riscv-vsetvl.cc              | 6502 > >>> +++++++---------- > >>> gcc/config/riscv/riscv-vsetvl.def             |  641 +- > >>> gcc/config/riscv/riscv-vsetvl.h               |  488 -- > >>> gcc/config/riscv/t-riscv                      |    2 +- > >>> .../gcc.target/riscv/rvv/base/scalar_move-1.c |    2 +- > >>> .../riscv/rvv/vsetvl/avl_single-104.c         |   35 + > >>> .../riscv/rvv/vsetvl/avl_single-105.c         |   23 + > >>> .../riscv/rvv/vsetvl/avl_single-106.c         |   34 + > >>> .../riscv/rvv/vsetvl/avl_single-107.c         |   41 + > >>> .../riscv/rvv/vsetvl/avl_single-108.c         |   41 + > >>> .../riscv/rvv/vsetvl/avl_single-109.c         |   45 + > >>> .../riscv/rvv/vsetvl/avl_single-23.c          |    7 +- > >>> .../riscv/rvv/vsetvl/avl_single-46.c          |    3 +- > >>> .../riscv/rvv/vsetvl/avl_single-84.c          |    5 +- > >>> .../riscv/rvv/vsetvl/avl_single-89.c          |    8 +- > >>> .../riscv/rvv/vsetvl/avl_single-95.c          |    2 +- > >>> .../riscv/rvv/vsetvl/imm_bb_prop-1.c          |    7 +- > >>> .../gcc.target/riscv/rvv/vsetvl/pr109743-2.c  |    2 +- > >>> .../gcc.target/riscv/rvv/vsetvl/pr109773-1.c  |    2 +- > >>>     .../riscv/rvv/{base => vsetvl}/pr111037-1.c   |    0 > >>>     .../riscv/rvv/{base => vsetvl}/pr111037-2.c   |    0 > >>> .../gcc.target/riscv/rvv/vsetvl/pr111037-3.c  |   16 + > >>> .../gcc.target/riscv/rvv/vsetvl/pr111037-4.c  |   16 + > >>> .../riscv/rvv/vsetvl/vlmax_back_prop-25.c     |   10 +- > >>> .../riscv/rvv/vsetvl/vlmax_back_prop-26.c     |   10 +- > >>> .../riscv/rvv/vsetvl/vlmax_conflict-12.c      |    1 - > >>> .../riscv/rvv/vsetvl/vlmax_conflict-3.c       |    2 +- > >>> .../gcc.target/riscv/rvv/vsetvl/vsetvl-13.c   |    4 +- > >>> .../gcc.target/riscv/rvv/vsetvl/vsetvl-18.c   |    4 +- > >>> .../gcc.target/riscv/rvv/vsetvl/vsetvl-23.c   |    2 +- > >>>     30 files changed, 3263 insertions(+), 4692 deletions(-) > >>>     delete mode 100644 gcc/config/riscv/riscv-vsetvl.h > >>>     create mode 100644 > >>> gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-104.c > >>>     create mode 100644 > >>> gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-105.c > >>>     create mode 100644 > >>> gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-106.c > >>>     create mode 100644 > >>> gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-107.c > >>>     create mode 100644 > >>> gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-108.c > >>>     create mode 100644 > >>> gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-109.c > >>>     rename gcc/testsuite/gcc.target/riscv/rvv/{base => > >>>     vsetvl}/pr111037-1.c (100%) > >>>     rename gcc/testsuite/gcc.target/riscv/rvv/{base => > >>>     vsetvl}/pr111037-2.c (100%) > >>>     create mode 100644 > >>> gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-3.c > >>>     create mode 100644 > >>> gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-4.c > >>>     --     2.36.3 > >>> > > > --------------907W3Tqc0vb9B5xDTwcjRA7e--