From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 21368 invoked by alias); 30 Aug 2019 09:30:24 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 21350 invoked by uid 89); 30 Aug 2019 09:30:23 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-5.2 required=5.0 tests=AWL,BAYES_00,KAM_SHORT autolearn=ham version=3.3.1 spammy= X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 30 Aug 2019 09:30:20 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2A4AC344; Fri, 30 Aug 2019 02:30:19 -0700 (PDT) Received: from [10.2.206.47] (e120808-lin.cambridge.arm.com [10.2.206.47]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E30E83F718; Fri, 30 Aug 2019 02:30:17 -0700 (PDT) Subject: Re: [PATCH] Sanitizing the middle-end interface to the back-end for strict alignment To: Bernd Edlinger , Christophe Lyon Cc: Richard Biener , "gcc-patches@gcc.gnu.org" , Richard Earnshaw , Ramana Radhakrishnan , Eric Botcazou , Jeff Law , Jakub Jelinek References: <52c7ef9f-9fa2-6126-abf3-dc48c1a2d580@foss.arm.com> <86a19366-e1ee-87a4-9c5b-2fb1d32782a0@foss.arm.com> From: Kyrill Tkachov Message-ID: <24bf77e6-f924-e28c-068d-b4027ab55e4e@foss.arm.com> Date: Fri, 30 Aug 2019 10:07:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2019-08/txt/msg02055.txt.bz2 Hi Bernd, On 8/29/19 10:26 PM, Bernd Edlinger wrote: > On 8/29/19 11:08 AM, Christophe Lyon wrote: >> On Thu, 29 Aug 2019 at 10:58, Kyrill Tkachov >> wrote: >>> Hi Bernd, >>> >>> On 8/28/19 10:36 PM, Bernd Edlinger wrote: >>>> On 8/28/19 2:07 PM, Christophe Lyon wrote: >>>>> Hi, >>>>> >>>>> This patch causes an ICE when building libgcc's unwind-arm.o >>>>> when configuring GCC: >>>>> --target arm-none-linux-gnueabihf --with-mode thumb --with-cpu >>>>> cortex-a15 --with-fpu neon-vfpv4: >>>>> >>>>> The build works for the same target, but --with-mode arm --with-cpu >>>>> cortex a9 --with-fpu vfp >>>>> >>>>> In file included from >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/libgcc/config/arm/unwind-arm.c:144: >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/libgcc/unwind-arm-common.inc: >>>>> In function 'get_eit_entry': >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/libgcc/unwind-arm-common.inc:245:29: >>>>> warning: cast discards 'const' qualifier from pointer target type >>>>> [-Wcast-qual] >>>>> 245 | ucbp->pr_cache.ehtp = (_Unwind_EHT_Header *)&eitp->content; >>>>> | ^ >>>>> during RTL pass: expand >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/libgcc/unwind-arm-common.inc: >>>>> In function 'unwind_phase2_forced': >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/libgcc/unwind-arm-common.inc:319:18: >>>>> internal compiler error: in gen_movdi, at config/arm/arm.md:5235 >>>>> 319 | saved_vrs.core = entry_vrs->core; >>>>> | ~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~ >>>>> 0x126530f gen_movdi(rtx_def*, rtx_def*) >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/config/arm/arm.md:5235 >>>>> 0x896d92 insn_gen_fn::operator()(rtx_def*, rtx_def*) const >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/recog.h:318 >>>>> 0x896d92 emit_move_insn_1(rtx_def*, rtx_def*) >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:3694 >>>>> 0x897083 emit_move_insn(rtx_def*, rtx_def*) >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:3790 >>>>> 0xfc25d6 gen_cpymem_ldrd_strd(rtx_def**) >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/config/arm/arm.c:14582 >>>>> 0x126a1f1 gen_cpymemqi(rtx_def*, rtx_def*, rtx_def*, rtx_def*) >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/config/arm/arm.md:6688 >>>>> 0xb0bc08 maybe_expand_insn(insn_code, unsigned int, expand_operand*) >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/optabs.c:7440 >>>>> 0x89ba1e emit_block_move_via_cpymem >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:1808 >>>>> 0x89ba1e emit_block_move_hints(rtx_def*, rtx_def*, rtx_def*, >>>>> block_op_methods, unsigned int, long, unsigned long, unsigned long, >>>>> unsigned long, bool, bool*) >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:1627 >>>>> 0x89c383 emit_block_move(rtx_def*, rtx_def*, rtx_def*, block_op_methods) >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:1667 >>>>> 0x89fb4e store_expr(tree_node*, rtx_def*, int, bool, bool) >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:5845 >>>>> 0x88c1f9 store_field >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:7149 >>>>> 0x8a0c22 expand_assignment(tree_node*, tree_node*, bool) >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:5304 >>>>> 0x761964 expand_gimple_stmt_1 >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/cfgexpand.c:3779 >>>>> 0x761964 expand_gimple_stmt >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/cfgexpand.c:3875 >>>>> 0x768583 expand_gimple_basic_block >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/cfgexpand.c:5915 >>>>> 0x76abc6 execute >>>>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/cfgexpand.c:6538 >>>>> >>>>> Christophe >>>>> >>>> Okay, sorry for the breakage. >>>> >>>> What is happening in gen_cpymem_ldrd_strd is of course against the rules: >>>> >>>> It uses emit_move_insn on only 4-byte aligned DI-mode memory operands. >>>> >>>> I have a patch for this, which is able to fix the libgcc build on a cross, but have no >>>> possibility to bootstrap the affected target. >>>> >>>> Could you please help? >>> Well it's good that the sanitisation is catching the bugs! >>> > Yes, more than expected, though ;) > >>> Bootstrapping this patch I get another assert with the backtrace: >> Thanks for the additional testing, Kyrill! >> >> FWIW, my original report was with a failure to just build GCC for >> cortex-a15. I later got the reports of testing cross-toolchains, and >> saw other problems on cortex-a9 for instance. >> But I guess, you have noticed them with your bootstrap? >> on arm-linux-gnueabi >> gcc.target/arm/aapcs/align4.c (internal compiler error) >> gcc.target/arm/aapcs/align_rec4.c (internal compiler error) >> > This appears to be yet unknown middle-end bug (not fixed by current patch) > > $ arm-linux-gnueabihf-gcc align4.c > during RTL pass: expand > In file included from align4.c:22: > align4.c: In function 'testfunc': > abitest.h:73:42: internal compiler error: in gen_movv2si, at config/arm/vec-common.md:30 > 73 | #define LAST_ARG(type,val,offset) { type __x = val; if (memcmp(&__x, stack+offset, sizeof(type)) != 0) abort(); } > | ^~~ > abitest.h:74:30: note: in expansion of macro 'LAST_ARG' > 74 | #define ARG(type,val,offset) LAST_ARG(type, val, offset) > | ^~~~~~~~ > align4.c:26:3: note: in expansion of macro 'ARG' > 26 | ARG (unalignedvec, a, R2) > | ^~~ > 0x7bb33c gen_movv2si(rtx_def*, rtx_def*) > ../../gcc-trunk/gcc/config/arm/vec-common.md:30 > 0xa4a807 insn_gen_fn::operator()(rtx_def*, rtx_def*) const > ../../gcc-trunk/gcc/recog.h:318 > 0xa4a807 emit_move_insn_1(rtx_def*, rtx_def*) > ../../gcc-trunk/gcc/expr.c:3694 > 0xa4ab94 emit_move_insn(rtx_def*, rtx_def*) > ../../gcc-trunk/gcc/expr.c:3790 > 0xa522bf store_expr(tree_node*, rtx_def*, int, bool, bool) > ../../gcc-trunk/gcc/expr.c:5855 > 0xa52bfd expand_assignment(tree_node*, tree_node*, bool) > ../../gcc-trunk/gcc/expr.c:5441 > 0xa52bfd expand_assignment(tree_node*, tree_node*, bool) > ../../gcc-trunk/gcc/expr.c:4982 > 0x934adf expand_gimple_stmt_1 > ../../gcc-trunk/gcc/cfgexpand.c:3777 > 0x934adf expand_gimple_stmt > ../../gcc-trunk/gcc/cfgexpand.c:3875 > 0x93a451 expand_gimple_basic_block > ../../gcc-trunk/gcc/cfgexpand.c:5915 > 0x93c1b6 execute > ../../gcc-trunk/gcc/cfgexpand.c:6538 > Please submit a full bug report, > with preprocessed source if appropriate. > Please include the complete backtrace with any bug report. > See for instructions. > > >> (with -march=armv5t: gcc.dg/pr83930.c (internal compiler error)) >> > possibly fixed by latest patch. > >> on arm-linux-gnueabihf, in addition to align4/align_rec4: >> --with-cpu cortex-a9 >> --with-fpu neon-fp16 >> gcc.c-torture/execute/pr37573.c -O3 -fomit-frame-pointer >> -funroll-loops -fpeel-loops -ftracer -finline-functions (internal >> compiler error) >> gcc.c-torture/execute/pr37573.c -O3 -g (internal compiler error) >> gcc.dg/vect/fast-math-pr35982.c (internal compiler error) >> gcc.dg/vect/pr55857-1.c (internal compiler error) >> gcc.dg/vect/pr55857-1.c -flto -ffat-lto-objects (internal compiler error) >> gcc.dg/vect/pr55857-2.c (internal compiler error) >> gcc.dg/vect/pr55857-2.c -flto -ffat-lto-objects (internal compiler error) >> gcc.dg/vect/pr57558-2.c (internal compiler error) >> gcc.dg/vect/pr57558-2.c -flto -ffat-lto-objects (internal compiler error) >> >> and even more with other configs >> (http://people.linaro.org/~christophe.lyon/cross-validation/gcc/trunk/274986/report-build-info.html >> may help) >> >> Christophe >> >>> $BUILD/arm-none-linux-gnueabihf/libstdc++-v3/include/ext/concurrence.h: >>> In function '(static initializers for >>> $SRC/libstdc++-v3/libsupc++/eh_alloc.cc)': >>> $BUILD/arm-none-linux-gnueabihf/libstdc++-v3/include/ext/concurrence.h:129:5: >>> internal compiler error: in gen_movv8qi, at config/arm/vec-common.md:29 >>> 129 | { >>> | ^ >>> 0x14155cb gen_movv8qi(rtx_def*, rtx_def*) >>> $SRC/gcc/config/arm/vec-common.md:29 >>> 0x96bb89 insn_gen_fn::operator()(rtx_def*, rtx_def*) const >>> $SRC/gcc/recog.h:318 >>> 0x94bc95 emit_move_insn_1(rtx_def*, rtx_def*) >>> $SRC/gcc/expr.c:3694 >>> 0x94c05b emit_move_insn(rtx_def*, rtx_def*) >>> $SRC/gcc/expr.c:3790 >>> 0x10d5ee5 arm_block_set_aligned_vect >>> $SRC/gcc/config/arm/arm.c:30204 >>> 0x10d6b37 arm_block_set_vect >>> $SRC/gcc/config/arm/arm.c:30428 >>> 0x10d6caf arm_gen_setmem(rtx_def**) >>> $SRC/gcc/config/arm/arm.c:30458 >>> 0x140d7ed gen_setmemsi(rtx_def*, rtx_def*, rtx_def*, rtx_def*) >>> $SRC/gcc/config/arm/arm.md:6687 >>> 0xbf0e87 insn_gen_fn::operator()(rtx_def*, rtx_def*, rtx_def*, rtx_def*) >>> const >>> $SRC/gcc/recog.h:320 >>> 0xbf0999 maybe_gen_insn(insn_code, unsigned int, expand_operand*) >>> $SRC/gcc/optabs.c:7409 >>> 0xbf0b87 maybe_expand_insn(insn_code, unsigned int, expand_operand*) >>> $SRC/gcc/optabs.c:7440 >>> 0x94a709 set_storage_via_setmem(rtx_def*, rtx_def*, rtx_def*, unsigned >>> int, unsigned int, long long, unsigned long long, unsigned long long, >>> unsigned long long) >>> $SRC/gcc/expr.c:3168 >>> 0x94a059 clear_storage_hints(rtx_def*, rtx_def*, block_op_methods, >>> unsigned int, long long, unsigned long long, unsigned long long, >>> unsigned long long) >>> $SRC/gcc/expr.c:3037 >>> 0x94a137 clear_storage(rtx_def*, rtx_def*, block_op_methods) >>> $SRC/gcc/expr.c:3058 >>> 0x9537c5 store_constructor >>> $SRC/gcc/expr.c:6333 >>> 0x957227 store_field >>> $SRC/gcc/expr.c:7145 >>> 0x94fde1 expand_assignment(tree_node*, tree_node*, bool) >>> $SRC/gcc/expr.c:5301 >>> 0x815e25 expand_gimple_stmt_1 >>> $SRC/gcc/cfgexpand.c:3777 >>> 0x81611d expand_gimple_stmt >>> $SRC/gcc/cfgexpand.c:3875 >>> 0x81cd61 expand_gimple_basic_block >>> $SRC/gcc/cfgexpand.c:5915 >>> >>> Looks to me like arm_gen_setmem needs similar fixes to gen_cpymem_ldrd_strd? >>> > Yes, indeed, see attached patch. > > This seems to fix the bootstrap, but at least one other error remains, > however I think those do hopefully not break the boot-strap and can be > fixed with follow-up patches. > > Christophe can you please track the remaining regressions, that would be > very helpful. > > Attached is an updated patch version which should un-break the bootstrap issues. > Is it OK for trunk? > Yes, that fixes the bootstrap and testing looks ok, modulo the regressions Christophe listed. Ok with one change... +(define_insn "unaligned_storev8qi" + [(set (match_operand:V8QI 0 "memory_operand" "=Un") + (unspec:V8QI [(match_operand:V8QI 1 "s_register_operand" "w")] + UNSPEC_UNALIGNED_STORE))] + "TARGET_NEON" + "* + return output_move_neon (operands); + " + [(set_attr "length" "4") + (set_attr "type" "neon_store1_1reg")]) No need to specify the "length" here as it's 4 by default. Thanks, Kyrill > > Thanks > Bernd.