>> This I added in order to match the scalar variants like
 
 >>  [(set (match_operand:VI_QHS 0 "register_operand"      "=vd,vd, vr, vr")
>> (if_then_else:VI_QHS
>>   (unspec:<VM>
>>     [(match_operand:<VM> 1 "vector_mask_operand" "vm,vm,Wc1,Wc1")
 >>     (match_operand 5 "vector_length_operand"    "rK,rK, rK, rK")
>>      (match_operand 6 "const_int_operand"        " i, i,  i,  i")
>>      (match_operand 7 "const_int_operand"        " i, i,  i,  i")
 >>     (match_operand 8 "const_int_operand"        " i, i,  i,  i")
 >>     (reg:SI VL_REGNUM)
 >>     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
 >>  (any_commutative_binop:VI_QHS
 >>    (vec_duplicate:VI_QHS
 >>      (match_operand:<VEL> 4 "reg_or_0_operand"  "rJ,rJ, rJ, rJ"))
 
>> Any other way to get there?

No, you don't need to care about that. 
Intrinsic patterns are well designed, you just use "GET_MODE_INNER" which can
well handle that.

 >>     Hmm I see, the VOIDmode being abused as default might be confusing here.
 >>     Would an additional parameter like "bool set_op2_mode" make it clearer?
 >>     Another option is to separate this into another function altogether like
 >>     emit_len_binop_scalar or so.

No, you just use op2mode which you pass through.




juzhe.zhong@rivai.ai
 
From: Robin Dapp
Date: 2023-05-11 02:02
To: 钟居哲; gcc-patches; kito.cheng; Michael Collison; palmer; Jeff Law
Subject: Re: [PATCH] riscv: Add vectorized binops and insn_expander helpers.
> +      machine_mode op2mode = Pmode;
> +      if (inner == E_QImode || inner == E_HImode || inner == E_SImode)
> + op2mode = inner;
 
This I added in order to match the scalar variants like
 
  [(set (match_operand:VI_QHS 0 "register_operand"      "=vd,vd, vr, vr")
(if_then_else:VI_QHS
  (unspec:<VM>
    [(match_operand:<VM> 1 "vector_mask_operand" "vm,vm,Wc1,Wc1")
     (match_operand 5 "vector_length_operand"    "rK,rK, rK, rK")
     (match_operand 6 "const_int_operand"        " i, i,  i,  i")
     (match_operand 7 "const_int_operand"        " i, i,  i,  i")
     (match_operand 8 "const_int_operand"        " i, i,  i,  i")
     (reg:SI VL_REGNUM)
     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
  (any_commutative_binop:VI_QHS
    (vec_duplicate:VI_QHS
      (match_operand:<VEL> 4 "reg_or_0_operand"  "rJ,rJ, rJ, rJ"))
 
Any other way to get there?
 
> + e.add_input_operand (src2, op2mode == VOIDmode ? GET_MODE (src2) : op2mode);
> Very confusing here.
 
Hmm I see, the VOIDmode being abused as default might be confusing here.
Would an additional parameter like "bool set_op2_mode" make it clearer?
Another option is to separate this into another function altogether like
emit_len_binop_scalar or so.
 
> + <BINOP_TO_UPPERCASE> 
> change it into <CODE>
 
Done and removed the rest.
 
Thanks.