* [PATCH] Fix gcc.target/aarch64/sve/peel_ind_1.c for -mcmodel=tiny
@ 2018-01-24 16:40 Szabolcs Nagy
2018-01-24 20:20 ` Richard Sandiford
0 siblings, 1 reply; 4+ messages in thread
From: Szabolcs Nagy @ 2018-01-24 16:40 UTC (permalink / raw)
To: gcc-patches; +Cc: James Greenhalgh, Richard Sandiford, nd
[-- Attachment #1: Type: text/plain, Size: 650 bytes --]
Fix test failures with -mcmodel=tiny when adr is generated instead of adrp.
FAIL: gcc.target/aarch64/sve/peel_ind_1.c -march=armv8.2-a+sve scan-assembler \\tadrp\\tx[0-9]+, x\\n
FAIL: gcc.target/aarch64/sve/peel_ind_2.c -march=armv8.2-a+sve scan-assembler \\tadrp\\tx[0-9]+, x\\n
FAIL: gcc.target/aarch64/sve/peel_ind_3.c -march=armv8.2-a+sve scan-assembler \\tadrp\\tx[0-9]+, x\\n
gcc/testsuite/ChangeLog:
2018-01-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
* gcc.target/aarch64/sve/peel_ind_1.c: Match (adrp|adr) in scan-assembler.
* gcc.target/aarch64/sve/peel_ind_2.c: Likewise.
* gcc.target/aarch64/sve/peel_ind_3.c: Likewise.
[-- Attachment #2: tiny.diff --]
[-- Type: text/x-patch, Size: 1782 bytes --]
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c
index 864026499cd..a064c337b67 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c
@@ -21,7 +21,7 @@ foo (void)
}
/* We should operate on aligned vectors. */
-/* { dg-final { scan-assembler {\tadrp\tx[0-9]+, x\n} } } */
+/* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, x\n} } } */
/* We should use an induction that starts at -5, with only the last
7 elements of the first iteration being active. */
/* { dg-final { scan-assembler {\tindex\tz[0-9]+\.s, #-5, #5\n} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c
index 2bfc09a7602..f2113be90a7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c
@@ -17,6 +17,6 @@ foo (void)
}
/* We should operate on aligned vectors. */
-/* { dg-final { scan-assembler {\tadrp\tx[0-9]+, x\n} } } */
+/* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, x\n} } } */
/* We should unroll the loop three times. */
/* { dg-final { scan-assembler-times "\tst1w\t" 3 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c
index 8364dc6107a..441589eef60 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c
@@ -17,5 +17,5 @@ foo (int start)
}
/* We should operate on aligned vectors. */
-/* { dg-final { scan-assembler {\tadrp\tx[0-9]+, x\n} } } */
+/* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, x\n} } } */
/* { dg-final { scan-assembler {\tubfx\t} } } */
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] Fix gcc.target/aarch64/sve/peel_ind_1.c for -mcmodel=tiny
2018-01-24 16:40 [PATCH] Fix gcc.target/aarch64/sve/peel_ind_1.c for -mcmodel=tiny Szabolcs Nagy
@ 2018-01-24 20:20 ` Richard Sandiford
2018-01-26 11:16 ` Szabolcs Nagy
0 siblings, 1 reply; 4+ messages in thread
From: Richard Sandiford @ 2018-01-24 20:20 UTC (permalink / raw)
To: Szabolcs Nagy; +Cc: gcc-patches, James Greenhalgh, nd
Szabolcs Nagy <szabolcs.nagy@arm.com> writes:
> Fix test failures with -mcmodel=tiny when adr is generated instead of adrp.
>
> FAIL: gcc.target/aarch64/sve/peel_ind_1.c -march=armv8.2-a+sve
> scan-assembler \\tadrp\\tx[0-9]+, x\\n
> FAIL: gcc.target/aarch64/sve/peel_ind_2.c -march=armv8.2-a+sve
> scan-assembler \\tadrp\\tx[0-9]+, x\\n
> FAIL: gcc.target/aarch64/sve/peel_ind_3.c -march=armv8.2-a+sve
> scan-assembler \\tadrp\\tx[0-9]+, x\\n
>
> gcc/testsuite/ChangeLog:
>
> 2018-01-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
>
> * gcc.target/aarch64/sve/peel_ind_1.c: Match (adrp|adr) in scan-assembler.
> * gcc.target/aarch64/sve/peel_ind_2.c: Likewise.
> * gcc.target/aarch64/sve/peel_ind_3.c: Likewise.
LGTM FWIW. Thanks for fixing this!
Richard
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] Fix gcc.target/aarch64/sve/peel_ind_1.c for -mcmodel=tiny
2018-01-24 20:20 ` Richard Sandiford
@ 2018-01-26 11:16 ` Szabolcs Nagy
0 siblings, 0 replies; 4+ messages in thread
From: Szabolcs Nagy @ 2018-01-26 11:16 UTC (permalink / raw)
To: gcc-patches, James Greenhalgh, richard.sandiford; +Cc: nd
On 24/01/18 20:10, Richard Sandiford wrote:
> Szabolcs Nagy <szabolcs.nagy@arm.com> writes:
>> Fix test failures with -mcmodel=tiny when adr is generated instead of adrp.
>>
>> FAIL: gcc.target/aarch64/sve/peel_ind_1.c -march=armv8.2-a+sve
>> scan-assembler \\tadrp\\tx[0-9]+, x\\n
>> FAIL: gcc.target/aarch64/sve/peel_ind_2.c -march=armv8.2-a+sve
>> scan-assembler \\tadrp\\tx[0-9]+, x\\n
>> FAIL: gcc.target/aarch64/sve/peel_ind_3.c -march=armv8.2-a+sve
>> scan-assembler \\tadrp\\tx[0-9]+, x\\n
>>
>> gcc/testsuite/ChangeLog:
>>
>> 2018-01-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
>>
>> * gcc.target/aarch64/sve/peel_ind_1.c: Match (adrp|adr) in scan-assembler.
>> * gcc.target/aarch64/sve/peel_ind_2.c: Likewise.
>> * gcc.target/aarch64/sve/peel_ind_3.c: Likewise.
>
> LGTM FWIW. Thanks for fixing this!
>
committed as obvious.
^ permalink raw reply [flat|nested] 4+ messages in thread
[parent not found: <0ad0665b-f399-00bb-da98-c3966815d821@arm.com>]
* Re: [PATCH] Fix gcc.target/aarch64/sve/peel_ind_1.c for -mcmodel=tiny
[not found] <0ad0665b-f399-00bb-da98-c3966815d821@arm.com>
@ 2018-02-01 10:21 ` James Greenhalgh
0 siblings, 0 replies; 4+ messages in thread
From: James Greenhalgh @ 2018-02-01 10:21 UTC (permalink / raw)
To: Szabolcs Nagy; +Cc: gcc-patches, Richard Sandiford, nd
On Wed, Jan 24, 2018 at 04:28:13PM +0000, Szabolcs Nagy wrote:
> Fix test failures with -mcmodel=tiny when adr is generated instead of adrp.
>
> FAIL: gcc.target/aarch64/sve/peel_ind_1.c -march=armv8.2-a+sve scan-assembler \\tadrp\\tx[0-9]+, x\\n
> FAIL: gcc.target/aarch64/sve/peel_ind_2.c -march=armv8.2-a+sve scan-assembler \\tadrp\\tx[0-9]+, x\\n
> FAIL: gcc.target/aarch64/sve/peel_ind_3.c -march=armv8.2-a+sve scan-assembler \\tadrp\\tx[0-9]+, x\\n
I can't tell if this is a request for a review, or if you commited it
as obvious, but this is OK.
James
>
> gcc/testsuite/ChangeLog:
>
> 2018-01-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
>
> * gcc.target/aarch64/sve/peel_ind_1.c: Match (adrp|adr) in scan-assembler.
> * gcc.target/aarch64/sve/peel_ind_2.c: Likewise.
> * gcc.target/aarch64/sve/peel_ind_3.c: Likewise.
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c
> index 864026499cd..a064c337b67 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c
> @@ -21,7 +21,7 @@ foo (void)
> }
>
> /* We should operate on aligned vectors. */
> -/* { dg-final { scan-assembler {\tadrp\tx[0-9]+, x\n} } } */
> +/* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, x\n} } } */
> /* We should use an induction that starts at -5, with only the last
> 7 elements of the first iteration being active. */
> /* { dg-final { scan-assembler {\tindex\tz[0-9]+\.s, #-5, #5\n} } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c
> index 2bfc09a7602..f2113be90a7 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c
> @@ -17,6 +17,6 @@ foo (void)
> }
>
> /* We should operate on aligned vectors. */
> -/* { dg-final { scan-assembler {\tadrp\tx[0-9]+, x\n} } } */
> +/* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, x\n} } } */
> /* We should unroll the loop three times. */
> /* { dg-final { scan-assembler-times "\tst1w\t" 3 } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c
> index 8364dc6107a..441589eef60 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c
> @@ -17,5 +17,5 @@ foo (int start)
> }
>
> /* We should operate on aligned vectors. */
> -/* { dg-final { scan-assembler {\tadrp\tx[0-9]+, x\n} } } */
> +/* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, x\n} } } */
> /* { dg-final { scan-assembler {\tubfx\t} } } */
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-02-01 10:21 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-01-24 16:40 [PATCH] Fix gcc.target/aarch64/sve/peel_ind_1.c for -mcmodel=tiny Szabolcs Nagy
2018-01-24 20:20 ` Richard Sandiford
2018-01-26 11:16 ` Szabolcs Nagy
[not found] <0ad0665b-f399-00bb-da98-c3966815d821@arm.com>
2018-02-01 10:21 ` James Greenhalgh
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).