From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 45398 invoked by alias); 2 Oct 2018 14:22:19 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 45387 invoked by uid 89); 2 Oct 2018 14:22:18 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,KAM_SHORT,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 02 Oct 2018 14:22:12 +0000 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 596C67F6B0; Tue, 2 Oct 2018 14:22:11 +0000 (UTC) Received: from localhost.localdomain (ovpn-112-4.rdu2.redhat.com [10.10.112.4]) by smtp.corp.redhat.com (Postfix) with ESMTP id DA1F260CD3; Tue, 2 Oct 2018 14:22:09 +0000 (UTC) Subject: Re: [PATCH 0/2][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register To: Peter Bergner , "H.J. Lu" Cc: Vladimir Makarov , GCC Patches References: <616affd5-5140-8e15-9081-1635f7d4e700@redhat.com> <6ff45a7e-2415-2d18-1d53-5a50964a2174@linux.ibm.com> From: Jeff Law Openpgp: preference=signencrypt Message-ID: <28723aee-246d-353e-4484-91502c889d34@redhat.com> Date: Tue, 02 Oct 2018 14:50:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2018-10/txt/msg00098.txt.bz2 On 10/1/18 9:52 PM, Peter Bergner wrote: > On 10/1/18 7:45 AM, H.J. Lu wrote: >> You may have undone: >> >> https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=218059 > > Yes, the code above also needed to be modified to handle conflicts being > added at definitions rather than at uses. The patch below does that. > I don't really have access to a i686 (ie, 32-bit) system to test on and > I'm not sure how to force the test to be run in 32-bit mode on a 64-bit > build, but it does fix the assembler for the pr63534.c test case. > > That said, looking at the rtl for the test case, I see the following > before RA: > > (insn 5 2 6 2 (set (reg:SI 3 bx) > (reg:SI 82)) "pr63534.c":10 85 {*movsi_internal} > (nil)) > (call_insn 6 5 7 2 (call (mem:QI (symbol_ref:SI ("bar") [flags 0x41] ) [0 barD.1498 S1 A8]) > (const_int 0 [0])) "pr63534.c":10 687 {*call} > (expr_list:REG_DEAD (reg:SI 3 bx) > (expr_list:REG_CALL_DECL (symbol_ref:SI ("bar") [flags 0x41] ) > (nil))) > (expr_list (use (reg:SI 3 bx)) > (nil))) > (insn 7 6 8 2 (set (reg:SI 3 bx) > (reg:SI 82)) "pr63534.c":11 85 {*movsi_internal} > (expr_list:REG_DEAD (reg:SI 82) > (nil))) > (call_insn 8 7 0 2 (call (mem:QI (symbol_ref:SI ("bar") [flags 0x41] ) [0 barD.1498 S1 A8]) > (const_int 0 [0])) "pr63534.c":11 687 {*call} > (expr_list:REG_DEAD (reg:SI 3 bx) > (expr_list:REG_CALL_DECL (symbol_ref:SI ("bar") [flags 0x41] ) > (nil))) > (expr_list (use (reg:SI 3 bx)) > (nil))) > > Now that we handle conflicts at definitions and the pic hard reg > is set via a copy from the pic pseudo, my PATCH 2 is setup to > handle exactly this scenario (ie, a copy between a pseudo and > a hard reg). I looked at the asm output from a build with both > PATCH 1 and PATCH 2, and yes, it also does not add the conflict > between the pic pseudo and pic hard reg, so our other option to > fix PR87479 is to apply PATCH 2. However, since PATCH 2 handles > the pic pseudo and pic hard reg conflict itself, that means we > don't need the special pic conflict code and it can be removed! > I'm going to update PATCH 2 to remove that pic handling code > and send it through bootstrap and regtesting. > > H.J., can you confirm that the following patch not only fixes > the bug you opened, but also doesn't introduce any more? > Once I've updated PATCH 2, I'd like you to test/bless that > one as well. Thanks. Haven't looked at the patch yet. The easiest (but not fastest) way to build i686 native is gcc45 in the build farm. Jeff