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From: Peter Bergner <bergner@linux.ibm.com>
To: Segher Boessenkool <segher@kernel.crashing.org>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: rs6000: Generate an lxvp instead of two adjacent lxv instructions
Date: Wed, 14 Jul 2021 16:12:25 -0500	[thread overview]
Message-ID: <2896ae82-3427-68ba-5b24-aa96c0168b3d@linux.ibm.com> (raw)
In-Reply-To: <20210713225945.GW1583@gate.crashing.org>

On 7/13/21 5:59 PM, Segher Boessenkool wrote:
>> -		  && adjacent_mem_locations (str_mem, str_mem2))
>> +		  && adjacent_mem_locations (str_mem, str_mem2) != NULL_RTX)
> 
> ... so don't change this?  Or write != 0 != 0 != 0, if one time is good,
> three times must be better!  :-)

Ok, consider those two changes reverted and will leave the code as is.




> So we are sure we have a hard register here, and it is a VSX register.
> Okay.  Factoring this code would not hurt ;-)

Yes, we have asserts above that ensure we have regs and that they
are of the correct type (ie, FP or VSX register) depending on the
mode.

I'll make the change above and rebuild just to be safe and then commit.
Thanks.

Peter




  reply	other threads:[~2021-07-14 21:12 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-08 22:01 Peter Bergner
2021-07-08 23:28 ` Segher Boessenkool
2021-07-09  1:26   ` Peter Bergner
2021-07-09 15:33     ` Segher Boessenkool
2021-07-09 23:14     ` Peter Bergner
2021-07-10  2:51       ` Peter Bergner
2021-07-11  0:39       ` segher
2021-07-13 17:09         ` Peter Bergner
2021-07-13 22:42           ` Segher Boessenkool
2021-07-13 17:14         ` Peter Bergner
2021-07-13 18:52           ` Peter Bergner
2021-07-13 22:59           ` Segher Boessenkool
2021-07-14 21:12             ` Peter Bergner [this message]
2021-07-15 14:15               ` Peter Bergner
2021-07-15 15:56                 ` Segher Boessenkool

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