From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 14C1C385802E for ; Wed, 14 Jul 2021 21:12:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 14C1C385802E Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 16EL3Yxm087433; Wed, 14 Jul 2021 17:12:28 -0400 Received: from ppma03dal.us.ibm.com (b.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.11]) by mx0a-001b2d01.pphosted.com with ESMTP id 39t4ffn7qe-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 14 Jul 2021 17:12:27 -0400 Received: from pps.filterd (ppma03dal.us.ibm.com [127.0.0.1]) by ppma03dal.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 16EL9qZ5001673; Wed, 14 Jul 2021 21:12:27 GMT Received: from b01cxnp23034.gho.pok.ibm.com (b01cxnp23034.gho.pok.ibm.com [9.57.198.29]) by ppma03dal.us.ibm.com with ESMTP id 39rkgvtxf1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 14 Jul 2021 21:12:27 +0000 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 16ELCQrK31326612 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 14 Jul 2021 21:12:26 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4CE30AE066; Wed, 14 Jul 2021 21:12:26 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E50ADAE05F; Wed, 14 Jul 2021 21:12:25 +0000 (GMT) Received: from [9.65.206.231] (unknown [9.65.206.231]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Wed, 14 Jul 2021 21:12:25 +0000 (GMT) Subject: Re: rs6000: Generate an lxvp instead of two adjacent lxv instructions To: Segher Boessenkool Cc: GCC Patches References: <20210708232836.GT1583@gate.crashing.org> <680c1d6a-0662-f609-f0b5-2547011ea4b6@linux.ibm.com> <43d74cc8-2019-8173-7bdb-110bb5dc3e29@linux.ibm.com> <20210711003921.GA1583@gate.crashing.org> <269df715-1ced-b0fe-df9d-d88efa810944@linux.ibm.com> <20210713225945.GW1583@gate.crashing.org> From: Peter Bergner Message-ID: <2896ae82-3427-68ba-5b24-aa96c0168b3d@linux.ibm.com> Date: Wed, 14 Jul 2021 16:12:25 -0500 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210713225945.GW1583@gate.crashing.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: y13chR9Ayigy0tQMxcWbG9ooUUJL0D5B X-Proofpoint-GUID: y13chR9Ayigy0tQMxcWbG9ooUUJL0D5B X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-14_11:2021-07-14, 2021-07-14 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 mlxlogscore=652 mlxscore=0 adultscore=0 clxscore=1015 bulkscore=0 spamscore=0 phishscore=0 priorityscore=1501 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2107140126 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, NICE_REPLY_A, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 14 Jul 2021 21:12:30 -0000 On 7/13/21 5:59 PM, Segher Boessenkool wrote: >> - && adjacent_mem_locations (str_mem, str_mem2)) >> + && adjacent_mem_locations (str_mem, str_mem2) != NULL_RTX) > > ... so don't change this? Or write != 0 != 0 != 0, if one time is good, > three times must be better! :-) Ok, consider those two changes reverted and will leave the code as is. > So we are sure we have a hard register here, and it is a VSX register. > Okay. Factoring this code would not hurt ;-) Yes, we have asserts above that ensure we have regs and that they are of the correct type (ie, FP or VSX register) depending on the mode. I'll make the change above and rebuild just to be safe and then commit. Thanks. Peter