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From: Jeff Law <jeffreyalaw@gmail.com>
To: Jivan Hakobyan <jivanhakobyan9@gmail.com>, gcc-patches@gcc.gnu.org
Subject: Re: [RFC] RISC-V: Eliminate extension after for *w instructions
Date: Tue, 30 May 2023 18:49:10 -0600	[thread overview]
Message-ID: <28bd33c8-8bbd-aacc-fc23-661b61a01105@gmail.com> (raw)
In-Reply-To: <CAHso6sOjw7vr0+OjTN4BB0DZ6=egk4r81affnLAXD0-xKwDpVQ@mail.gmail.com>



On 5/24/23 17:14, Jivan Hakobyan via Gcc-patches wrote:

> 
> gcc/ChangeLog:
>          * config/riscv/bitmanip.md (rotrdi3): New pattern.
>          (rotrsi3): Likewise.
>          (rotlsi3): Likewise.
>          * config/riscv/riscv-protos.h (riscv_emit_binary): New function
>          declaration
>          * config/riscv/riscv.cc (riscv_emit_binary): Removed static
>          * config/riscv/riscv.md (addsi3): New pattern
>          (subsi3): Likewise.
>          (negsi2): Likewise.
>          (mulsi3): Likewise.
>          (<optab>si3): New pattern for any_div.
>          (<optab>si3): New pattern for any_shift.
>          * loop-iv.cc (get_biv_step_1):  Process src of extension when it
> PLUS
> 
> gcc/testsuite/ChangeLog:
>          * testsuite/gcc.target/riscv/shift-and-2.c: New test
>          * testsuite/gcc.target/riscv/shift-shift-2.c: New test
>          * testsuite/gcc.target/riscv/sign-extend.c: New test
>          * testsuite/gcc.target/riscv/zbb-rol-ror-03.c: New test
> 
> 
> -- With the best regards Jivan Hakobyan
> 
> 

> diff --git a/gcc/loop-iv.cc b/gcc/loop-iv.cc
> index 6c40db947f7f549303f8bb4d4f38aa98b6561bcc..bec1ea7e4ccf7291bb3dba91161f948e66c7bea9 100644
> --- a/gcc/loop-iv.cc
> +++ b/gcc/loop-iv.cc
> @@ -637,7 +637,7 @@ get_biv_step_1 (df_ref def, scalar_int_mode outer_mode, rtx reg,
>   {
>     rtx set, rhs, op0 = NULL_RTX, op1 = NULL_RTX;
>     rtx next, nextr;
> -  enum rtx_code code;
> +  enum rtx_code code, prev_code;
>     rtx_insn *insn = DF_REF_INSN (def);
>     df_ref next_def;
>     enum iv_grd_result res;
> @@ -697,6 +697,23 @@ get_biv_step_1 (df_ref def, scalar_int_mode outer_mode, rtx reg,
>   	return false;
>   
>         op0 = XEXP (rhs, 0);
> +
> +      if (GET_CODE (op0) == PLUS)
> +        {
> +          rhs = op0;
> +          op0 = XEXP (rhs, 0);
> +          op1 = XEXP (rhs, 1);
> +
> +          if (CONSTANT_P (op0))
> +            std::swap (op0, op1);
> +
> +          if (!simple_reg_p (op0) || !CONSTANT_P (op1))
> +            return false;
> +
> +          prev_code = code;
> +          code = PLUS;
> +        }
> +
>         if (!simple_reg_p (op0))
>   	return false;
>   
> @@ -769,6 +786,11 @@ get_biv_step_1 (df_ref def, scalar_int_mode outer_mode, rtx reg,
>         else
>   	*outer_step = simplify_gen_binary (code, outer_mode,
>   					   *outer_step, op1);
> +
> +      if (prev_code == SIGN_EXTEND)
> +        *extend = IV_SIGN_EXTEND;
> +      else if (prev_code == ZERO_EXTEND)
> +        *extend = IV_ZERO_EXTEND;
>         break;
So I'm still working through the basics of loop-iv.cc, but one thing I 
did notice is that prev_code may be used without being properly initialized.

You should probably initialize it to "UNKNOWN".

Jeff

  reply	other threads:[~2023-05-31  0:49 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-24 23:14 Jivan Hakobyan
2023-05-31  0:49 ` Jeff Law [this message]
2023-06-04  3:59 ` Jeff Law
2023-06-07 20:00 ` Jeff Law

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