Re: [PATCH] RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert

[Lehua Ding <lehua.ding@rivai.ai>]

Hi Jeff,

On 2023/9/12 11:47, Jeff Law wrote:
> But that condition is _not_ generally sufficient to prevent these insns 
> from existing during sched1.  ie, a pass between split1 and sched1 could 
> create these patterns and successfully match them.  That in turn would 
> trigger the assertion.
> 
> can_create_pseudo_p is true up through the register allocator.  As a 
> result a condition like TARGET_VECTOR && can_create_pseudo_p() is _not_ 
> sufficient to ensure the pattern does not exist during sched1.  While no 
> pass likely creates these kinds of insns right now in that window 
> between split1 and sched1, there's no guarantee that will always be true.

But if a pass between split1 and sched1 creates these patterns, then an 
unrecognized error will throw after reload. Is that right? That is to 
say, this insn patterns is designed to exist only before split1, but now 
the conditions are a little looser, a little tighter is better if we 
can. If this is the case, I feel it makes no difference whether the 
error is thrwoed by sched pass or a pass after reload.

> The simple rule is easy to follow.  Every insn should have a type.  That 
> also gives us a degree of future-proof, even if someone adds additional 
> passes/capabilities between split1 and sched1.

However, adding content that you don't need feels even more difficult to 
understand, and this is just my feeling. It would be clearer if we could 
set the type according to the purpose of the insn pattern.

-- 
Best,
Lehua