From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 0684E3858D3C; Mon, 28 Nov 2022 01:50:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0684E3858D3C Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2AS1mrp2031440; Mon, 28 Nov 2022 01:50:50 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=pp1; bh=5ukddOGLQ0Xm4C42E8bt/7feVsHgcq4IVEkGg6HHPSs=; b=c+DN+1xSSRyqnLY31vNRpgj0CzY9P42qP3YWIoofefVGEOw4CC51MB1qwyPOTCnTuSYS F+AvQbcmjLDA9DIc3un7MV6/7quIEyEW/tX/V3zRUTvjZNdQnGa5uMZMQLfVHzvvsMq+ NDgpJh16bkR/Gw/nPk8DQKb98FAwLHgDAUErMnjxzsI5oeLnnb8Fk/R1LtQU+Mc1+BuF GiDbYkIntnJjkkrMlMvTZCextV1ijHUmkRNov+SL+qjmi+ICB7ArU1WADDj5eXV6Cbv8 VHdMLKD/NSQrfuh11sM3zBhJFckjF74pdUmMGtnp5yB4AUy0sO+wGdCK5ZMpJVSFe6gR pQ== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3m3vn6tuf4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Nov 2022 01:50:50 +0000 Received: from m0098421.ppops.net (m0098421.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 2AS1oRog010943; Mon, 28 Nov 2022 01:50:49 GMT Received: from ppma02fra.de.ibm.com (47.49.7a9f.ip4.static.sl-reverse.com [159.122.73.71]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3m3vn6tues-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Nov 2022 01:50:49 +0000 Received: from pps.filterd (ppma02fra.de.ibm.com [127.0.0.1]) by ppma02fra.de.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 2AS1b29b001811; Mon, 28 Nov 2022 01:50:47 GMT Received: from b06avi18626390.portsmouth.uk.ibm.com (b06avi18626390.portsmouth.uk.ibm.com [9.149.26.192]) by ppma02fra.de.ibm.com with ESMTP id 3m3ae91afj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Nov 2022 01:50:47 +0000 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 2AS1iLJY11666138 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 28 Nov 2022 01:44:21 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 75EDCA4060; Mon, 28 Nov 2022 01:50:45 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6B3F6A405B; Mon, 28 Nov 2022 01:50:43 +0000 (GMT) Received: from [9.200.36.84] (unknown [9.200.36.84]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 28 Nov 2022 01:50:42 +0000 (GMT) Message-ID: <2de1185f-8de0-85a8-3d84-121f31fbd630@linux.ibm.com> Date: Mon, 28 Nov 2022 09:50:41 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Subject: Re: [PATCH]rs6000: Load high and low part of 64bit constant independently Content-Language: en-US To: Segher Boessenkool Cc: dje.gcc@gmail.com, linkw@gcc.gnu.org, gcc-patches@gcc.gnu.org, Jiufu Guo References: <20220915083052.74903-1-guojiufu@linux.ibm.com> <7b482d49-3928-552c-ccf5-d391684b7f2b@linux.ibm.com> <7ev8n3p3u6.fsf@pike.rch.stglabs.ibm.com> <20221125154603.GH25951@gate.crashing.org> From: "Kewen.Lin" In-Reply-To: <20221125154603.GH25951@gate.crashing.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: WUNnkibTsSVzpIaKFtR-J3zmWmFu9FJZ X-Proofpoint-ORIG-GUID: QtZqtFNrMBXB45n-p9mh9Dm61B6jKP2s X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-27_10,2022-11-25_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxscore=0 suspectscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 mlxlogscore=872 phishscore=0 clxscore=1015 bulkscore=0 malwarescore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211280010 X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,KAM_SHORT,NICE_REPLY_A,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi Segher, on 2022/11/25 23:46, Segher Boessenkool wrote: > Hi! > > On Fri, Nov 25, 2022 at 09:21:21PM +0800, Jiufu Guo wrote: >> "Kewen.Lin" writes: >>> on 2022/9/15 16:30, Jiufu Guo wrote: >>>> For a complicate 64bit constant, blow is one instruction-sequence to >>>> build: >>>> lis 9,0x800a >>>> ori 9,9,0xabcd >>>> sldi 9,9,32 >>>> oris 9,9,0xc167 >>>> ori 9,9,0xfa16 >>>> >>>> while we can also use below sequence to build: >>>> lis 9,0xc167 >>>> lis 10,0x800a >>>> ori 9,9,0xfa16 >>>> ori 10,10,0xabcd >>>> rldimi 9,10,32,0 >>>> This sequence is using 2 registers to build high and low part firstly, >>>> and then merge them. >>>> In parallel aspect, this sequence would be faster. (Ofcause, using 1 more >>>> register with potential register pressure). > > And crucially this patch only uses two registers if can_create_pseudo_p. > Please mention that. > >>>> * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Update 64bit >>>> constant build. > > If you don't give details of what this does, just say "Update." please. > But update to what? > > "Generate more parallel code if can_create_pseudo_p." maybe? > >>>> + rtx H = gen_reg_rtx (DImode); >>>> + rtx L = gen_reg_rtx (DImode); > > Please don't use all-uppercase variable names, those are for macros. In > fact, don't use uppercase in variable (and function etc.) names at all, > unless there is a really good reason to. > > Just call it "high" and "low", or "hi" and "lo", or something? > >>>> --- /dev/null >>>> +++ b/gcc/testsuite/gcc.target/powerpc/parall_5insn_const.c >>>> @@ -0,0 +1,27 @@ >>>> +/* { dg-do run } */ >>>> +/* { dg-options "-O2 -mdejagnu-cpu=power7 -save-temps" } */ >>> >>> Why do we need power7 here? >> power8/9 are also ok for this case. Actually, O just want to >> avoid to use new p10 instruction, like "pli", and then selected >> an old arch option. > > Why does it need _at least_ p7, is the question (as I understand it). > Yeah, that's what I was intended to ask, since those insns to be scanned don't actually require Power7 or later. > To prohibit pli etc. you can do -mno-prefixed (which works on all older > CPUs just as well), or skip the test if prefixed insns are enabled, or > scan for the then generated code as well. The first option is by far > the simplest. Yeah, using -mno-prefixed is perfect here, nice! BR, Kewen