Hi, In most target, it is limited to issue two insns with change the same register. So a register is not realy unused if there is another insn, which set the register in the save VLIW. For example, The insn 73 start with insn:TI, so it will be issued together with others insns until a new insn start with insn:TI, here is insn 243. The regrename pass known the mode V2VF in insn 73 need two successive registers, i.e. v2 and v3, here is dump snippet before the regrename: ========================================================================================== (insn:TI 73 76 71 4 (set (reg/v:V2VF 37 v2 [orig:180 _62 ] [180]) (unspec:V2VF [ (reg/v:VHF 43 v8 [orig:210 Dest_value ] [210]) (reg/v:VHF 43 v8 [orig:210 Dest_value ] [210]) ] UNSPEC_HFSQMAG_32X32)) "../test_modify.c":57 710 {hfsqmag_v2vf} (expr_list:REG_DEAD (reg/v:VHF 43 v8 [orig:210 Dest_value ] [210]) (expr_list:REG_UNUSED (reg:VHF 38 v3) (expr_list:REG_STAGE (const_int 2 [0x2]) (expr_list:REG_CYCLE (const_int 2 [0x2]) (expr_list:REG_UNITS (const_int 256 [0x100]) (nil))))))) (insn 71 73 243 4 (set (reg:VHF 43 v8 [orig:265 MEM[(const vfloat32x16 *)Src_base_134] ] [265]) (mem:VHF (reg/v/f:DI 13 a13 [orig:207 Src_base ] [207]) [1 MEM[(const vfloat32x16 *)Src_base_134]+0 S64 A512])) "../test_modify.c":56 450 {movvhf_internal} (expr_list:REG_STAGE (const_int 1 [0x1]) (expr_list:REG_CYCLE (const_int 2 [0x2]) (nil)))) (insn:TI 243 … Then, in the regrename, the insn 71 will be transformed as following code with register v3, and there is an conflict between insn 73 and insn 71 (as both of them set the v3 register). Register v2 (2): 73 [SVEC_REGS] Register v8 (1): 71 [VEC_ALL_REGS] .... (insn 71 73 243 4 (set (reg:VHF 38 v3 [orig:265 MEM[(const vfloat32x16 *)Src_base_134] ] [265]) (mem:VHF (reg/v/f:DI 13 a13 [orig:207 Src_base ] [207]) [1 MEM[(const vfloat32x16 *)Src_base_134]+0 S64 A512])) "../test_modify.c":56 450 {movvhf_internal} (expr_list:REG_STAGE (const_int 1 [0x1]) (expr_list:REG_CYCLE (const_int 2 [0x2])