From: "Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com>
To: Uros Bizjak <ubizjak@gmail.com>,
Richard Biener <rguenther@suse.de>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
richard.sandiford@arm.com
Subject: Re: [PATCH] simplify-rtx: Fix VOIDmode operand handling in simplify_subreg [PR108805]
Date: Thu, 2 Mar 2023 10:08:19 +0000 [thread overview]
Message-ID: <31f486f6-9e9a-7906-8a9c-208ea67b9b56@arm.com> (raw)
In-Reply-To: <mpt1qmbru0k.fsf@arm.com>
Hey both,
Sorry about that, don't know how I missed those. Just running a test on
that now and will commit when it's done. I assume the comment and 0 ->
byte change can be seen as obvious, especially since it was supposed to
be in my original patch...
On 27/02/2023 15:46, Richard Sandiford wrote:
> Uros Bizjak <ubizjak@gmail.com> writes:
>> On Fri, Feb 17, 2023 at 8:38 AM Richard Biener <rguenther@suse.de> wrote:
>>>
>>> On Thu, 16 Feb 2023, Uros Bizjak wrote:
>>>
>>>> simplify_subreg can return VOIDmode const_int operand and will
>>>> cause ICE in simplify_gen_subreg when this operand is passed to it.
>>>>
>>>> The patch prevents VOIDmode temporary from entering simplify_gen_subreg.
>>>> We can't process const_int operand any further, since outermode
>>>> is not an integer mode here.
>>>
>>> But if it's a CONST_INT then we know it's of int_outermode, no? That is,
>>> doesn't simplify_subreg (mode, ...) always return something in 'mode'
>>> and thus we can always pass just 'mode' as third argument to the
>>> following simplify_gen_subreg call?
>>
>> You are right. I am testing the attached patch that works too.
>
> Thanks for this, it's the correct fix. But as noted in
> https://gcc.gnu.org/pipermail/gcc-patches/2023-January/610920.html,
> the final 0 is also wrong for big-endian. Andre?
>
> Richard
>
>>
>> Uros.
>>
>> diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
>> index 0a1dd88b0a8..3955929bb70 100644
>> --- a/gcc/simplify-rtx.cc
>> +++ b/gcc/simplify-rtx.cc
>> @@ -7665,7 +7665,7 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
>> {
>> rtx tem = simplify_subreg (int_outermode, op, innermode, byte);
>> if (tem)
>> - return simplify_gen_subreg (outermode, tem, GET_MODE (tem), 0);
>> + return simplify_gen_subreg (outermode, tem, int_outermode, 0);
>> }
>>
>> /* If OP is a vector comparison and the subreg is not changing the
next prev parent reply other threads:[~2023-03-02 10:08 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-16 17:39 Uros Bizjak
2023-02-17 7:38 ` Richard Biener
2023-02-17 8:51 ` Uros Bizjak
2023-02-17 11:31 ` Richard Biener
2023-02-17 15:05 ` Uros Bizjak
2023-02-27 15:46 ` Richard Sandiford
2023-03-02 10:08 ` Andre Vieira (lists) [this message]
2023-03-02 10:13 ` Richard Sandiford
2023-03-02 14:15 ` Andre Vieira (lists)
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