[PATCH 03/10] gcc/arc: generate jump tables in code section for nps400

[Andrew Burgess <andrew.burgess@embecosm.com>]

When code runs from section loaded into fast memory we do not want it to
use rodata section from a slow memory for any jump tables.  This commit
turns on CASE_VECTOR_PC_RELATIVE by default for NPS400 targets, which in
turn turns on JUMP_TABLES_IN_TEXT_SECTION, which will place the jump
tables into the code section.

As a later optimisation we could be smarter about this, only turning on
inline jump tables when the code section is not the default code
section (.text), which we assume is not loaded into fast memory.

gcc/ChangeLog:

	* config/arc/arc.opt (TARGET_CASE_VECTOR_PC_RELATIVE): Default on
	for NPS400.
---
 gcc/ChangeLog.NPS400   | 7 +++++++
 gcc/config/arc/arc.opt | 2 +-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.NPS400 b/gcc/ChangeLog.NPS400
index 0281640..716e413 100644
--- a/gcc/ChangeLog.NPS400
+++ b/gcc/ChangeLog.NPS400
@@ -1,3 +1,10 @@
+2015-09-08  Andrew Burgess  <andrew.burgess@embecosm.com>
+	    Joern Rennecke  <joern.rennecke@embecosm.com>
+	    Noam Camus  <noamca@mellanox.com>
+
+	* config/arc/arc.opt (TARGET_CASE_VECTOR_PC_RELATIVE): Default on
+	for NPS400.
+
 2016-02-02  Joern Rennecke  <joern.rennecke@embecosm.com>
 	    Andrew Burgess  <andrew.burgess@embecosm.com>
 
diff --git a/gcc/config/arc/arc.opt b/gcc/config/arc/arc.opt
index f8e062c..55a5b32 100644
--- a/gcc/config/arc/arc.opt
+++ b/gcc/config/arc/arc.opt
@@ -283,7 +283,7 @@ Target Var(TARGET_BBIT_PEEPHOLE)
 Enable bbit peephole2.
 
 mcase-vector-pcrel
-Target Var(TARGET_CASE_VECTOR_PC_RELATIVE)
+Target Var(TARGET_CASE_VECTOR_PC_RELATIVE) Init(ARC_NPS400 != 0)
 Use pc-relative switch case tables - this enables case table shortening.
 
 mcompact-casesi
-- 
2.6.4