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[46.5.130.86]) by smtp.gmail.com with ESMTPSA id k3-20020a17090646c300b009ae57888718sm715828ejs.207.2023.09.21.02.07.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 21 Sep 2023 02:07:09 -0700 (PDT) Message-ID: <346cc997-ca97-5cf9-d20c-e50206f6eefd@gmail.com> Date: Thu, 21 Sep 2023 11:07:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Cc: rdapp.gcc@gmail.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, palmer@rivosinc.com, jeffreyalaw@gmail.com Subject: Re: [PATCH] RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn functions Content-Language: en-US To: Lehua Ding , gcc-patches@gcc.gnu.org References: <20230921071118.3321383-1-lehua.ding@rivai.ai> From: Robin Dapp In-Reply-To: <20230921071118.3321383-1-lehua.ding@rivai.ai> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi Lehua, I once had different comments for those but either I never pushed them or they got buried in the process of refactoring. The explanatory comment explaining vlmax is also in "nowhere land" below autovec_use_vlmax_p. (it says vsetvli instead of vsetvl as well...) It would be useful to move it to above the function comments you touch. > +/* Emit RVV insn which vl is the number of units of the vector mode. > + This function can only be used before LRA pass or for VLS_AVL_IMM modes. */ Emit an RVV insn with a vector length that equals the number of units of the vector mode. For VLA modes this corresponds to VLMAX. Unless the vector length can be encoded in the vsetivl[i] instruction this function must only be used as long as we can create pseudo registers. This is because it will set a pseudo register to VLMAX using vsetvl and use this as definition for the vector length. Besides, we could add a const_vlmax_p () || can_create_pseudo_p assert here? > +/* Like emit_vlmax_insn but can be only used after LRA pass that can't create > + pseudo register. */ Like emit_vlmax_insn but must only be used when we cannot create pseudo registers anymore. This function, however, takes a predefined vector length from the value in VL. > +/* Emit RVV insn which vl is the VL argument. */ > +emit_nonvlmax_insn (unsigned icode, unsigned insn_flags, rtx *ops, rtx vl) I think I renamed this to emit_len_insn or something before but Juzhe didn't like it ;) How about something like: Emit an RVV insn with a predefined vector length. Contrary to emit_vlmax_insn the instruction's vector length is not deduced from its mode but taken from the value in VL. Regards Robin