From: Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
To: GCC Patches <gcc-patches@gcc.gnu.org>
Subject: [PATCH 1/4] xtensa: Implement bswaphi2 insn pattern
Date: Sun, 29 May 2022 19:44:32 +0900 [thread overview]
Message-ID: <35ee614e-9ab5-0bba-bcc2-6e27c9ef3d6a@yahoo.co.jp> (raw)
This patch adds bswaphi2 insn pattern that is one instruction less than the
default expansion.
gcc/ChangeLog:
* config/xtensa/xtensa.md (bswaphi2): New insn pattern.
---
gcc/config/xtensa/xtensa.md | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 6f5cbc541d8..217879bde15 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -471,6 +471,16 @@
\f
;; Byte swap.
+(define_insn "bswaphi2"
+ [(set (match_operand:HI 0 "register_operand" "=a")
+ (bswap:HI (match_operand:HI 1 "register_operand" "r")))
+ (clobber (match_scratch:HI 2 "=&a"))]
+ ""
+ "extui\t%2, %1, 8, 8\;slli\t%0, %1, 8\;or\t%0, %0, %2"
+ [(set_attr "type" "arith")
+ (set_attr "mode" "HI")
+ (set_attr "length" "9")])
+
(define_expand "bswapsi2"
[(set (match_operand:SI 0 "register_operand" "")
(bswap:SI (match_operand:SI 1 "register_operand" "")))]
--
2.20.1
next reply other threads:[~2022-05-29 11:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-29 10:44 Takayuki 'January June' Suwa [this message]
2022-06-09 22:11 ` Max Filippov
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