From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 993F53858D1E for ; Tue, 18 Apr 2023 12:22:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 993F53858D1E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0353729.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33IBcfCF026276; Tue, 18 Apr 2023 12:22:24 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=message-id : date : mime-version : from : subject : to : content-type : content-transfer-encoding; s=pp1; bh=vpwhnzdgKcdgfeteQqtZOYUtWL69MXnoM3QQOQdCD7g=; b=rI4m9ZnVxP4MqKn7c8UGjF9forhlKxdm0glJJYp07PnslEmceNGOggCNbZyClhB9lqfS Bhvv0FmnG4OFxJGnF4QqVfVB/2q5RD0fXt0SBRrgxF3Un7Z9GTVio7XIG+EhfPfJ+U5n eo+kWwVMreatTW+hP0NFkQLxEGp43ES/zXDND5l0K5b+kZ4kNL+LZQW6mzCFSIXLJ3pO H4beYDlWO63KaldIj/coRt7w8sXdvdQjxFoX1MZ8mmHGEPL94VHHqD+deBVNTGeDxwyy 8BFrExD9Io5GirInP1eFsNUGObB5LYyMjJOv7HdNJN+rKHF3yugch765hGDqxA4h7yqp ug== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3q1n9ru5bf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Apr 2023 12:22:24 +0000 Received: from m0353729.ppops.net (m0353729.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 33IC0Ra8026870; Tue, 18 Apr 2023 12:22:23 GMT Received: from ppma02wdc.us.ibm.com (aa.5b.37a9.ip4.static.sl-reverse.com [169.55.91.170]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3q1n9ru5aq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Apr 2023 12:22:23 +0000 Received: from pps.filterd (ppma02wdc.us.ibm.com [127.0.0.1]) by ppma02wdc.us.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 33IBfC5P024272; Tue, 18 Apr 2023 12:22:22 GMT Received: from smtprelay05.wdc07v.mail.ibm.com ([9.208.129.117]) by ppma02wdc.us.ibm.com (PPS) with ESMTPS id 3pykj7gupj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Apr 2023 12:22:22 +0000 Received: from smtpav06.wdc07v.mail.ibm.com (smtpav06.wdc07v.mail.ibm.com [10.39.53.233]) by smtprelay05.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 33ICMK1W31523366 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 18 Apr 2023 12:22:20 GMT Received: from smtpav06.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 81AF158054; Tue, 18 Apr 2023 12:22:20 +0000 (GMT) Received: from smtpav06.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CEC915804E; Tue, 18 Apr 2023 12:22:19 +0000 (GMT) Received: from [9.160.169.33] (unknown [9.160.169.33]) by smtpav06.wdc07v.mail.ibm.com (Postfix) with ESMTPS; Tue, 18 Apr 2023 12:22:19 +0000 (GMT) Message-ID: <36819cc8-c948-1426-2429-7fe4f6b67c94@linux.ibm.com> Date: Tue, 18 Apr 2023 07:22:18 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Content-Language: en-US From: Pat Haugen Subject: [PATCH V2, rs6000] Disable generation of scalar modulo instructions To: GCC Patches , Segher Boessenkool , Peter Bergner , David Edelsohn , "Kewen.Lin" Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: oIfdjSldU9NV2Ag_QTheqqKrzhri1Oot X-Proofpoint-GUID: jdknPmLdX7UWmic5k6Yrh8lmZvKaS3LS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-18_09,2023-04-18_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1011 lowpriorityscore=0 mlxscore=0 impostorscore=0 adultscore=0 suspectscore=0 phishscore=0 malwarescore=0 priorityscore=1501 mlxlogscore=999 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304180104 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Updated from prior patch to also disable for int128. Disable generation of scalar modulo instructions. It was recently discovered that the scalar modulo instructions can suffer noticeable performance issues for certain input values. This patch disables their generation since the equivalent div/mul/sub sequence does not suffer the same problem. Bootstrapped and regression tested on powerpc64/powerpc64le. Ok for master and backports after burn in? -Pat 2023-04-18 Pat Haugen gcc/ * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New. * config/rs6000/rs6000.md (mod3, *mod3): Disable. (define_expand umod3): New. (define_insn umod3): Rename to *umod3 and disable. (umodti3, modti3): Disable. gcc/testsuite/ * gcc.target/powerpc/clone1.c: Add xfails. * gcc.target/powerpc/clone3.c: Likewise. * gcc.target/powerpc/mod-1.c: Likewise. * gcc.target/powerpc/mod-2.c: Likewise. * gcc.target/powerpc/p10-vdivq-vmodq.c: Likewise. diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 3503614efbd..1cf0a0013c0 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -2492,3 +2492,9 @@ while (0) rs6000_asm_output_opcode (STREAM); \ } \ while (0) + +/* Disable generation of scalar modulo instructions due to performance issues + with certain input values. This can be removed in the future when the + issues have been resolved. */ +#define RS6000_DISABLE_SCALAR_MODULO 1 + diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 44f7dd509cb..4f397bc9179 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -3421,6 +3421,17 @@ (define_expand "mod3" FAIL; operands[2] = force_reg (mode, operands[2]); + + if (RS6000_DISABLE_SCALAR_MODULO) + { + temp1 = gen_reg_rtx (mode); + temp2 = gen_reg_rtx (mode); + + emit_insn (gen_div3 (temp1, operands[1], operands[2])); + emit_insn (gen_mul3 (temp2, temp1, operands[2])); + emit_insn (gen_sub3 (operands[0], operands[1], temp2)); + DONE; + } } else { @@ -3440,17 +3451,42 @@ (define_insn "*mod3" [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r,r") (mod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r") (match_operand:GPR 2 "gpc_reg_operand" "r,r")))] - "TARGET_MODULO" + "TARGET_MODULO && !RS6000_DISABLE_SCALAR_MODULO" "mods %0,%1,%2" [(set_attr "type" "div") (set_attr "size" "")]) +;; This define_expand can be removed when RS6000_DISABLE_SCALAR_MODULO is +;; removed. +(define_expand "umod3" + [(set (match_operand:GPR 0 "gpc_reg_operand") + (umod:GPR (match_operand:GPR 1 "gpc_reg_operand") + (match_operand:GPR 2 "gpc_reg_operand")))] + "" +{ + rtx temp1; + rtx temp2; + + if (!TARGET_MODULO) + FAIL; -(define_insn "umod3" + if (RS6000_DISABLE_SCALAR_MODULO) + { + temp1 = gen_reg_rtx (mode); + temp2 = gen_reg_rtx (mode); + + emit_insn (gen_udiv3 (temp1, operands[1], operands[2])); + emit_insn (gen_mul3 (temp2, temp1, operands[2])); + emit_insn (gen_sub3 (operands[0], operands[1], temp2)); + DONE; + } +}) + +(define_insn "*umod3" [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r,r") (umod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r") (match_operand:GPR 2 "gpc_reg_operand" "r,r")))] - "TARGET_MODULO" + "TARGET_MODULO && !RS6000_DISABLE_SCALAR_MODULO" "modu %0,%1,%2" [(set_attr "type" "div") (set_attr "size" "")]) @@ -3507,7 +3543,7 @@ (define_insn "umodti3" [(set (match_operand:TI 0 "altivec_register_operand" "=v") (umod:TI (match_operand:TI 1 "altivec_register_operand" "v") (match_operand:TI 2 "altivec_register_operand" "v")))] - "TARGET_POWER10 && TARGET_POWERPC64" + "TARGET_POWER10 && TARGET_POWERPC64 && !RS6000_DISABLE_SCALAR_MODULO" "vmoduq %0,%1,%2" [(set_attr "type" "vecdiv") (set_attr "size" "128")]) @@ -3516,7 +3552,7 @@ (define_insn "modti3" [(set (match_operand:TI 0 "altivec_register_operand" "=v") (mod:TI (match_operand:TI 1 "altivec_register_operand" "v") (match_operand:TI 2 "altivec_register_operand" "v")))] - "TARGET_POWER10 && TARGET_POWERPC64" + "TARGET_POWER10 && TARGET_POWERPC64 && !RS6000_DISABLE_SCALAR_MODULO" "vmodsq %0,%1,%2" [(set_attr "type" "vecdiv") (set_attr "size" "128")]) diff --git a/gcc/testsuite/gcc.target/powerpc/clone1.c b/gcc/testsuite/gcc.target/powerpc/clone1.c index c69fd2aa1b8..74323ca0e8c 100644 --- a/gcc/testsuite/gcc.target/powerpc/clone1.c +++ b/gcc/testsuite/gcc.target/powerpc/clone1.c @@ -21,6 +21,7 @@ long mod_func_or (long a, long b, long c) return mod_func (a, b) | c; } -/* { dg-final { scan-assembler-times {\mdivd\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mmulld\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mmodsd\M} 1 } } */ +/* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */ +/* { dg-final { scan-assembler-times {\mdivd\M} 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times {\mmulld\M} 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times {\mmodsd\M} 1 { xfail *-*-* } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/clone3.c b/gcc/testsuite/gcc.target/powerpc/clone3.c index 911b88b781d..d3eb4dd2378 100644 --- a/gcc/testsuite/gcc.target/powerpc/clone3.c +++ b/gcc/testsuite/gcc.target/powerpc/clone3.c @@ -27,7 +27,8 @@ long mod_func_or (long a, long b, long c) return mod_func (a, b) | c; } -/* { dg-final { scan-assembler-times {\mdivd\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mmulld\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mmodsd\M} 2 } } */ +/* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */ +/* { dg-final { scan-assembler-times {\mdivd\M} 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times {\mmulld\M} 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times {\mmodsd\M} 2 { xfail *-*-* } } } */ /* { dg-final { scan-assembler-times {\mpld\M} 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/mod-1.c b/gcc/testsuite/gcc.target/powerpc/mod-1.c index 861ba670af4..74af98f5bc3 100644 --- a/gcc/testsuite/gcc.target/powerpc/mod-1.c +++ b/gcc/testsuite/gcc.target/powerpc/mod-1.c @@ -7,13 +7,14 @@ long lsmod (long a, long b) { return a%b; } unsigned int iumod (unsigned int a, unsigned int b) { return a%b; } unsigned long lumod (unsigned long a, unsigned long b) { return a%b; } -/* { dg-final { scan-assembler-times "modsw " 1 } } */ -/* { dg-final { scan-assembler-times "modsd " 1 } } */ -/* { dg-final { scan-assembler-times "moduw " 1 } } */ -/* { dg-final { scan-assembler-times "modud " 1 } } */ -/* { dg-final { scan-assembler-not "mullw " } } */ -/* { dg-final { scan-assembler-not "mulld " } } */ -/* { dg-final { scan-assembler-not "divw " } } */ -/* { dg-final { scan-assembler-not "divd " } } */ -/* { dg-final { scan-assembler-not "divwu " } } */ -/* { dg-final { scan-assembler-not "divdu " } } */ +/* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */ +/* { dg-final { scan-assembler-times "modsw " 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times "modsd " 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times "moduw " 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times "modud " 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-not "mullw " { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-not "mulld " { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-not "divw " { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-not "divd " { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-not "divwu " { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-not "divdu " { xfail *-*-* } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/mod-2.c b/gcc/testsuite/gcc.target/powerpc/mod-2.c index 441ec5878f1..896e2e35260 100644 --- a/gcc/testsuite/gcc.target/powerpc/mod-2.c +++ b/gcc/testsuite/gcc.target/powerpc/mod-2.c @@ -5,8 +5,9 @@ int ismod (int a, int b) { return a%b; } unsigned int iumod (unsigned int a, unsigned int b) { return a%b; } -/* { dg-final { scan-assembler-times "modsw " 1 } } */ -/* { dg-final { scan-assembler-times "moduw " 1 } } */ -/* { dg-final { scan-assembler-not "mullw " } } */ -/* { dg-final { scan-assembler-not "divw " } } */ -/* { dg-final { scan-assembler-not "divwu " } } */ +/* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */ +/* { dg-final { scan-assembler-times "modsw " 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times "moduw " 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-not "mullw " { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-not "divw " { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-not "divwu " { xfail *-*-* } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c b/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c index 84685e5ff43..148998c8c9d 100644 --- a/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c +++ b/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c @@ -23,5 +23,6 @@ __int128 s_mod(__int128 a, __int128 b) /* { dg-final { scan-assembler {\mvdivsq\M} } } */ /* { dg-final { scan-assembler {\mvdivuq\M} } } */ -/* { dg-final { scan-assembler {\mvmodsq\M} } } */ -/* { dg-final { scan-assembler {\mvmoduq\M} } } */ +/* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */ +/* { dg-final { scan-assembler {\mvmodsq\M} { xfail *-*-* } } } */ +/* { dg-final { scan-assembler {\mvmoduq\M} { xfail *-*-* } } } */