* [PATCH] RISC-V: Add regression test for vsetvl bug pr113429
@ 2024-01-24 0:50 Patrick O'Neill
2024-01-24 1:12 ` juzhe.zhong
0 siblings, 1 reply; 6+ messages in thread
From: Patrick O'Neill @ 2024-01-24 0:50 UTC (permalink / raw)
To: gcc-patches
Cc: juzhe.zhong, kito.cheng, law, rdapp, vineetg, Patrick O'Neill
The reduced testcase for pr113429 (cam4 failure) needed additional
modules so it wasn't committed.
The fuzzer found a c testcase that was also fixed with pr113429's fix.
Adding it as a regression test.
PR 113429
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/pr113429.c: New test.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
.../gcc.target/riscv/rvv/vsetvl/pr113429.c | 70 +++++++++++++++++++
1 file changed, 70 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
new file mode 100644
index 00000000000..05c3eeecb94
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
@@ -0,0 +1,70 @@
+/* { dg-do run } */
+/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d -O3" } */
+
+long a;
+int b, c, d, e, f, g;
+short h, i, j;
+static int k = 3;
+static int l = 6;
+int m[5][7];
+signed char n;
+int *const o = &c;
+
+signed char(p)(signed char p1, signed char q) {
+ return p1 / q;
+}
+
+void s(unsigned p1) {
+ b = (b ^ p1) & 255;
+}
+
+static long t() {
+ long u;
+ signed char v;
+ d = 1;
+ for (; d <= 4; d++) {
+ j = 0;
+ for (; j <= 4; j++) {
+ v = 0;
+ for (; v <= 4; v++) {
+ if (m[v][v])
+ continue;
+ c = 0;
+ for (; c <= 4; c++) {
+ n = 0;
+ for (; n <= 4; n++) {
+ int *w = &e;
+ long r = v;
+ u = r == 0 ? a : a % r;
+ h |= u;
+ *w = g;
+ --m[n][c];
+ f &= *o;
+ }
+ }
+ if (p((i < 3) ^ 9, k))
+ ;
+ else if (v)
+ return 0;
+ }
+ }
+ }
+ return 1;
+}
+
+static char x() {
+ for (;;) {
+ t();
+ if (l)
+ return 0;
+ }
+}
+
+int main() {
+ x();
+ s(e & 255);
+ if (b == 0)
+ return 0;
+ else
+ return 1;
+}
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] RISC-V: Add regression test for vsetvl bug pr113429
2024-01-24 0:50 [PATCH] RISC-V: Add regression test for vsetvl bug pr113429 Patrick O'Neill
@ 2024-01-24 1:12 ` juzhe.zhong
2024-01-24 1:20 ` [Committed] " Patrick O'Neill
0 siblings, 1 reply; 6+ messages in thread
From: juzhe.zhong @ 2024-01-24 1:12 UTC (permalink / raw)
To: Patrick O'Neill, gcc-patches
Cc: kito.cheng, law, rdapp, vineetg, Patrick O'Neill
[-- Attachment #1: Type: text/plain, Size: 2314 bytes --]
ok
juzhe.zhong@rivai.ai
From: Patrick O'Neill
Date: 2024-01-24 08:50
To: gcc-patches
CC: juzhe.zhong; kito.cheng; law; rdapp; vineetg; Patrick O'Neill
Subject: [PATCH] RISC-V: Add regression test for vsetvl bug pr113429
The reduced testcase for pr113429 (cam4 failure) needed additional
modules so it wasn't committed.
The fuzzer found a c testcase that was also fixed with pr113429's fix.
Adding it as a regression test.
PR 113429
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/pr113429.c: New test.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
.../gcc.target/riscv/rvv/vsetvl/pr113429.c | 70 +++++++++++++++++++
1 file changed, 70 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
new file mode 100644
index 00000000000..05c3eeecb94
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
@@ -0,0 +1,70 @@
+/* { dg-do run } */
+/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d -O3" } */
+
+long a;
+int b, c, d, e, f, g;
+short h, i, j;
+static int k = 3;
+static int l = 6;
+int m[5][7];
+signed char n;
+int *const o = &c;
+
+signed char(p)(signed char p1, signed char q) {
+ return p1 / q;
+}
+
+void s(unsigned p1) {
+ b = (b ^ p1) & 255;
+}
+
+static long t() {
+ long u;
+ signed char v;
+ d = 1;
+ for (; d <= 4; d++) {
+ j = 0;
+ for (; j <= 4; j++) {
+ v = 0;
+ for (; v <= 4; v++) {
+ if (m[v][v])
+ continue;
+ c = 0;
+ for (; c <= 4; c++) {
+ n = 0;
+ for (; n <= 4; n++) {
+ int *w = &e;
+ long r = v;
+ u = r == 0 ? a : a % r;
+ h |= u;
+ *w = g;
+ --m[n][c];
+ f &= *o;
+ }
+ }
+ if (p((i < 3) ^ 9, k))
+ ;
+ else if (v)
+ return 0;
+ }
+ }
+ }
+ return 1;
+}
+
+static char x() {
+ for (;;) {
+ t();
+ if (l)
+ return 0;
+ }
+}
+
+int main() {
+ x();
+ s(e & 255);
+ if (b == 0)
+ return 0;
+ else
+ return 1;
+}
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Committed] RISC-V: Add regression test for vsetvl bug pr113429
2024-01-24 1:12 ` juzhe.zhong
@ 2024-01-24 1:20 ` Patrick O'Neill
2024-01-26 7:20 ` juzhe.zhong
0 siblings, 1 reply; 6+ messages in thread
From: Patrick O'Neill @ 2024-01-24 1:20 UTC (permalink / raw)
To: juzhe.zhong, gcc-patches; +Cc: kito.cheng, law, rdapp, vineetg
[-- Attachment #1: Type: text/plain, Size: 1970 bytes --]
The reduced testcase for pr113429 (cam4 failure) needed additional
modules so it wasn't committed.
The fuzzer found a c testcase that was also fixed with pr113429's fix.
Adding it as a regression test.
PR target/113429
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/pr113429.c: New test.
Signed-off-by: Patrick O'Neill<patrick@rivosinc.com>
---
.../gcc.target/riscv/rvv/vsetvl/pr113429.c | 70 +++++++++++++++++++
1 file changed, 70 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
new file mode 100644
index 00000000000..05c3eeecb94
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
@@ -0,0 +1,70 @@
+/* { dg-do run } */
+/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d -O3" } */
+
+long a;
+int b, c, d, e, f, g;
+short h, i, j;
+static int k = 3;
+static int l = 6;
+int m[5][7];
+signed char n;
+int *const o = &c;
+
+signed char(p)(signed char p1, signed char q) {
+ return p1 / q;
+}
+
+void s(unsigned p1) {
+ b = (b ^ p1) & 255;
+}
+
+static long t() {
+ long u;
+ signed char v;
+ d = 1;
+ for (; d <= 4; d++) {
+ j = 0;
+ for (; j <= 4; j++) {
+ v = 0;
+ for (; v <= 4; v++) {
+ if (m[v][v])
+ continue;
+ c = 0;
+ for (; c <= 4; c++) {
+ n = 0;
+ for (; n <= 4; n++) {
+ int *w = &e;
+ long r = v;
+ u = r == 0 ? a : a % r;
+ h |= u;
+ *w = g;
+ --m[n][c];
+ f &= *o;
+ }
+ }
+ if (p((i < 3) ^ 9, k))
+ ;
+ else if (v)
+ return 0;
+ }
+ }
+ }
+ return 1;
+}
+
+static char x() {
+ for (;;) {
+ t();
+ if (l)
+ return 0;
+ }
+}
+
+int main() {
+ x();
+ s(e & 255);
+ if (b == 0)
+ return 0;
+ else
+ return 1;
+}
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Committed] RISC-V: Add regression test for vsetvl bug pr113429
2024-01-24 1:20 ` [Committed] " Patrick O'Neill
@ 2024-01-26 7:20 ` juzhe.zhong
2024-01-27 0:38 ` Patrick O'Neill
0 siblings, 1 reply; 6+ messages in thread
From: juzhe.zhong @ 2024-01-26 7:20 UTC (permalink / raw)
To: Patrick O'Neill, gcc-patches; +Cc: kito.cheng, law, rdapp, vineetg
[-- Attachment #1: Type: text/plain, Size: 3157 bytes --]
This patch causes the following regression:
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O0 (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O1 (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O2 (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O2 -flto -fno-use-linker-plugin -flto-partition=none (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O3 -g (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -Os (test for excess errors)
I suggest you add :
/* { dg-require-effective-target rv64 } */
/* { dg-require-effective-target riscv_v } */
juzhe.zhong@rivai.ai
From: Patrick O'Neill
Date: 2024-01-24 09:20
To: juzhe.zhong@rivai.ai; gcc-patches
CC: kito.cheng; law; rdapp; vineetg
Subject: [Committed] RISC-V: Add regression test for vsetvl bug pr113429
The reduced testcase for pr113429 (cam4 failure) needed additional
modules so it wasn't committed.
The fuzzer found a c testcase that was also fixed with pr113429's fix.
Adding it as a regression test.
PR target/113429
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/pr113429.c: New test.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
.../gcc.target/riscv/rvv/vsetvl/pr113429.c | 70 +++++++++++++++++++
1 file changed, 70 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
new file mode 100644
index 00000000000..05c3eeecb94
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
@@ -0,0 +1,70 @@
+/* { dg-do run } */
+/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d -O3" } */
+
+long a;
+int b, c, d, e, f, g;
+short h, i, j;
+static int k = 3;
+static int l = 6;
+int m[5][7];
+signed char n;
+int *const o = &c;
+
+signed char(p)(signed char p1, signed char q) {
+ return p1 / q;
+}
+
+void s(unsigned p1) {
+ b = (b ^ p1) & 255;
+}
+
+static long t() {
+ long u;
+ signed char v;
+ d = 1;
+ for (; d <= 4; d++) {
+ j = 0;
+ for (; j <= 4; j++) {
+ v = 0;
+ for (; v <= 4; v++) {
+ if (m[v][v])
+ continue;
+ c = 0;
+ for (; c <= 4; c++) {
+ n = 0;
+ for (; n <= 4; n++) {
+ int *w = &e;
+ long r = v;
+ u = r == 0 ? a : a % r;
+ h |= u;
+ *w = g;
+ --m[n][c];
+ f &= *o;
+ }
+ }
+ if (p((i < 3) ^ 9, k))
+ ;
+ else if (v)
+ return 0;
+ }
+ }
+ }
+ return 1;
+}
+
+static char x() {
+ for (;;) {
+ t();
+ if (l)
+ return 0;
+ }
+}
+
+int main() {
+ x();
+ s(e & 255);
+ if (b == 0)
+ return 0;
+ else
+ return 1;
+}
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Committed] RISC-V: Add regression test for vsetvl bug pr113429
2024-01-26 7:20 ` juzhe.zhong
@ 2024-01-27 0:38 ` Patrick O'Neill
2024-01-27 0:39 ` 钟居哲
0 siblings, 1 reply; 6+ messages in thread
From: Patrick O'Neill @ 2024-01-27 0:38 UTC (permalink / raw)
To: juzhe.zhong, gcc-patches; +Cc: kito.cheng, law, rdapp, vineetg
[-- Attachment #1: Type: text/plain, Size: 4272 bytes --]
What target/config are these failures on?
I tried rv64gcv, rv64gc, rv32gcv, and rv32gc with RUNTESTFLAGS="rvv.exp"
and don't see these failures.
Thanks,
Patrick
On 1/25/24 23:20, juzhe.zhong@rivai.ai wrote:
> This patch causes the following regression:
>
> FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O0 (test for excess
> errors)
> FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O1 (test for excess
> errors)
> FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O2 (test for excess
> errors)
> FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O2 -flto
> -fno-use-linker-plugin -flto-partition=none (test for excess errors)
> FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O2 -flto
> -fuse-linker-plugin -fno-fat-lto-objects (test for excess errors)
> FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O3
> -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer
> -finline-functions (test for excess errors)
> FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O3 -g (test for
> excess errors)
> FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -Os (test for excess
> errors)
>
> I suggest you add :
>
> /* { dg-require-effective-target rv64 } */
> /* { dg-require-effective-target riscv_v } */
>
> ------------------------------------------------------------------------
> juzhe.zhong@rivai.ai
>
> *From:* Patrick O'Neill <mailto:patrick@rivosinc.com>
> *Date:* 2024-01-24 09:20
> *To:* juzhe.zhong@rivai.ai; gcc-patches
> <mailto:gcc-patches@gcc.gnu.org>
> *CC:* kito.cheng <mailto:kito.cheng@gmail.com>; law
> <mailto:law@gcc.gnu.org>; rdapp <mailto:rdapp@gcc.gnu.org>;
> vineetg <mailto:vineetg@gcc.gnu.org>
> *Subject:* [Committed] RISC-V: Add regression test for vsetvl bug
> pr113429
>
> The reduced testcase for pr113429 (cam4 failure) needed additional
> modules so it wasn't committed.
> The fuzzer found a c testcase that was also fixed with pr113429's fix.
> Adding it as a regression test.
> PR target/113429
> gcc/testsuite/ChangeLog:
> * gcc.target/riscv/rvv/vsetvl/pr113429.c: New test.
> Signed-off-by: Patrick O'Neill<patrick@rivosinc.com>
> ---
> .../gcc.target/riscv/rvv/vsetvl/pr113429.c | 70 +++++++++++++++++++
> 1 file changed, 70 insertions(+)
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
> new file mode 100644
> index 00000000000..05c3eeecb94
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
> @@ -0,0 +1,70 @@
> +/* { dg-do run } */
> +/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d -O3" } */
> +
> +long a;
> +int b, c, d, e, f, g;
> +short h, i, j;
> +static int k = 3;
> +static int l = 6;
> +int m[5][7];
> +signed char n;
> +int *const o = &c;
> +
> +signed char(p)(signed char p1, signed char q) {
> + return p1 / q;
> +}
> +
> +void s(unsigned p1) {
> + b = (b ^ p1) & 255;
> +}
> +
> +static long t() {
> + long u;
> + signed char v;
> + d = 1;
> + for (; d <= 4; d++) {
> + j = 0;
> + for (; j <= 4; j++) {
> + v = 0;
> + for (; v <= 4; v++) {
> + if (m[v][v])
> + continue;
> + c = 0;
> + for (; c <= 4; c++) {
> + n = 0;
> + for (; n <= 4; n++) {
> + int *w = &e;
> + long r = v;
> + u = r == 0 ? a : a % r;
> + h |= u;
> + *w = g;
> + --m[n][c];
> + f &= *o;
> + }
> + }
> + if (p((i < 3) ^ 9, k))
> + ;
> + else if (v)
> + return 0;
> + }
> + }
> + }
> + return 1;
> +}
> +
> +static char x() {
> + for (;;) {
> + t();
> + if (l)
> + return 0;
> + }
> +}
> +
> +int main() {
> + x();
> + s(e & 255);
> + if (b == 0)
> + return 0;
> + else
> + return 1;
> +}
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: Re: [Committed] RISC-V: Add regression test for vsetvl bug pr113429
2024-01-27 0:38 ` Patrick O'Neill
@ 2024-01-27 0:39 ` 钟居哲
0 siblings, 0 replies; 6+ messages in thread
From: 钟居哲 @ 2024-01-27 0:39 UTC (permalink / raw)
To: patrick, gcc-patches; +Cc: kito.cheng, law, rdapp, vineetg
[-- Attachment #1: Type: text/plain, Size: 3619 bytes --]
newlib rv32gcv
juzhe.zhong@rivai.ai
From: Patrick O'Neill
Date: 2024-01-27 08:38
To: juzhe.zhong@rivai.ai; gcc-patches
CC: kito.cheng; law; rdapp; vineetg
Subject: Re: [Committed] RISC-V: Add regression test for vsetvl bug pr113429
What target/config are these failures on?
I tried rv64gcv, rv64gc, rv32gcv, and rv32gc with RUNTESTFLAGS="rvv.exp" and don't see these failures.
Thanks,
Patrick
On 1/25/24 23:20, juzhe.zhong@rivai.ai wrote:
This patch causes the following regression:
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O0 (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O1 (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O2 (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O2 -flto -fno-use-linker-plugin -flto-partition=none (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -O3 -g (test for excess errors)
FAIL: gcc.target/riscv/rvv/vsetvl/pr113429.c -Os (test for excess errors)
I suggest you add :
/* { dg-require-effective-target rv64 } */
/* { dg-require-effective-target riscv_v } */
juzhe.zhong@rivai.ai
From: Patrick O'Neill
Date: 2024-01-24 09:20
To: juzhe.zhong@rivai.ai; gcc-patches
CC: kito.cheng; law; rdapp; vineetg
Subject: [Committed] RISC-V: Add regression test for vsetvl bug pr113429
The reduced testcase for pr113429 (cam4 failure) needed additional
modules so it wasn't committed.
The fuzzer found a c testcase that was also fixed with pr113429's fix.
Adding it as a regression test.
PR target/113429
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/pr113429.c: New test.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
.../gcc.target/riscv/rvv/vsetvl/pr113429.c | 70 +++++++++++++++++++
1 file changed, 70 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
new file mode 100644
index 00000000000..05c3eeecb94
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
@@ -0,0 +1,70 @@
+/* { dg-do run } */
+/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d -O3" } */
+
+long a;
+int b, c, d, e, f, g;
+short h, i, j;
+static int k = 3;
+static int l = 6;
+int m[5][7];
+signed char n;
+int *const o = &c;
+
+signed char(p)(signed char p1, signed char q) {
+ return p1 / q;
+}
+
+void s(unsigned p1) {
+ b = (b ^ p1) & 255;
+}
+
+static long t() {
+ long u;
+ signed char v;
+ d = 1;
+ for (; d <= 4; d++) {
+ j = 0;
+ for (; j <= 4; j++) {
+ v = 0;
+ for (; v <= 4; v++) {
+ if (m[v][v])
+ continue;
+ c = 0;
+ for (; c <= 4; c++) {
+ n = 0;
+ for (; n <= 4; n++) {
+ int *w = &e;
+ long r = v;
+ u = r == 0 ? a : a % r;
+ h |= u;
+ *w = g;
+ --m[n][c];
+ f &= *o;
+ }
+ }
+ if (p((i < 3) ^ 9, k))
+ ;
+ else if (v)
+ return 0;
+ }
+ }
+ }
+ return 1;
+}
+
+static char x() {
+ for (;;) {
+ t();
+ if (l)
+ return 0;
+ }
+}
+
+int main() {
+ x();
+ s(e & 255);
+ if (b == 0)
+ return 0;
+ else
+ return 1;
+}
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-01-27 0:39 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-01-24 0:50 [PATCH] RISC-V: Add regression test for vsetvl bug pr113429 Patrick O'Neill
2024-01-24 1:12 ` juzhe.zhong
2024-01-24 1:20 ` [Committed] " Patrick O'Neill
2024-01-26 7:20 ` juzhe.zhong
2024-01-27 0:38 ` Patrick O'Neill
2024-01-27 0:39 ` 钟居哲
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