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From: Ajit Kumar Agarwal <ajit.kumar.agarwal@xilinx.com>
To: Bin.Cheng <amker.cheng@gmail.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
	Vinod Kathail <vinodk@xilinx.com>,
	Shail Aditya Gupta <shailadi@xilinx.com>,
	Vidhumouli Hunsigida	<vidhum@xilinx.com>,
	Nagaraju Mekala <nmekala@xilinx.com>
Subject: RE: [RFC, Patch]: Optimized changes in the register used inside loop for LICM and IVOPTS.
Date: Thu, 08 Oct 2015 05:54:00 -0000	[thread overview]
Message-ID: <37378DC5BCD0EE48BA4B082E0B55DFAA4299E4C1@XAP-PVEXMBX02.xlnx.xilinx.com> (raw)
In-Reply-To: <CAHFci289GaP736avfv6UVDqaNPjw63f2c3YHznfvVDy3zEaRUw@mail.gmail.com>



-----Original Message-----
From: Bin.Cheng [mailto:amker.cheng@gmail.com] 
Sent: Thursday, October 08, 2015 10:29 AM
To: Ajit Kumar Agarwal
Cc: GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [RFC, Patch]: Optimized changes in the register used inside loop for LICM and IVOPTS.

On Thu, Oct 8, 2015 at 12:32 PM, Ajit Kumar Agarwal <ajit.kumar.agarwal@xilinx.com> wrote:
> Following Proposed:
>
> Changes are done in the Loop Invariant(LICM) at RTL level and also the Induction variable optimization based on SSA representation.
> The current logic used in LICM for register used inside the loops is 
> changed. The Live Out of the loop latch node and the Live in of the 
> destination of the exit nodes is used to set the Loops Liveness at the exit of the Loop. The register used is the number of live variables at the exit of the Loop calculated above.
>
> For Induction variable optimization on tree SSA representation, the 
> register used logic is based on the number of phi nodes at the loop 
> header to represent the liveness at the loop. Current Logic used only the number of phi nodes at the loop header. I have made changes  to represent the phi operands also live at the loop. Thus number of phi operands also gets incremented in the number of registers used.
Hi,
>>For the GIMPLE IVO part, I don't think the change is reasonable enough.  IMHO, IVO fails to restrict iv number in some complex cases, your change tries to >>rectify that by increasing register pressure irrespective to out-of-ssa and coalescing.  I think the original code models reg-pressure better, what needs to be >>changed is how we compute cost from register pressure and use that to restrict iv number.

Considering the liveness with respect to all the phi arguments will not increase the register pressure. It improves the heuristics for restricting
The IV that increases the register pressure. The cost model uses regs_used and modelling the Liveness with respect to the phi arguments measures
Better register pressure.

Number of phi nodes in the loop header is not only the criteria for regs_used, but the number of liveness with respect to loop should be 
Criteria to measure appropriate register pressure.

Thanks & Regards
Ajit
>>As for the specific function determine_set_costs, I think one change is necessary to rule out all floating point phi nodes, because they do not have impact on >>IVO register pressure.  Actually this change will further reduce register pressure for fp related cases.


Thanks,
bin
>
> Performance runs:
>
> Bootstrapping with i386 goes through fine. The spec cpu 2000 
> benchmarks is run and following performance runs and the code size for
>  i386 target seen.
>
> Ratio with the above optimization changes vs ratio without above optimizations for INT benchmarks (3785.261 vs 3783.064).
> Ratio with the above optimization changes vs ratio without above optimization for FP benchmarks ( 4676.763189 vs 4676.072428 ).
>
> Code size reduction for INT benchmarks : 2324 instructions.
> Code size reduction for FP benchmarks : 1283 instructions.
>
> For Microblaze target the Mibench and EEMBC benchmarks is run and the following improvements is seen.
>
> (qos_lite(5.3%), consumer_jpeg_c(1.34%), security_rijndael_d(1.8%), 
> security_rijndael_e(1.4%))
>
> Code Size reduction for Mibench  = 16164 instructions.
> Code Size reduction for EEMBC = 98 instructions.
>
> Patch ChangeLog:
>
> PATCH] [RFC, Patch]: Optimized changes in the register used inside  loop for LICM and IVOPTS.
>
> Changes are done in the Loop Invariant(LICM) at RTL level and also the 
> Induction variable optimization based on SSA representation. The current logic used in LICM for register used inside the loops is changed.
> The Live Out of the loop latch node and the Live in of the destination 
> of the exit nodes is used to set the  Loops Liveness at the exit of 
> the Loop. The register used is the number of live variables at the exit of the  Loop calculated above.
>
> For Induction variable optimization on tree SSA representation, the 
> register used logic is based on the  number of phi nodes at the loop 
> header to represent the liveness at the loop.  Current Logic used only  
> the number of phi nodes at the loop header.  Changes are made to represent the phi operands also live  at the loop. Thus number of phi operands also gets incremented in the number of registers used.
>
> ChangeLog:
> 2015-10-09  Ajit Agarwal  <ajitkum@xilinx.com>
>
>         * loop-invariant.c (compute_loop_liveness): New.
>         (determine_regs_used): New.
>         (find_invariants_to_move): Use of determine_regs_used.
>         * tree-ssa-loop-ivopts.c (determine_set_costs): Consider the phi
>         arguments for register used.
>
> Signed-off-by:Ajit Agarwal ajitkum@xilinx.com
>
> Thanks & Regards
> Ajit

  reply	other threads:[~2015-10-08  5:54 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-08  4:32 Ajit Kumar Agarwal
2015-10-08  4:59 ` Bin.Cheng
2015-10-08  5:54   ` Ajit Kumar Agarwal [this message]
2015-10-09  2:45     ` Bin.Cheng
2015-10-12  4:25       ` Ajit Kumar Agarwal
2015-11-13  6:13 ` Jeff Law
2015-11-13  6:32   ` Bin.Cheng
2015-11-13 10:18     ` Richard Biener
2015-11-16 17:36   ` Ajit Kumar Agarwal
2015-11-16 23:00     ` Jeff Law
2015-11-29 17:14       ` Ajit Kumar Agarwal
2015-11-30 22:31         ` Jeff Law
2015-11-16 17:57   ` Ajit Kumar Agarwal
2015-11-17  5:37     ` Bin.Cheng

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