From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 46315 invoked by alias); 8 Dec 2015 22:24:58 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 46304 invoked by uid 89); 8 Dec 2015 22:24:56 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.5 required=5.0 tests=AWL,BAYES_00,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 X-HELO: NAM02-CY1-obe.outbound.protection.outlook.com Received: from mail-cys01nam02on0083.outbound.protection.outlook.com (HELO NAM02-CY1-obe.outbound.protection.outlook.com) (104.47.37.83) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA256 encrypted) ESMTPS; Tue, 08 Dec 2015 22:24:53 +0000 Received: from CY1NAM02FT046.eop-nam02.prod.protection.outlook.com (10.152.74.59) by CY1NAM02HT186.eop-nam02.prod.protection.outlook.com (10.152.74.155) with Microsoft SMTP Server (TLS) id 15.1.346.13; Tue, 8 Dec 2015 22:24:50 +0000 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; gcc.gnu.org; dkim=none (message not signed) header.d=none;gcc.gnu.org; dmarc=bestguesspass action=none header.from=xilinx.com; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.60.100 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.100; helo=xsj-pvapsmtpgw02; Received: from xsj-pvapsmtpgw02 (149.199.60.100) by CY1NAM02FT046.mail.protection.outlook.com (10.152.74.232) with Microsoft SMTP Server (TLS) id 15.1.346.13 via Frontend Transport; Tue, 8 Dec 2015 22:24:49 +0000 Received: from unknown-38-66.xilinx.com ([149.199.38.66]:53585 helo=xsj-pvapsmtp01) by xsj-pvapsmtpgw02 with esmtp (Exim 4.63) (envelope-from ) id 1a6Qgj-0003Ck-AY; Tue, 08 Dec 2015 14:24:49 -0800 Received: from [127.0.0.1] (helo=xsj-smtp-dlp1.xlnx.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1a6Qgj-0007xX-6h; Tue, 08 Dec 2015 14:24:49 -0800 Received: from xsj-pvapsmtp01 (mailman.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id tB8MOmYW021008; Tue, 8 Dec 2015 14:24:48 -0800 Received: from [172.22.159.26] (helo=XAP-PVEXCAS02.xlnx.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1a6Qgi-0007xK-1W; Tue, 08 Dec 2015 14:24:48 -0800 Received: from XAP-PVEXMBX02.xlnx.xilinx.com ([fe80::6c95:7dae:8014:5ca1]) by XAP-PVEXCAS02.xlnx.xilinx.com ([::1]) with mapi id 14.03.0248.002; Wed, 9 Dec 2015 06:24:47 +0800 From: Ajit Kumar Agarwal To: Jeff Law , GCC Patches CC: Vinod Kathail , Shail Aditya Gupta , Vidhumouli Hunsigida , "Nagaraju Mekala" Subject: [Patch,rtl Optimization]: Better register pressure estimate for Loop Invariant Code Motion. Date: Tue, 08 Dec 2015 22:24:00 -0000 Message-ID: <37378DC5BCD0EE48BA4B082E0B55DFAA429D3942@XAP-PVEXMBX02.xlnx.xilinx.com> Content-Type: multipart/mixed; boundary="_002_37378DC5BCD0EE48BA4B082E0B55DFAA429D3942XAPPVEXMBX02xln_" MIME-Version: 1.0 X-RCIS-Action: ALLOW X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(54534003)(189002)(199003)(377424004)(11100500001)(6116002)(5004730100002)(2920100001)(106466001)(33656002)(4610100001)(2900100001)(81156007)(2930100002)(5003600100002)(99936001)(86362001)(5001960100002)(55846006)(5260100001)(5001770100001)(6806005)(5890100001)(3846002)(63266004)(5250100002)(512954002)(586003)(54356999)(107886002)(229853001)(50986999)(87936001)(568964002)(1096002)(1220700001)(2476003)(19580405001)(4001430100002)(260700001)(102836003)(19580395003)(300700001)(189998001)(92566002)(84326002)(5008740100001)(107986001)(142933001)(5001870100001);DIR:OUT;SFP:1101;SCL:1;SRVR:CY1NAM02HT186;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;PTR:unknown-60-100.xilinx.com,xapps1.xilinx.com;MX:1;A:1;LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501001);SRVR:CY1NAM02HT186; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(192813158149592); X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(8121501046)(5005006)(520078)(10201501046)(3002001);SRVR:CY1NAM02HT186;BCL:0;PCL:0;RULEID:;SRVR:CY1NAM02HT186; X-Forefront-PRVS: 0784C803FD X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Dec 2015 22:24:49.8828 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1NAM02HT186 X-SW-Source: 2015-12/txt/msg00927.txt.bz2 --_002_37378DC5BCD0EE48BA4B082E0B55DFAA429D3942XAPPVEXMBX02xln_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Content-length: 6496 Based on the comments on RFC patch this patch incorporates all the comments= from Jeff. Thanks Jeff for the valuable feedback. This patch enables the better register pressure estimate for Loop Invariant= code motion. This patch Calculate the Loop Liveness used for regs_used=20 used to calculate the register pressure used in the cost estimation. Loop Liveness is based on the following properties. we only require to cal= culate the set of objects that are live at the birth or the header of the l= oop. We don't need to calculate the live through the Loop considering Live in and L= ive out of all the basic blocks of the Loop. This is because the set of obj= ects. That=20 are live-in at the birth or header of the loop will be live-in at every nod= e in the Loop. If a v live out at the header of the loop then the variable is live-in at e= very node in the Loop. To prove this, Consider a Loop L with header h such = that The variable v defined at d is live-in at h. Since v is live at h, d is not par= t of L. This follows from the dominance property, i.e. h is strictly domina= ted by d.=20 Furthermore, there exists a path from h to a use of v which does not go thr= ough d. For every node of the loop, p, since the loop is strongly connected= =20 Component of the CFG, there exists a path, consisting only of nodes of L fr= om p to h. Concatenating those two paths prove that v is live-in and live-o= ut Of p. Also Calculate the Live-Out and Live-In for the exit edge of the loop. This= considers liveness for not only the Loop latch but also the liveness outsi= de the Loops. Bootstrapped and Regtested for x86_64 and microblaze target. There is an extra failure for the testcase gcc.dg/loop-invariant.c with th= e change that looks correct to me.=20 This is because the available_regs =3D 6 and the regs_needed =3D 1 and new_= regs =3D 0 and the regs_used =3D 10. As the reg_used that are based on the= Liveness given above is greater than the available_regs, then it's candidate of spil= l and the estimate_register_pressure calculates the spill cost. This spill = cost is greater=20 than inv_cost and gain comes to be negative. The disables the loop invarian= t for the above testcase.=20 Disabling of the Loop invariant for the testcase loop-invariant.c with this= patch looks correct to me considering the calculation of available_regs i= n cfgloopanal.c=20 is correct. ChangeLog: 2015-12-09 Ajit Agarwal * loop-invariant.c (calculate_loop_liveness): New. (move_loop_invariants): Use of calculate_loop_liveness. Signed-off-by:Ajit Agarwal ajitkum@xilinx.com --- gcc/loop-invariant.c | 77 ++++++++++++++++++++++++++++++++++++++++++----= ---- 1 files changed, 65 insertions(+), 12 deletions(-) diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c index 53d1377..ac08594 100644 --- a/gcc/loop-invariant.c +++ b/gcc/loop-invariant.c @@ -1464,18 +1464,7 @@ find_invariants_to_move (bool speed, bool call_p) registers used; we put some initial bound here to stand for induction variables etc. that we do not detect. */ { - unsigned int n_regs =3D DF_REG_SIZE (df); - - regs_used =3D 2; - - for (i =3D 0; i < n_regs; i++) - { - if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i)) - { - /* This is a value that is used but not changed inside loop. */ - regs_used++; - } - } + regs_used =3D bitmap_count_bits (&LOOP_DATA (curr_loop)->regs_live) = + 2; } =20 if (! flag_ira_loop_pressure) @@ -1966,7 +1955,63 @@ mark_ref_regs (rtx x) } } =20 +/* Calculate the Loop Liveness used for regs_used used in=20 + heuristics to calculate the register pressure. */ + +static void +calculate_loop_liveness (void) +{ + struct loop *loop; + + FOR_EACH_LOOP (loop, 0) + if (loop->aux =3D=3D NULL) + { + loop->aux =3D xcalloc (1, sizeof (struct loop_data)); + bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); + } + + FOR_EACH_LOOP (loop, LI_FROM_INNERMOST) + { + int i; + edge e; + vec edges; + edges =3D get_loop_exit_edges (loop); + + /* Loop Liveness is based on the following proprties. + we only require to calculate the set of objects that are live at + the birth or the header of the loop. + We don't need to calculate the live through the Loop considering + Live in and Live out of all the basic blocks of the Loop. This is + because the set of objects. That are live-in at the birth or header + of the loop will be live-in at every node in the Loop. + + If a v live out at the header of the loop then the variable is live= -in + at every node in the Loop. To prove this, Consider a Loop L with he= ader + h such that The variable v defined at d is live-in at h. Since v is= live + at h, d is not part of L. This follows from the dominance property,= i.e. + h is strictly dominated by d. Furthermore, there exists a path from= h to + a use of v which does not go through d. For every node of the loop,= p, + since the loop is strongly connected Component of the CFG, there ex= ists + a path, consisting only of nodes of L from p to h. Concatenating th= ose + two paths prove that v is live-in and live-out Of p. */ + + bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_IN (loop->header)= ); + bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_OUT (loop->header= )); + + /* Calculate the Live-Out and Live-In for the exit edge of the loop. + This considers liveness for not only the Loop latch but also the=20 + liveness outside the Loops. */ + + FOR_EACH_VEC_ELT (edges, i, e) + { + bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_OUT (e->src)); + bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_IN (e->dest)); + } + } +} + /* Calculate register pressure in the loops. */ + static void calculate_loop_reg_pressure (void) { @@ -2103,6 +2148,14 @@ move_loop_invariants (void) calculate_loop_reg_pressure (); regstat_free_n_sets_and_refs (); } + else + { + df_analyze(); + regstat_init_n_sets_and_refs (); + calculate_loop_liveness(); + regstat_free_n_sets_and_refs (); + } + df_set_flags (DF_EQ_NOTES + DF_DEFER_INSN_RESCAN); /* Process the loops, innermost first. */ FOR_EACH_LOOP (loop, LI_FROM_INNERMOST) --=20 1.7.1 Thanks & Regards Ajit --_002_37378DC5BCD0EE48BA4B082E0B55DFAA429D3942XAPPVEXMBX02xln_ Content-Type: application/octet-stream; name="reg-pressure-licm.patch" Content-Description: reg-pressure-licm.patch Content-Disposition: attachment; filename="reg-pressure-licm.patch"; size=5568; creation-date="Tue, 08 Dec 2015 22:07:21 GMT"; modification-date="Tue, 08 Dec 2015 22:06:50 GMT" Content-Transfer-Encoding: base64 Content-length: 7548 RnJvbSA1YWJjMmQ2ZGZiNTJkYzA0YjRhODM1MWQ1ZmE5YTY4MzY0MzZlMmZl IE1vbiBTZXAgMTcgMDA6MDA6MDAgMjAwMQpGcm9tOiBBaml0IEt1bWFyIEFn YXJ3YWwgPGFqaXRrdW1AeGlsaXguY29tPgpEYXRlOiBXZWQsIDkgRGVjIDIw MTUgMDM6Mjk6NTUgKzA1MzAKU3ViamVjdDogW1BBVENIXSBbUGF0Y2gscnRs IE9wdGltaXphdGlvbl06IEJldHRlciByZWdpc3RlciBwcmVzc3VyZSBlc3Rp bWF0ZSBmb3IgTG9vcCBJbnZhcmlhbnQgQ29kZSBNb3Rpb24uCgpDYWxjdWxh dGUgdGhlIExvb3AgTGl2ZW5lc3MgdXNlZCBmb3IgcmVnc191c2VkIHVzZWQg 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