From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-x52a.google.com (mail-pg1-x52a.google.com [IPv6:2607:f8b0:4864:20::52a]) by sourceware.org (Postfix) with ESMTPS id 08198389F032 for ; Tue, 15 Nov 2022 17:25:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 08198389F032 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pg1-x52a.google.com with SMTP id s196so13891533pgs.3 for ; Tue, 15 Nov 2022 09:25:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=aUzcKkNoGxfJ3jMmVWKhtpvyid5BOoER9zSvUcJ03x4=; b=gpAhZFUOfxsEs+krlGFSei/dtFHWSPC+PAwaApyjELHOxEH1iuG1JbHqeCWIT9UxL5 Wy629sGjMbdm2x9zpSMkcN1I4Icq8SRGW14rJrJ9suz+mwFEPvQz7QB/X9FJeq5yuWVb 8AtT21u7PHElkY7Da+L8YxrSOhqqYqLNlkcC8XpbU6JCv594AFKr9bfISfKGWNOKD89G u/8qH3fgkh+201G2G0ORi1lH7R2tip5WqlKrzY57gGGaVNGWrEovOnvdJdkC1JKTNOLN tUTUQgAiMFBC695X5pRjbSsYpyQ4vXXrn5fGM947h+9NfDG4OS58oH0gdp4gNt0P88os LiLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=aUzcKkNoGxfJ3jMmVWKhtpvyid5BOoER9zSvUcJ03x4=; b=GY8rKW9aPgyI9Fe5yvqpRztQQKTfo0qhOfGcoRSUZOQRKrSK83qwbZ3ACOt/2sY6Da Nks3oLSbeWEcL3JkqwXXqT4SPod7Q/C0RWqT4Zk1ArsBwP1HLHQkgibKo+ksWUZh1dMo 3KALVaDanRrnfpxTeKZ5NX1rPkq4nHPKGSrFAE104YNVWjDZtzIGcxesptKuH2rGgeJL BOqqnAJ+uxi82ENt7MO/11JtXb4seZKDM7FSYbpt9i4YbtuoQBcmLcV72jEeGSOzkIRD fEF+1IBLpH5pn8Vs8DzJIOkv80t9l9ajW9zE4y4Ia0Y5aASBMfBf12lM6fIRUkEsIY27 zSgQ== X-Gm-Message-State: ANoB5pkuMJ/nCu4B+gizMg4By6at0hQ17m/+vpJS54503+Tz/oJP8lWY 753XWa5DPGgMI/14v/pzBG4= X-Google-Smtp-Source: AA0mqf5qDRHKOj3ZbAU/+zJYxoJrDQIsEpBSdNltk24Z/PNksm9WAn9NtBqWUVfmDdLXGzteqKnsOA== X-Received: by 2002:a63:1a59:0:b0:473:c377:b82 with SMTP id a25-20020a631a59000000b00473c3770b82mr17556902pgm.113.1668533142962; Tue, 15 Nov 2022 09:25:42 -0800 (PST) Received: from ?IPV6:2601:681:8600:13d0::f0a? ([2601:681:8600:13d0::f0a]) by smtp.gmail.com with ESMTPSA id u16-20020a170902e5d000b00186fb8f931asm10250986plf.206.2022.11.15.09.25.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 15 Nov 2022 09:25:41 -0800 (PST) Message-ID: <391fc4c2-9817-5e36-643c-b32fc635f6dd@gmail.com> Date: Tue, 15 Nov 2022 10:25:40 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.1 Subject: Re: [PATCH] RISC-V: Split "(a & (1UL << bitno)) ? 0 : -1" to bext + addi Content-Language: en-US To: Philipp Tomsich , gcc-patches@gcc.gnu.org Cc: Vineet Gupta , Kito Cheng , Christoph Muellner , Jeff Law , Palmer Dabbelt References: <20221113204840.4062092-1-philipp.tomsich@vrull.eu> From: Jeff Law In-Reply-To: <20221113204840.4062092-1-philipp.tomsich@vrull.eu> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,KAM_SHORT,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 11/13/22 13:48, Philipp Tomsich wrote: > For a straightforward application of bext for the following function > long bext64(long a, char bitno) > { > return (a & (1UL << bitno)) ? 0 : -1; > } > we generate > srl a0,a0,a1 # 7 [c=4 l=4] lshrdi3 > andi a0,a0,1 # 8 [c=4 l=4] anddi3/1 > addi a0,a0,-1 # 14 [c=4 l=4] adddi3/1 > due to the following failed match at combine time: > (set (reg:DI 82) > (zero_extract:DI (reg:DI 83) > (const_int 1 [0x1]) > (reg:DI 84))) > > The existing pattern for bext requires the 3rd argument to > zero_extract to be a QImode register wrapped in a zero_extension. > This adds an additional pattern that allows an Xmode argument. > > With this change, the testcase compiles to > bext a0,a0,a1 # 8 [c=4 l=4] *bextdi > addi a0,a0,-1 # 14 [c=4 l=4] adddi3/1 > > gcc/ChangeLog: > > * config/riscv/bitmanip.md (*bext): Add an additional > pattern that allows the 3rd argument to zero_extract to be > an Xmode register operand. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/zbs-bext.c: Add testcases. > * gcc.target/riscv/zbs-bexti.c: Add testcases. It's fairly common to want variants with extraction as well as a simple register operand.   The biggest concern is typically around SHIFT_COUNT_TRUNCATED, but given we already have an extract variant y'all should have already addressed concerns around SHIFT_COUNT_TRUNCATED. OK. jeff