From: "Richard Earnshaw (lists)" <Richard.Earnshaw@arm.com>
To: Andre Vieira <andre.simoesdiasvieira@arm.com>, gcc-patches@gcc.gnu.org
Cc: stam.markianos-wright@arm.com
Subject: Re: [PATCH 0/2] arm, doloop: Add support for MVE Tail-Predicated Low Overhead Loops
Date: Wed, 19 Jun 2024 13:40:41 +0100 [thread overview]
Message-ID: <3a081c84-27dc-42b4-b9d4-a91799344d1d@arm.com> (raw)
In-Reply-To: <20240523143742.28518-1-andre.simoesdiasvieira@arm.com>
On 23/05/2024 15:37, Andre Vieira wrote:
>
> Hi,
>
> We held these two patches back in stage 4 because they touched target-agnostic code, though I am quite confident they will not affect other targets. Given stage one has reopened, I am reposting them, I rebased them but they seem to apply cleanly on trunk.
> No changes from previously reviewed patches.
>
> OK for trunk?
>
> Andre Vieira (2):
> doloop: Add support for predicated vectorized loops
> arm: Add support for MVE Tail-Predicated Low Overhead Loops
>
> gcc/config/arm/arm-protos.h | 4 +-
> gcc/config/arm/arm.cc | 1249 ++++++++++++++++-
> gcc/config/arm/arm.opt | 3 +
> gcc/config/arm/iterators.md | 15 +
> gcc/config/arm/mve.md | 50 +
> gcc/config/arm/thumb2.md | 138 +-
> gcc/config/arm/types.md | 6 +-
> gcc/config/arm/unspecs.md | 14 +-
> gcc/df-core.cc | 15 +
> gcc/df.h | 1 +
> gcc/loop-doloop.cc | 164 ++-
> gcc/testsuite/gcc.target/arm/lob.h | 128 +-
> gcc/testsuite/gcc.target/arm/lob1.c | 23 +-
> gcc/testsuite/gcc.target/arm/lob6.c | 8 +-
> .../gcc.target/arm/mve/dlstp-compile-asm-1.c | 146 ++
> .../gcc.target/arm/mve/dlstp-compile-asm-2.c | 749 ++++++++++
> .../gcc.target/arm/mve/dlstp-compile-asm-3.c | 46 +
> .../gcc.target/arm/mve/dlstp-int16x8-run.c | 44 +
> .../gcc.target/arm/mve/dlstp-int16x8.c | 31 +
> .../gcc.target/arm/mve/dlstp-int32x4-run.c | 45 +
> .../gcc.target/arm/mve/dlstp-int32x4.c | 31 +
> .../gcc.target/arm/mve/dlstp-int64x2-run.c | 48 +
> .../gcc.target/arm/mve/dlstp-int64x2.c | 28 +
> .../gcc.target/arm/mve/dlstp-int8x16-run.c | 44 +
> .../gcc.target/arm/mve/dlstp-int8x16.c | 32 +
> .../gcc.target/arm/mve/dlstp-invalid-asm.c | 521 +++++++
> 26 files changed, 3434 insertions(+), 149 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-1.c
> create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c
> create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-3.c
> create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int16x8-run.c
> create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int16x8.c
> create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int32x4-run.c
> create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int32x4.c
> create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int64x2-run.c
> create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int64x2.c
> create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int8x16-run.c
> create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-int8x16.c
> create mode 100644 gcc/testsuite/gcc.target/arm/mve/dlstp-invalid-asm.c
>
These are OK. Please watch out for any fallout on other architectures.
R.
next prev parent reply other threads:[~2024-06-19 12:40 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-23 14:37 [PATCH 0/2] arm,doloop: " Andre Vieira
2024-05-23 14:37 ` [PATCH 1/2] doloop: Add support for predicated vectorized loops Andre Vieira
2024-05-23 14:37 ` [PATCH 2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops Andre Vieira
2024-06-19 12:40 ` Richard Earnshaw (lists) [this message]
-- strict thread matches above, loose matches on Subject: below --
2024-05-23 8:22 [PATCH 0/2] arm,doloop: " Andre Vieira
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