From: Vladimir Makarov <vmakarov@redhat.com>
To: Hongyu Wang <hongyu.wang@intel.com>, gcc-patches@gcc.gnu.org
Cc: ubizjak@gmail.com, jakub@redhat.com,
Kong Lingling <lingling.kong@intel.com>,
Hongtao Liu <hongtao.liu@intel.com>
Subject: Re: [PATCH 02/13] [APX EGPR] middle-end: Add index_reg_class with insn argument.
Date: Fri, 22 Sep 2023 12:03:24 -0400 [thread overview]
Message-ID: <3ba65322-2c67-a0e8-fbcf-6b6057bd1786@redhat.com> (raw)
In-Reply-To: <20230922105631.2298849-3-hongyu.wang@intel.com>
On 9/22/23 06:56, Hongyu Wang wrote:
> Like base_reg_class, INDEX_REG_CLASS also does not support backend insn.
> Add index_reg_class with insn argument for lra/reload usage.
>
> gcc/ChangeLog:
>
> * addresses.h (index_reg_class): New wrapper function like
> base_reg_class.
> * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
> * doc/tm.texi.in: Ditto.
> * lra-constraints.cc (index_part_to_reg): Pass index_class.
> (process_address_1): Calls index_reg_class with curr_insn and
> replace INDEX_REG_CLASS with its return value index_cl.
> * reload.cc (find_reloads_address): Likewise.
> (find_reloads_address_1): Likewise.
>
The patch is ok for me to commit it to the trunk. Thank you.
So all changes to the RA have been reviewed. You just need an approval
to the rest patches from an x86-64 maintainer.
next prev parent reply other threads:[~2023-09-22 16:03 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-22 10:56 [PATCH v2 00/13] Support Intel APX EGPR Hongyu Wang
2023-09-22 10:56 ` [PATCH 01/13] [APX EGPR] middle-end: Add insn argument to base_reg_class Hongyu Wang
2023-09-22 16:02 ` Vladimir Makarov
2023-10-07 8:22 ` Hongyu Wang
2023-09-22 10:56 ` [PATCH 02/13] [APX EGPR] middle-end: Add index_reg_class with insn argument Hongyu Wang
2023-09-22 16:03 ` Vladimir Makarov [this message]
2023-09-22 10:56 ` [PATCH 03/13] [APX_EGPR] Initial support for APX_F Hongyu Wang
2023-10-07 2:35 ` Hongtao Liu
2023-09-22 10:56 ` [PATCH 04/13] [APX EGPR] Add 16 new integer general purpose registers Hongyu Wang
2023-09-22 10:56 ` [PATCH 05/13] [APX EGPR] Add register and memory constraints that disallow EGPR Hongyu Wang
2023-09-22 10:56 ` [PATCH 06/13] [APX EGPR] Add backend hook for base_reg_class/index_reg_class Hongyu Wang
2023-09-22 10:56 ` [PATCH 07/13] [APX EGPR] Map reg/mem constraints in inline asm to non-EGPR constraint Hongyu Wang
2023-09-22 10:56 ` [PATCH 08/13] [APX EGPR] Handle GPR16 only vector move insns Hongyu Wang
2023-09-22 10:56 ` [PATCH 09/13] [APX EGPR] Handle legacy insn that only support GPR16 (1/5) Hongyu Wang
2023-09-22 10:56 ` [PATCH 10/13] [APX EGPR] Handle legacy insns that only support GPR16 (2/5) Hongyu Wang
2023-09-22 10:56 ` [PATCH 11/13] [APX EGPR] Handle legacy insns that only support GPR16 (3/5) Hongyu Wang
2023-09-22 10:56 ` [PATCH 12/13] [APX_EGPR] Handle legacy insns that only support GPR16 (4/5) Hongyu Wang
2023-09-22 10:56 ` [PATCH 13/13] [APX EGPR] Handle vex insns that only support GPR16 (5/5) Hongyu Wang
2023-09-25 2:02 ` [PATCH v2 00/13] Support Intel APX EGPR Hongtao Liu
-- strict thread matches above, loose matches on Subject: below --
2023-08-31 8:20 [PATCH 00/13] [RFC] " Hongyu Wang
2023-08-31 8:20 ` [PATCH 02/13] [APX EGPR] middle-end: Add index_reg_class with insn argument Hongyu Wang
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