[PATCH 0/2] Force usage of LRA for all rs6000 port compiles.

[PATCH 0/2] Force usage of LRA for all rs6000 port compiles.

[Peter Bergner]

In GCC 7, the rs6000 port made the switch to using LRA over reload by
default.  We kept the ability of using reload in case there was an LRA
issue.  We have squashed all known rs6000 specific LRA bugs and now is
the time to remove the ability to use reload from GCC 8/rs6000.

The first patch replaces the -mlra option with a dummy stub and disallows
using the -mno-lra option.  It also removes the target bit mask and its usage.
Finally, it updates the testsuite by removing all usage of the -mlra and
-mno-lra options.

The second patch removes the now dead reload_in_progress usage and any
code dependent on that.

Peter

[PATCH 1/2] Eliminate -mno-lra from the rs6000 port.

[Peter Bergner]

This patch makes the -mlra option a nop while disallowing -mno-lra.
It also removes the target bit mask and its usage.
Finally, this patch updates the testsuite by removing all usage of
the -mlra and -mno-lra options.

This passed bootstrap and regtesting with no regressions, ok for trunk?

Peter


gcc/

	* config/rs6000/rs6000.opt (mlra): Replace with stub.
	* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Delete OPTION_MASK_LRA.
	* config/rs6000/rs6000.c (TARGET_LRA_P): Delete.
	(rs6000_debug_reg_global): Delete print of LRA status.
	(rs6000_option_override_internal): Delete dead LRA related code.
	(rs6000_lra_p): Delete function.
	* doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mlra.

gcc/testsuite/

	* g++.dg/pr69667.C: Remove option -mlra.
	* gcc.target/powerpc/dform-1.c: Likewise.
	* gcc.target/powerpc/dform-2.c: Likewise.
	* gcc.target/powerpc/dform-3.c: Likewise.
	* gcc.target/powerpc/p8vector-int128-1.c: Likewise.
	* gcc.target/powerpc/p9-vparity.c: Likewise.
	* gcc.target/powerpc/pr63491.c: Likewise.
	* gcc.target/powerpc/pr67808.c: Likewise.
	* gcc.target/powerpc/pr68805.c: Likewise.
	* gcc.target/powerpc/pr69461.c: Likewise.
	* gcc.target/powerpc/pr71680.c: Likewise.
	* gcc.target/powerpc/pr77289.c: Likewise.
	* gcc.target/powerpc/pr78458.c: Likewise.
	* gcc.target/powerpc/pr78543.c: Likewise.
	* g++.dg/pr71294.C: Remove option -mno-lra.
	* gcc.target/powerpc/pr71656-1.c: Likewise.
	* gcc.target/powerpc/pr71656-2.c: Likewise.
	* gcc.target/powerpc/pr71698.c: Likewise.

Index: gcc/config/rs6000/rs6000.opt
===================================================================
--- gcc/config/rs6000/rs6000.opt	(revision 250587)
+++ gcc/config/rs6000/rs6000.opt	(working copy)
@@ -430,9 +430,9 @@ mlong-double-
 Target RejectNegative Joined UInteger Var(rs6000_long_double_type_size) Save
 -mlong-double-<n>	Specify size of long double (64 or 128 bits).
 
+; This option existed in the past, but now is always on.
 mlra
-Target Report Mask(LRA) Var(rs6000_isa_flags)
-Enable Local Register Allocation.
+Target RejectNegative Undocumented Ignore
 
 msched-costly-dep=
 Target RejectNegative Joined Var(rs6000_sched_costly_dep_str)
Index: gcc/config/rs6000/rs6000-cpus.def
===================================================================
--- gcc/config/rs6000/rs6000-cpus.def	(revision 250587)
+++ gcc/config/rs6000/rs6000-cpus.def	(working copy)
@@ -126,7 +126,6 @@
 				 | OPTION_MASK_FPRND			\
 				 | OPTION_MASK_HTM			\
 				 | OPTION_MASK_ISEL			\
-				 | OPTION_MASK_LRA			\
 				 | OPTION_MASK_MFCRF			\
 				 | OPTION_MASK_MFPGPR			\
 				 | OPTION_MASK_MODULO			\
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	(revision 250587)
+++ gcc/config/rs6000/rs6000.c	(working copy)
@@ -1887,9 +1887,6 @@ static const struct attribute_spec rs600
 #undef TARGET_MODE_DEPENDENT_ADDRESS_P
 #define TARGET_MODE_DEPENDENT_ADDRESS_P rs6000_mode_dependent_address_p
 
-#undef TARGET_LRA_P
-#define TARGET_LRA_P rs6000_lra_p
-
 #undef TARGET_COMPUTE_PRESSURE_CLASSES
 #define TARGET_COMPUTE_PRESSURE_CLASSES rs6000_compute_pressure_classes
 
@@ -2793,8 +2790,6 @@ rs6000_debug_reg_global (void)
   if (TARGET_LINK_STACK)
     fprintf (stderr, DEBUG_FMT_S, "link_stack", "true");
 
-  fprintf (stderr, DEBUG_FMT_S, "lra", TARGET_LRA ? "true" : "false");
-
   if (TARGET_P8_FUSION)
     {
       char options[80];
@@ -4562,35 +4557,10 @@ rs6000_option_override_internal (bool gl
 	}
     }
 
-  /* Enable LRA by default.  */
-  if ((rs6000_isa_flags_explicit & OPTION_MASK_LRA) == 0)
-    rs6000_isa_flags |= OPTION_MASK_LRA;
-
-  /* There have been bugs with -mvsx-timode that don't show up with -mlra,
-     but do show up with -mno-lra.  Given -mlra will become the default once
-     PR 69847 is fixed, turn off the options with problems by default if
-     -mno-lra was used, and warn if the user explicitly asked for the option.
-
-     Enable -mpower9-dform-vector by default if LRA and other power9 options.
-     Enable -mvsx-timode by default if LRA and VSX.  */
-  if (!TARGET_LRA)
-    {
-      if (TARGET_VSX_TIMODE)
-	{
-	  if ((rs6000_isa_flags_explicit & OPTION_MASK_VSX_TIMODE) != 0)
-	    warning (0, "-mvsx-timode might need -mlra");
-
-	  else
-	    rs6000_isa_flags &= ~OPTION_MASK_VSX_TIMODE;
-	}
-    }
-
-  else
-    {
-      if (TARGET_VSX && !TARGET_VSX_TIMODE
-	  && (rs6000_isa_flags_explicit & OPTION_MASK_VSX_TIMODE) == 0)
-	rs6000_isa_flags |= OPTION_MASK_VSX_TIMODE;
-    }
+  /* Enable -mvsx-timode by default if VSX.  */
+  if (TARGET_VSX && !TARGET_VSX_TIMODE
+      && (rs6000_isa_flags_explicit & OPTION_MASK_VSX_TIMODE) == 0)
+    rs6000_isa_flags |= OPTION_MASK_VSX_TIMODE;
 
   /* Set -mallow-movmisalign to explicitly on if we have full ISA 2.07
      support. If we only have ISA 2.06 support, and the user did not specify
@@ -35895,14 +35865,6 @@ rs6000_libcall_value (machine_mode mode)
   return gen_rtx_REG (mode, regno);
 }
 
-
-/* Return true if we use LRA instead of reload pass.  */
-static bool
-rs6000_lra_p (void)
-{
-  return TARGET_LRA;
-}
-
 /* Compute register pressure classes.  We implement the target hook to avoid
    IRA picking something like NON_SPECIAL_REGS as a pressure class, which can
    lead to incorrect estimates of number of available registers and therefor
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi	(revision 250587)
+++ gcc/doc/invoke.texi	(working copy)
@@ -1048,8 +1048,7 @@ See RS/6000 and PowerPC Options.
 -mfloat128  -mno-float128  -mfloat128-hardware  -mno-float128-hardware @gol
 -mgnu-attribute  -mno-gnu-attribute @gol
 -mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{reg} @gol
--mstack-protector-guard-offset=@var{offset} @gol
--mlra  -mno-lra}
+-mstack-protector-guard-offset=@var{offset}}
 
 @emph{RX Options}
 @gccoptlist{-m64bit-doubles  -m32bit-doubles  -fpu  -nofpu@gol
@@ -21841,11 +21840,6 @@ This switch enables or disables the gene
 This switch has been deprecated.  Use @option{-misel} and
 @option{-mno-isel} instead.
 
-@item -mlra
-@opindex mlra
-Enable Local Register Allocation. By default the port uses LRA.
-(i.e. @option{-mno-lra}).
-
 @item -mspe
 @itemx -mno-spe
 @opindex mspe
Index: gcc/testsuite/g++.dg/pr69667.C
===================================================================
--- gcc/testsuite/g++.dg/pr69667.C	(revision 250587)
+++ gcc/testsuite/g++.dg/pr69667.C	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
-/* { dg-options "-mcpu=power8 -w -std=c++14 -mlra" } */
+/* { dg-options "-mcpu=power8 -w -std=c++14" } */
 
 /* target/69667, compiler got
    internal compiler error: Max. number of generated reload insns per insn is achieved (90)  */
Index: gcc/testsuite/g++.dg/pr71294.C
===================================================================
--- gcc/testsuite/g++.dg/pr71294.C	(revision 250587)
+++ gcc/testsuite/g++.dg/pr71294.C	(working copy)
@@ -1,7 +1,7 @@
 // { dg-do compile { target { powerpc64*-*-* && lp64 } } }
 // { dg-require-effective-target powerpc_p8vector_ok } */
 // { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } }
-// { dg-options "-mcpu=power8 -O3 -fstack-protector -mno-lra" }
+// { dg-options "-mcpu=power8 -O3 -fstack-protector" }
 
 // PAR target/71294 failed because RELOAD could not figure how create a V2DI
 // vector that auto vectorization created with each element being the same
Index: gcc/testsuite/gcc.target/powerpc/dform-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/dform-1.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/dform-1.c	(working copy)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-mcpu=power9 -mpower9-dform -O2 -mlra" } */
+/* { dg-options "-mcpu=power9 -mpower9-dform -O2" } */
 
 #ifndef TYPE
 #define TYPE double
Index: gcc/testsuite/gcc.target/powerpc/dform-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/dform-2.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/dform-2.c	(working copy)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-mcpu=power9 -mpower9-dform -O2 -mlra" } */
+/* { dg-options "-mcpu=power9 -mpower9-dform -O2" } */
 
 #ifndef TYPE
 #define TYPE float
Index: gcc/testsuite/gcc.target/powerpc/dform-3.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/dform-3.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/dform-3.c	(working copy)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-mcpu=power9 -mpower9-dform -O2 -mlra" } */
+/* { dg-options "-mcpu=power9 -mpower9-dform -O2" } */
 
 #ifndef TYPE
 #define TYPE vector double
Index: gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
-/* { dg-options "-mcpu=power8 -O3 -mvsx-timode -mlra" } */
+/* { dg-options "-mcpu=power8 -O3 -mvsx-timode" } */
 
 #include <altivec.h>
 
Index: gcc/testsuite/gcc.target/powerpc/p9-vparity.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/p9-vparity.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/p9-vparity.c	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-mcpu=power9 -O2 -mlra -mvsx-timode" } */
+/* { dg-options "-mcpu=power9 -O2 -mvsx-timode" } */
 
 #include <altivec.h>
 
Index: gcc/testsuite/gcc.target/powerpc/pr63491.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr63491.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr63491.c	(working copy)
@@ -1,5 +1,5 @@
 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
-/* { dg-options "-O1 -mcpu=power8 -mlra" } */
+/* { dg-options "-O1 -mcpu=power8" } */
 
 typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t;
 typedef unsigned long long scalar_64_t;
Index: gcc/testsuite/gcc.target/powerpc/pr67808.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr67808.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr67808.c	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
-/* { dg-options "-O1 -mvsx -mlra -mcpu=power7 -mlong-double-128" } */
+/* { dg-options "-O1 -mvsx -mcpu=power7 -mlong-double-128" } */
 
 /* PR 67808: LRA ICEs on simple double to long double conversion test case */
 
Index: gcc/testsuite/gcc.target/powerpc/pr68805.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr68805.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr68805.c	(working copy)
@@ -1,6 +1,6 @@
 /* { dg-do compile { target powerpc64le-*-* } } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
-/* { dg-options "-O2 -mvsx-timode -mcpu=power8 -mlra" } */
+/* { dg-options "-O2 -mvsx-timode -mcpu=power8" } */
 
 typedef struct bar {
   void *a;
Index: gcc/testsuite/gcc.target/powerpc/pr69461.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr69461.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr69461.c	(working copy)
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O3 -mlra" } */
+/* { dg-options "-O3" } */
 
 extern void _setjmp (void);
 typedef struct {
Index: gcc/testsuite/gcc.target/powerpc/pr71656-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr71656-1.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr71656-1.c	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-O1 -mcpu=power9 -mpower9-dform-vector -mno-lra" } */
+/* { dg-options "-O1 -mcpu=power9 -mpower9-dform-vector" } */
 
 typedef __attribute__((altivec(vector__))) int type_t;
 type_t
Index: gcc/testsuite/gcc.target/powerpc/pr71656-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr71656-2.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr71656-2.c	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-O3 -mcpu=power9 -mpower9-dform-vector -mno-lra -funroll-loops -fno-aggressive-loop-optimizations" } */
+/* { dg-options "-O3 -mcpu=power9 -mpower9-dform-vector -funroll-loops -fno-aggressive-loop-optimizations" } */
 
 typedef double vec[3];
 struct vec_t
Index: gcc/testsuite/gcc.target/powerpc/pr71680.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr71680.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr71680.c	(working copy)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
-/* { dg-options "-mcpu=power8 -O1 -mlra" } */
+/* { dg-options "-mcpu=power8 -O1" } */
 
 #pragma pack(1)
 struct
Index: gcc/testsuite/gcc.target/powerpc/pr71698.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr71698.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr71698.c	(working copy)
@@ -3,7 +3,7 @@
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-require-effective-target dfp } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-O1 -mcpu=power9 -mno-lra" } */
+/* { dg-options "-O1 -mcpu=power9" } */
 
 extern void testvad128 (int n, ...);
 void
Index: gcc/testsuite/gcc.target/powerpc/pr77289.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr77289.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr77289.c	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
-/* { dg-options "-O3 -mcpu=power7 -funroll-loops -ffast-math -mlra -mupdate -fno-auto-inc-dec" } */
+/* { dg-options "-O3 -mcpu=power7 -funroll-loops -ffast-math -mupdate -fno-auto-inc-dec" } */
 
 /* PR 77289: LRA ICEs due to invalid constraint checking.  */
 
Index: gcc/testsuite/gcc.target/powerpc/pr78458.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr78458.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr78458.c	(working copy)
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mcpu=8548 -mspe -mabi=spe -mlra" } */
+/* { dg-options "-mcpu=8548 -mspe -mabi=spe" } */
 /* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */
 
 extern void bar (void);
Index: gcc/testsuite/gcc.target/powerpc/pr78543.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr78543.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr78543.c	(working copy)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
-/* { dg-options "-mcpu=power8 -O1 -mno-lra" } */
+/* { dg-options "-mcpu=power8 -O1" } */
 
 typedef long a;
 enum c { e, f, g, h, i, ab } j();

[PATCH 2/2] Remove reload_in_progress and other cleanups.

[Peter Bergner]

This patch removes reload specific code from the rs6000 port made possible
by the elimination of the usage of the -mno-lra option.

This passed bootstrap and regtesting with no regressions, ok for trunk?

Peter

	* config/rs6000/predicates.md (volatile_mem_operand) Remove code
	related to reload_in_progress.
	(splat_input_operand): Likewise.
	* config/rs6000/rs6000-protos.h (rs6000_secondary_memory_needed_rtx)
	Delete prototype.
	* config/rs6000/rs6000.c (machine_function): Remove sdmode_stack_slot
	field.
	(TARGET_EXPAND_TO_RTL_HOOK): Delete.
	(TARGET_INSTANTIATE_DECLS): Likewise.
	(legitimate_indexed_address_p): Delete reload_in_progress code.
	(rs6000_debug_legitimate_address_p): Likewise.
	(rs6000_eliminate_indexed_memrefs): Likewise.
	(rs6000_emit_le_vsx_store): Likewise.
	(rs6000_emit_move_si_sf_subreg): Likewise.
	(rs6000_emit_move): Likewise.
	(register_to_reg_type): Likewise.
	(rs6000_pre_atomic_barrier): Likewise.
	(rs6000_machopic_legitimize_pic_address): Likewise.
	(rs6000_allocate_stack_temp): Likewise.
	(rs6000_address_for_fpconvert): Likewise.
	(rs6000_address_for_altivec): Likewise.
	(rs6000_secondary_memory_needed_rtx): Delete function.
	(rs6000_check_sdmode): Likewise.
	(rs6000_alloc_sdmode_stack_slot): Likewise.
	(rs6000_instantiate_decls): Likewise.
	* config/rs6000/rs6000.h (SECONDARY_MEMORY_NEEDED_RTX): Delete.
	* config/rs6000/rs6000.md (splitter for *movsi_got_internal):
	Delete reload_in_progress.
	(*vec_reload_and_plus_<mptrsize>): Likewise.
	* config/rs6000/vsx.md (vsx_mul_v2di): Likewise.
	(vsx_div_v2di): Likewise.
	(vsx_udiv_v2di): Likewise.

Index: gcc/config/rs6000/predicates.md
===================================================================
--- gcc/config/rs6000/predicates.md	(revision 250587)
+++ gcc/config/rs6000/predicates.md	(working copy)
@@ -783,10 +783,8 @@ (define_predicate "volatile_mem_operand"
   (and (and (match_code "mem")
 	    (match_test "MEM_VOLATILE_P (op)"))
        (if_then_else (match_test "reload_completed")
-         (match_operand 0 "memory_operand")
-         (if_then_else (match_test "reload_in_progress")
-	   (match_test "strict_memory_address_p (mode, XEXP (op, 0))")
-	   (match_test "memory_address_p (mode, XEXP (op, 0))")))))
+	 (match_operand 0 "memory_operand")
+	 (match_test "memory_address_p (mode, XEXP (op, 0))"))))
 
 ;; Return 1 if the operand is an offsettable memory operand.
 (define_predicate "offsettable_mem_operand"
@@ -1142,7 +1140,7 @@ (define_predicate "splat_input_operand"
       if (! volatile_ok && MEM_VOLATILE_P (op))
 	return 0;
 
-      if (reload_in_progress || lra_in_progress || reload_completed)
+      if (lra_in_progress || reload_completed)
 	return indexed_or_indirect_address (addr, vmode);
       else
 	return memory_address_addr_space_p (vmode, addr, MEM_ADDR_SPACE (op));
Index: gcc/config/rs6000/rs6000-protos.h
===================================================================
--- gcc/config/rs6000/rs6000-protos.h	(revision 250587)
+++ gcc/config/rs6000/rs6000-protos.h	(working copy)
@@ -154,7 +154,6 @@ extern void rs6000_split_multireg_move (
 extern void rs6000_emit_le_vsx_move (rtx, rtx, machine_mode);
 extern bool valid_sf_si_move (rtx, rtx, machine_mode);
 extern void rs6000_emit_move (rtx, rtx, machine_mode);
-extern rtx rs6000_secondary_memory_needed_rtx (machine_mode);
 extern machine_mode rs6000_secondary_memory_needed_mode (machine_mode);
 extern rtx (*rs6000_legitimize_reload_address_ptr) (rtx, machine_mode,
 						    int, int, int, int *);
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	(revision 250587)
+++ gcc/config/rs6000/rs6000.c	(working copy)
@@ -143,10 +143,6 @@ typedef struct GTY(()) machine_function
   /* Offset from virtual_stack_vars_rtx to the start of the ABI_V4
      varargs save area.  */
   HOST_WIDE_INT varargs_save_offset;
-  /* Temporary stack slot to use for SDmode copies.  This slot is
-     64-bits wide and is allocated early enough so that the offset
-     does not overflow the 16-bit load/store offset field.  */
-  rtx sdmode_stack_slot;
   /* Alternative internal arg pointer for -fsplit-stack.  */
   rtx split_stack_arg_pointer;
   bool split_stack_argp_used;
@@ -1872,12 +1868,6 @@ static const struct attribute_spec rs600
 #undef TARGET_BUILTIN_RECIPROCAL
 #define TARGET_BUILTIN_RECIPROCAL rs6000_builtin_reciprocal
 
-#undef TARGET_EXPAND_TO_RTL_HOOK
-#define TARGET_EXPAND_TO_RTL_HOOK rs6000_alloc_sdmode_stack_slot
-
-#undef TARGET_INSTANTIATE_DECLS
-#define TARGET_INSTANTIATE_DECLS rs6000_instantiate_decls
-
 #undef TARGET_SECONDARY_RELOAD
 #define TARGET_SECONDARY_RELOAD rs6000_secondary_reload
 
@@ -8679,14 +8669,6 @@ legitimate_indexed_address_p (rtx x, int
   op0 = XEXP (x, 0);
   op1 = XEXP (x, 1);
 
-  /* Recognize the rtl generated by reload which we know will later be
-     replaced with proper base and index regs.  */
-  if (!strict
-      && reload_in_progress
-      && (REG_P (op0) || GET_CODE (op0) == PLUS)
-      && REG_P (op1))
-    return true;
-
   return (REG_P (op0) && REG_P (op1)
 	  && ((INT_REG_OK_FOR_BASE_P (op0, strict)
 	       && INT_REG_OK_FOR_INDEX_P (op1, strict))
@@ -9930,9 +9912,7 @@ rs6000_debug_legitimate_address_p (machi
 	   ret ? "true" : "false",
 	   GET_MODE_NAME (mode),
 	   reg_ok_strict,
-	   (reload_completed
-	    ? "after"
-	    : (reload_in_progress ? "progress" : "before")),
+	   (reload_completed ? "after" : "before"),
 	   GET_RTX_NAME (GET_CODE (x)));
   debug_rtx (x);
 
@@ -10334,9 +10314,6 @@ rs6000_emit_set_long_const (rtx dest, HO
 static void
 rs6000_eliminate_indexed_memrefs (rtx operands[2])
 {
-  if (reload_in_progress)
-    return;
-
   if (GET_CODE (operands[0]) == MEM
       && GET_CODE (XEXP (operands[0], 0)) != REG
       && ! legitimate_constant_pool_address_p (XEXP (operands[0], 0),
@@ -10443,10 +10420,10 @@ rs6000_emit_le_vsx_store (rtx dest, rtx
 {
   rtx tmp, permute_src, permute_tmp;
 
-  /* This should never be called during or after reload, because it does
+  /* This should never be called during or after LRA, because it does
      not re-permute the source register.  It is intended only for use
      during expand.  */
-  gcc_assert (!reload_in_progress && !lra_in_progress && !reload_completed);
+  gcc_assert (!lra_in_progress && !reload_completed);
 
   /* Use V2DImode to do swaps of types with 128-bit scalar parts (TImode,
      V1TImode).  */
@@ -10540,8 +10517,7 @@ valid_sf_si_move (rtx dest, rtx src, mac
 static bool
 rs6000_emit_move_si_sf_subreg (rtx dest, rtx source, machine_mode mode)
 {
-  if (TARGET_DIRECT_MOVE_64BIT && !reload_in_progress && !reload_completed
-      && !lra_in_progress
+  if (TARGET_DIRECT_MOVE_64BIT && !lra_in_progress && !reload_completed
       && (!SUBREG_P (dest) || !sf_subreg_operand (dest, mode))
       && SUBREG_P (source) && sf_subreg_operand (source, mode))
     {
@@ -10575,10 +10551,10 @@ rs6000_emit_move (rtx dest, rtx source,
   if (TARGET_DEBUG_ADDR)
     {
       fprintf (stderr,
-	       "\nrs6000_emit_move: mode = %s, reload_in_progress = %d, "
+	       "\nrs6000_emit_move: mode = %s, lra_in_progress = %d, "
 	       "reload_completed = %d, can_create_pseudos = %d.\ndest:\n",
 	       GET_MODE_NAME (mode),
-	       reload_in_progress,
+	       lra_in_progress,
 	       reload_completed,
 	       can_create_pseudo_p ());
       debug_rtx (dest);
@@ -10652,12 +10628,6 @@ rs6000_emit_move (rtx dest, rtx source,
       operands[1] = tmp;
     }
 
-  /* Handle the case where reload calls us with an invalid address.  */
-  if (reload_in_progress && mode == Pmode
-      && (! general_operand (operands[1], mode)
-	  || ! nonimmediate_operand (operands[0], mode)))
-    goto emit_set;
-
   /* 128-bit constant floating-point values on Darwin should really be loaded
      as two parts.  However, this premature splitting is a problem when DFmode
      values can go into Altivec registers.  */
@@ -10675,11 +10645,6 @@ rs6000_emit_move (rtx dest, rtx source,
       return;
     }
 
-  if (reload_in_progress && cfun->machine->sdmode_stack_slot != NULL_RTX)
-    cfun->machine->sdmode_stack_slot =
-      eliminate_regs (cfun->machine->sdmode_stack_slot, VOIDmode, NULL_RTX);
-
-
   /* Transform (p0:DD, (SUBREG:DD p1:SD)) to ((SUBREG:SD p0:DD),
      p1:SD) if p1 is not of floating point class and p0 is spilled as
      we can have no analogous movsd_store for this.  */
@@ -10789,57 +10754,6 @@ rs6000_emit_move (rtx dest, rtx source,
       return;
     }
 
-  if (reload_in_progress
-      && mode == SDmode
-      && cfun->machine->sdmode_stack_slot != NULL_RTX
-      && MEM_P (operands[0])
-      && rtx_equal_p (operands[0], cfun->machine->sdmode_stack_slot)
-      && REG_P (operands[1]))
-    {
-      if (FP_REGNO_P (REGNO (operands[1])))
-	{
-	  rtx mem = adjust_address_nv (operands[0], DDmode, 0);
-	  mem = eliminate_regs (mem, VOIDmode, NULL_RTX);
-	  emit_insn (gen_movsd_store (mem, operands[1]));
-	}
-      else if (INT_REGNO_P (REGNO (operands[1])))
-	{
-	  rtx mem = operands[0];
-	  if (BYTES_BIG_ENDIAN)
-	    mem = adjust_address_nv (mem, mode, 4);
-	  mem = eliminate_regs (mem, VOIDmode, NULL_RTX);
-	  emit_insn (gen_movsd_hardfloat (mem, operands[1]));
-	}
-      else
-	gcc_unreachable();
-      return;
-    }
-  if (reload_in_progress
-      && mode == SDmode
-      && REG_P (operands[0])
-      && MEM_P (operands[1])
-      && cfun->machine->sdmode_stack_slot != NULL_RTX
-      && rtx_equal_p (operands[1], cfun->machine->sdmode_stack_slot))
-    {
-      if (FP_REGNO_P (REGNO (operands[0])))
-	{
-	  rtx mem = adjust_address_nv (operands[1], DDmode, 0);
-	  mem = eliminate_regs (mem, VOIDmode, NULL_RTX);
-	  emit_insn (gen_movsd_load (operands[0], mem));
-	}
-      else if (INT_REGNO_P (REGNO (operands[0])))
-	{
-	  rtx mem = operands[1];
-	  if (BYTES_BIG_ENDIAN)
-	    mem = adjust_address_nv (mem, mode, 4);
-	  mem = eliminate_regs (mem, VOIDmode, NULL_RTX);
-	  emit_insn (gen_movsd_hardfloat (operands[0], mem));
-	}
-      else
-	gcc_unreachable();
-      return;
-    }
-
   /* FIXME:  In the long term, this switch statement should go away
      and be replaced by a sequence of tests based on things like
      mode == Pmode.  */
@@ -10998,10 +10912,9 @@ rs6000_emit_move (rtx dest, rtx source,
 
 	  /* If we are to limit the number of things we put in the TOC and
 	     this is a symbol plus a constant we can add in one insn,
-	     just put the symbol in the TOC and add the constant.  Don't do
-	     this if reload is in progress.  */
+	     just put the symbol in the TOC and add the constant.  */
 	  if (GET_CODE (operands[1]) == CONST
-	      && TARGET_NO_SUM_IN_TOC && ! reload_in_progress
+	      && TARGET_NO_SUM_IN_TOC
 	      && GET_CODE (XEXP (operands[1], 0)) == PLUS
 	      && add_operand (XEXP (XEXP (operands[1], 0), 1), mode)
 	      && (GET_CODE (XEXP (XEXP (operands[1], 0), 0)) == LABEL_REF
@@ -11047,10 +10960,9 @@ rs6000_emit_move (rtx dest, rtx source,
   /* Above, we may have called force_const_mem which may have returned
      an invalid address.  If we can, fix this up; otherwise, reload will
      have to deal with it.  */
-  if (GET_CODE (operands[1]) == MEM && ! reload_in_progress)
+  if (GET_CODE (operands[1]) == MEM)
     operands[1] = validize_mem (operands[1]);
 
- emit_set:
   emit_insn (gen_rtx_SET (operands[0], operands[1]));
 }
 \f
@@ -19243,42 +19155,6 @@ mems_ok_for_quad_peep (rtx mem1, rtx mem
   return 1;
 }
 \f
-
-rtx
-rs6000_secondary_memory_needed_rtx (machine_mode mode)
-{
-  static bool eliminated = false;
-  rtx ret;
-
-  if (mode != SDmode || TARGET_NO_SDMODE_STACK)
-    ret = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
-  else
-    {
-      rtx mem = cfun->machine->sdmode_stack_slot;
-      gcc_assert (mem != NULL_RTX);
-
-      if (!eliminated)
-	{
-	  mem = eliminate_regs (mem, VOIDmode, NULL_RTX);
-	  cfun->machine->sdmode_stack_slot = mem;
-	  eliminated = true;
-	}
-      ret = mem;
-    }
-
-  if (TARGET_DEBUG_ADDR)
-    {
-      fprintf (stderr, "\nrs6000_secondary_memory_needed_rtx, mode %s, rtx:\n",
-	       GET_MODE_NAME (mode));
-      if (!ret)
-	fprintf (stderr, "\tNULL_RTX\n");
-      else
-	debug_rtx (ret);
-    }
-
-  return ret;
-}
-
 /* Return the mode to be used for memory when a secondary memory
    location is needed.  For SDmode values we need to use DDmode, in
    all other cases we can use the same mode.  */
@@ -19290,36 +19166,6 @@ rs6000_secondary_memory_needed_mode (mac
   return mode;
 }
 
-static tree
-rs6000_check_sdmode (tree *tp, int *walk_subtrees, void *data ATTRIBUTE_UNUSED)
-{
-  /* Don't walk into types.  */
-  if (*tp == NULL_TREE || *tp == error_mark_node || TYPE_P (*tp))
-    {
-      *walk_subtrees = 0;
-      return NULL_TREE;
-    }
-
-  switch (TREE_CODE (*tp))
-    {
-    case VAR_DECL:
-    case PARM_DECL:
-    case FIELD_DECL:
-    case RESULT_DECL:
-    case SSA_NAME:
-    case REAL_CST:
-    case MEM_REF:
-    case VIEW_CONVERT_EXPR:
-      if (TYPE_MODE (TREE_TYPE (*tp)) == SDmode)
-	return *tp;
-      break;
-    default:
-      break;
-    }
-
-  return NULL_TREE;
-}
-
 /* Classify a register type.  Because the FMRGOW/FMRGEW instructions only work
    on traditional floating point registers, and the VMRGOW/VMRGEW instructions
    only work on the traditional altivec registers, note if an altivec register
@@ -19340,7 +19186,7 @@ register_to_reg_type (rtx reg, bool *is_
   regno = REGNO (reg);
   if (regno >= FIRST_PSEUDO_REGISTER)
     {
-      if (!lra_in_progress && !reload_in_progress && !reload_completed)
+      if (!lra_in_progress && !reload_completed)
 	return PSEUDO_REG_TYPE;
 
       regno = true_regnum (reg);
@@ -20417,64 +20263,6 @@ rs6000_secondary_reload_gpr (rtx reg, rt
   return;
 }
 
-/* Allocate a 64-bit stack slot to be used for copying SDmode values through if
-   this function has any SDmode references.  If we are on a power7 or later, we
-   don't need the 64-bit stack slot since the LFIWZX and STIFWX instructions
-   can load/store the value.  */
-
-static void
-rs6000_alloc_sdmode_stack_slot (void)
-{
-  tree t;
-  basic_block bb;
-  gimple_stmt_iterator gsi;
-
-  gcc_assert (cfun->machine->sdmode_stack_slot == NULL_RTX);
-  /* We use a different approach for dealing with the secondary
-     memory in LRA.  */
-  if (ira_use_lra_p)
-    return;
-
-  if (TARGET_NO_SDMODE_STACK)
-    return;
-
-  FOR_EACH_BB_FN (bb, cfun)
-    for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi))
-      {
-	tree ret = walk_gimple_op (gsi_stmt (gsi), rs6000_check_sdmode, NULL);
-	if (ret)
-	  {
-	    rtx stack = assign_stack_local (DDmode, GET_MODE_SIZE (DDmode), 0);
-	    cfun->machine->sdmode_stack_slot = adjust_address_nv (stack,
-								  SDmode, 0);
-	    return;
-	  }
-      }
-
-  /* Check for any SDmode parameters of the function.  */
-  for (t = DECL_ARGUMENTS (cfun->decl); t; t = DECL_CHAIN (t))
-    {
-      if (TREE_TYPE (t) == error_mark_node)
-	continue;
-
-      if (TYPE_MODE (TREE_TYPE (t)) == SDmode
-	  || TYPE_MODE (DECL_ARG_TYPE (t)) == SDmode)
-	{
-	  rtx stack = assign_stack_local (DDmode, GET_MODE_SIZE (DDmode), 0);
-	  cfun->machine->sdmode_stack_slot = adjust_address_nv (stack,
-								SDmode, 0);
-	  return;
-	}
-    }
-}
-
-static void
-rs6000_instantiate_decls (void)
-{
-  if (cfun->machine->sdmode_stack_slot != NULL_RTX)
-    instantiate_decl_rtl (cfun->machine->sdmode_stack_slot);
-}
-
 /* Given an rtx X being reloaded into a reg required to be
    in class CLASS, return the class of reg to actually use.
    In general this is just CLASS; but on some machines
@@ -23503,10 +23291,9 @@ static rtx
 rs6000_pre_atomic_barrier (rtx mem, enum memmodel model)
 {
   rtx addr = XEXP (mem, 0);
-  int strict_p = (reload_in_progress || reload_completed);
 
-  if (!legitimate_indirect_address_p (addr, strict_p)
-      && !legitimate_indexed_address_p (addr, strict_p))
+  if (!legitimate_indirect_address_p (addr, reload_completed)
+      && !legitimate_indexed_address_p (addr, reload_completed))
     {
       addr = force_reg (Pmode, addr);
       mem = replace_equiv_address_nv (mem, addr);
@@ -33233,7 +33020,7 @@ rs6000_machopic_legitimize_pic_address (
 {
   rtx base, offset;
 
-  if (reg == NULL && ! reload_in_progress && ! reload_completed)
+  if (reg == NULL && !reload_completed)
     reg = gen_reg_rtx (Pmode);
 
   if (GET_CODE (orig) == CONST)
@@ -33259,7 +33046,7 @@ rs6000_machopic_legitimize_pic_address (
 	{
 	  if (SMALL_INT (offset))
 	    return plus_constant (Pmode, base, INTVAL (offset));
-	  else if (! reload_in_progress && ! reload_completed)
+	  else if (!reload_completed)
 	    offset = force_reg (Pmode, offset);
 	  else
 	    {
@@ -37517,7 +37304,7 @@ rs6000_allocate_stack_temp (machine_mode
 {
   rtx stack = assign_stack_temp (mode, GET_MODE_SIZE (mode));
   rtx addr = XEXP (stack, 0);
-  int strict_p = (reload_in_progress || reload_completed);
+  int strict_p = reload_completed;
 
   if (!legitimate_indirect_address_p (addr, strict_p))
     {
@@ -37539,13 +37326,12 @@ rs6000_allocate_stack_temp (machine_mode
 rtx
 rs6000_address_for_fpconvert (rtx x)
 {
-  int strict_p = (reload_in_progress || reload_completed);
   rtx addr;
 
   gcc_assert (MEM_P (x));
   addr = XEXP (x, 0);
-  if (! legitimate_indirect_address_p (addr, strict_p)
-      && ! legitimate_indexed_address_p (addr, strict_p))
+  if (! legitimate_indirect_address_p (addr, reload_completed)
+      && ! legitimate_indexed_address_p (addr, reload_completed))
     {
       if (GET_CODE (addr) == PRE_INC || GET_CODE (addr) == PRE_DEC)
 	{
@@ -37583,10 +37369,9 @@ rs6000_address_for_altivec (rtx x)
   if (!altivec_indexed_or_indirect_operand (x, GET_MODE (x)))
     {
       rtx addr = XEXP (x, 0);
-      int strict_p = (reload_in_progress || reload_completed);
 
-      if (!legitimate_indexed_address_p (addr, strict_p)
-	  && !legitimate_indirect_address_p (addr, strict_p))
+      if (!legitimate_indexed_address_p (addr, reload_completed)
+	  && !legitimate_indirect_address_p (addr, reload_completed))
 	addr = copy_to_mode_reg (Pmode, addr);
 
       addr = gen_rtx_AND (Pmode, addr, GEN_INT (-16));
Index: gcc/config/rs6000/rs6000.h
===================================================================
--- gcc/config/rs6000/rs6000.h	(revision 250587)
+++ gcc/config/rs6000/rs6000.h	(working copy)
@@ -1583,13 +1583,6 @@ extern enum reg_class rs6000_constraints
 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE)			\
   rs6000_secondary_memory_needed_ptr (CLASS1, CLASS2, MODE)
 
-/* For cpus that cannot load/store SDmode values from the 64-bit
-   FP registers without using a full 64-bit load/store, we need
-   to allocate a full 64-bit stack slot for them.  */
-
-#define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
-  rs6000_secondary_memory_needed_rtx (MODE)
-
 /* Specify the mode to be used for memory when a secondary memory
    location is needed.  For cpus that cannot load/store SDmode values
    from the 64-bit FP registers without using a full 64-bit
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md	(revision 250587)
+++ gcc/config/rs6000/rs6000.md	(working copy)
@@ -6681,7 +6681,7 @@ (define_split
 		   UNSPEC_MOVSI_GOT))]
   "DEFAULT_ABI == ABI_V4
     && flag_pic == 1
-    && (reload_in_progress || reload_completed)"
+    && reload_completed"
   [(set (match_dup 0) (match_dup 2))
    (set (match_dup 0) (unspec:SI [(match_dup 1)(match_dup 0)]
 				 UNSPEC_MOVSI_GOT))]
@@ -8234,7 +8234,7 @@ (define_insn_and_split "*vec_reload_and_
 	(and:P (plus:P (match_operand:P 1 "gpc_reg_operand" "r")
 		       (match_operand:P 2 "reg_or_cint_operand" "rI"))
 	       (const_int -16)))]
-  "TARGET_ALTIVEC && (reload_in_progress || reload_completed)"
+  "TARGET_ALTIVEC && reload_completed"
   "#"
   "&& reload_completed"
   [(set (match_dup 0)
Index: gcc/config/rs6000/vsx.md
===================================================================
--- gcc/config/rs6000/vsx.md	(revision 250587)
+++ gcc/config/rs6000/vsx.md	(working copy)
@@ -1203,7 +1203,7 @@ (define_insn_and_split "vsx_mul_v2di"
                      UNSPEC_VSX_MULSD))]
   "VECTOR_MEM_VSX_P (V2DImode)"
   "#"
-  "VECTOR_MEM_VSX_P (V2DImode) && !reload_completed && !reload_in_progress"
+  "VECTOR_MEM_VSX_P (V2DImode) && !reload_completed"
   [(const_int 0)]
   "
 {
@@ -1241,7 +1241,7 @@ (define_insn_and_split "vsx_div_v2di"
                      UNSPEC_VSX_DIVSD))]
   "VECTOR_MEM_VSX_P (V2DImode)"
   "#"
-  "VECTOR_MEM_VSX_P (V2DImode) && !reload_completed && !reload_in_progress"
+  "VECTOR_MEM_VSX_P (V2DImode) && !reload_completed"
   [(const_int 0)]
   "
 {
@@ -1269,7 +1269,7 @@ (define_insn_and_split "vsx_udiv_v2di"
                      UNSPEC_VSX_DIVUD))]
   "VECTOR_MEM_VSX_P (V2DImode)"
   "#"
-  "VECTOR_MEM_VSX_P (V2DImode) && !reload_completed && !reload_in_progress"
+  "VECTOR_MEM_VSX_P (V2DImode) && !reload_completed"
   [(const_int 0)]
   "
 {

Re: [PATCH 1/2] Eliminate -mno-lra from the rs6000 port.

[Segher Boessenkool]

Hi!

On Thu, Jul 27, 2017 at 10:43:44AM -0500, Peter Bergner wrote:
> This patch makes the -mlra option a nop while disallowing -mno-lra.
> It also removes the target bit mask and its usage.
> Finally, this patch updates the testsuite by removing all usage of
> the -mlra and -mno-lra options.

So you left the -mno-lra testcases (but without -mno-lra) because it
gives some more test coverage this way.  Okay.

Looks fine, please commit.  Thanks!


Segher

Re: [PATCH 2/2] Remove reload_in_progress and other cleanups.

[Segher Boessenkool]

Hi!

On Thu, Jul 27, 2017 at 10:44:43AM -0500, Peter Bergner wrote:
> This patch removes reload specific code from the rs6000 port made possible
> by the elimination of the usage of the -mno-lra option.

> 	* config/rs6000/predicates.md (volatile_mem_operand) Remove code
> 	related to reload_in_progress.

Missing colon here.

> 	* config/rs6000/rs6000-protos.h (rs6000_secondary_memory_needed_rtx)
> 	Delete prototype.

And here.

Okay with those trivial changelog fixes.  Nice cleanup :-)


Segher

Re: [PATCH 1/2] Eliminate -mno-lra from the rs6000 port.

[Peter Bergner]

On 7/27/17 11:47 AM, Segher Boessenkool wrote:
> On Thu, Jul 27, 2017 at 10:43:44AM -0500, Peter Bergner wrote:
>> This patch makes the -mlra option a nop while disallowing -mno-lra.
>> It also removes the target bit mask and its usage.
>> Finally, this patch updates the testsuite by removing all usage of
>> the -mlra and -mno-lra options.
> 
> So you left the -mno-lra testcases (but without -mno-lra) because it
> gives some more test coverage this way.  Okay.
> 
> Looks fine, please commit.  Thanks!

Committed as revision 250637, thanks!

Peter

Re: [PATCH 2/2] Remove reload_in_progress and other cleanups.

[Peter Bergner]

On 7/27/17 2:29 PM, Segher Boessenkool wrote:
> Hi!
> 
> On Thu, Jul 27, 2017 at 10:44:43AM -0500, Peter Bergner wrote:
>> This patch removes reload specific code from the rs6000 port made possible
>> by the elimination of the usage of the -mno-lra option.
> 
>> 	* config/rs6000/predicates.md (volatile_mem_operand) Remove code
>> 	related to reload_in_progress.
> 
> Missing colon here.
> 
>> 	* config/rs6000/rs6000-protos.h (rs6000_secondary_memory_needed_rtx)
>> 	Delete prototype.
> 
> And here.

Oops, thanks for catching those.  Fixed.


> Okay with those trivial changelog fixes.  Nice cleanup :-)

Committed as revision 250638, thanks!

Peter