From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 024D8385828D for ; Wed, 28 Sep 2022 08:27:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 024D8385828D Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn Received: from [10.20.4.52] (unknown [10.20.4.52]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx72tNBTRjLjIjAA--.63076S2; Wed, 28 Sep 2022 16:26:53 +0800 (CST) Subject: Re: [PATCH] LoongArch: Use UNSPEC for fmin/fmax RTL pattern [PR105414] To: Xi Ruoyao , gcc-patches@gcc.gnu.org Cc: Wang Xuerui , Chenghua Xu References: <20220924124722.1946365-1-xry111@xry111.site> From: Lulu Cheng Message-ID: <3f1e84c1-441c-27e1-9033-fe233cd038c7@loongson.cn> Date: Wed, 28 Sep 2022 16:26:53 +0800 User-Agent: Mozilla/5.0 (X11; Linux mips64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <20220924124722.1946365-1-xry111@xry111.site> Content-Type: text/plain; charset=gbk; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-CM-TRANSID:AQAAf8Cx72tNBTRjLjIjAA--.63076S2 X-Coremail-Antispam: 1UD129KBjvJXoW7Ary3JryrWFW3Ww15ur15Jwb_yoW8tFy8p3 9rC3Z5trW8XrsYg34vka4UXr15KryDGF47uF93tryvkrn0gr1UXr4Fkr92gFyDCw1Fqw4q q3Wrta4YvF4YkrJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUva14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26F4j 6r4UJwA2z4x0Y4vEx4A2jsIE14v26F4UJVW0owA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gc CE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E 2Ix0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJV W8JwACjcxG0xvEwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lc7I2V7IY0VAS07AlzVAY IcxG8wCY02Avz4vE-syl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2 IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v2 6r126r1DMIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2 IY6xkF7I0E14v26r1j6r4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv 67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyT uYvjfU5WlkUUUUU X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,MIME_CHARSET_FARAWAY,NICE_REPLY_A,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: I have no problem. Thanks. ÔÚ 2022/9/24 ÏÂÎç8:47, Xi Ruoyao дµÀ: > I made a mistake defining fmin/fmax RTL patterns in r13-2085: I used > smin and smax in the definition mistakenly. This causes the optimizer > to perform constant folding as if fmin/fmax was "really" smin/smax > operations even with -fsignaling-nans. Then pr105414.c fails. > > We don't have fmin/fmax RTL codes for now (PR107013) so we can only use > an UNSPEC for fmin and fmax patterns. > > gcc/ChangeLog: > > PR tree-optimization/105414 > * config/loongarch/loongarch.md (UNSPEC_FMAX): New unspec. > (UNSPEC_FMIN): Likewise. > (fmax3): Use UNSPEC_FMAX instead of smax. > (fmin3): Use UNSPEC_FMIN instead of smin. > --- > gcc/config/loongarch/loongarch.md | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md > index 3787fd8230f..214b14bddd3 100644 > --- a/gcc/config/loongarch/loongarch.md > +++ b/gcc/config/loongarch/loongarch.md > @@ -35,6 +35,8 @@ (define_c_enum "unspec" [ > ;; Floating point unspecs. > UNSPEC_FRINT > UNSPEC_FCLASS > + UNSPEC_FMAX > + UNSPEC_FMIN > > ;; Override return address for exception handling. > UNSPEC_EH_RETURN > @@ -1032,8 +1034,9 @@ (define_insn "smin3" > > (define_insn "fmax3" > [(set (match_operand:ANYF 0 "register_operand" "=f") > - (smax:ANYF (match_operand:ANYF 1 "register_operand" "f") > - (match_operand:ANYF 2 "register_operand" "f")))] > + (unspec:ANYF [(use (match_operand:ANYF 1 "register_operand" "f")) > + (use (match_operand:ANYF 2 "register_operand" "f"))] > + UNSPEC_FMAX))] > "" > "fmax.\t%0,%1,%2" > [(set_attr "type" "fmove") > @@ -1041,8 +1044,9 @@ (define_insn "fmax3" > > (define_insn "fmin3" > [(set (match_operand:ANYF 0 "register_operand" "=f") > - (smin:ANYF (match_operand:ANYF 1 "register_operand" "f") > - (match_operand:ANYF 2 "register_operand" "f")))] > + (unspec:ANYF [(use (match_operand:ANYF 1 "register_operand" "f")) > + (use (match_operand:ANYF 2 "register_operand" "f"))] > + UNSPEC_FMIN))] > "" > "fmin.\t%0,%1,%2" > [(set_attr "type" "fmove")