From: Vladimir Makarov <vmakarov@redhat.com>
To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: [pushed][PR113526][LRA]: Fixing asm-flag-1.c failure on ARM
Date: Thu, 25 Jan 2024 14:47:44 -0500 [thread overview]
Message-ID: <3ffb5278-64a4-884f-1b57-665bd73b5f9b@redhat.com> (raw)
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The following patch fixes
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113526
The patch was successfully bootstrapped and tested on x86-64, ppc64le,
and aarch64.
[-- Attachment #2: pr113526.patch --]
[-- Type: text/x-patch, Size: 1576 bytes --]
commit 5c617df410602d0e51d61c84d1ae7e9b3f51efa4
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date: Thu Jan 25 14:41:17 2024 -0500
[PR113526][LRA]: Fixing asm-flag-1.c failure on ARM
My recent patch for PR113356 results in failure asm-flag-1.c test on arm.
After the patch LRA treats asm operand pseudos as general regs. There
are too many such operands and LRA can not assign hard regs to all
operand pseudos. Actually we should not assign hard regs to the
operand pseudo at all. The following patch fixes this.
gcc/ChangeLog:
PR target/113526
* lra-constraints.cc (curr_insn_transform): Change class even for
spilled pseudo successfully matched with with NO_REGS.
diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc
index 3379b88ff22..0ae81c1ff9c 100644
--- a/gcc/lra-constraints.cc
+++ b/gcc/lra-constraints.cc
@@ -4498,10 +4498,10 @@ curr_insn_transform (bool check_only_p)
registers for other pseudos referenced in the insn. The most
common case of this is a scratch register which will be
transformed to scratch back at the end of LRA. */
- && lra_get_regno_hard_regno (regno) >= 0
&& bitmap_single_bit_set_p (&lra_reg_info[regno].insn_bitmap))
{
- lra_change_class (regno, NO_REGS, " Change to", true);
+ if (lra_get_allocno_class (regno) != NO_REGS)
+ lra_change_class (regno, NO_REGS, " Change to", true);
reg_renumber[regno] = -1;
}
/* We can do an optional reload. If the pseudo got a hard
reply other threads:[~2024-01-25 19:47 UTC|newest]
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