From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26905 invoked by alias); 29 Nov 2012 15:31:56 -0000 Received: (qmail 26856 invoked by uid 22791); 29 Nov 2012 15:31:51 -0000 X-SWARE-Spam-Status: No, hits=-2.0 required=5.0 tests=AWL,BAYES_40,KHOP_THREADED,TW_XT X-Spam-Check-By: sourceware.org Received: from mel.act-europe.fr (HELO mel.act-europe.fr) (194.98.77.210) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 29 Nov 2012 15:31:46 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id F1E21CB2747; Thu, 29 Nov 2012 16:31:49 +0100 (CET) Received: from mel.act-europe.fr ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xMlD31H8qWXJ; Thu, 29 Nov 2012 16:31:49 +0100 (CET) Received: from polaris.localnet (bon31-6-88-161-99-133.fbx.proxad.net [88.161.99.133]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mel.act-europe.fr (Postfix) with ESMTP id 70213CB2740; Thu, 29 Nov 2012 16:31:49 +0100 (CET) From: Eric Botcazou To: Richard Sandiford Cc: gcc-patches@gcc.gnu.org, ramrad01@arm.com Subject: Re: [0/8] Add optabs alternatives for insv, extv and extzv Date: Thu, 29 Nov 2012 15:31:00 -0000 Message-ID: <4058772.se91EY6rS5@polaris> User-Agent: KMail/4.7.2 (Linux/3.1.10-1.16-desktop; KDE/4.7.2; x86_64; ; ) In-Reply-To: <87hao8vgxs.fsf@sandifor-thinkpad.stglab.manchester.uk.ibm.com> References: <87k3u3eybu.fsf@talisman.home> <1713924.N0H2Yc8llc@polaris> <87hao8vgxs.fsf@sandifor-thinkpad.stglab.manchester.uk.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2012-11/txt/msg02449.txt.bz2 > I agree that this kind of MEM is less than ideal, but I thought: > > set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos); > > said that the attributes of TO_RTX will to be TO _once a pending offset-and- > narrowing operation has been applied_. So we have: > > /* If we modified OFFSET based on T, then subtract the outstanding > bit position offset. Similarly, increase the size of the accessed > object to contain the negative offset. */ > if (apply_bitpos) > { > gcc_assert (attrs.offset_known_p); > attrs.offset -= apply_bitpos / BITS_PER_UNIT; > if (attrs.size_known_p) > attrs.size += apply_bitpos / BITS_PER_UNIT; > } > > I didn't think we necessarily expected the width of the reference > (TO_RTX) and the width of the type (TO) to match at this stage. > That's different from adjust_bitfield_address, where the > offset-and-narrowing operation itself is applied. I was essentially thinking of the size adjustment just above that one: if the mode size is known, setting a smaller size without further ado seems awkward. So the questionable MEM doesn't survive long? OK, maybe... > The difference between the width of the reference and the width > of T is what led to: > > http://gcc.gnu.org/ml/gcc-patches/2012-11/msg00262.html > > As things stand, APPLY_BITPOS is only nonzero if we set both the > MEM_EXPR and MEM_SIZE from T. There are also cases (like this one) > where we don't set the MEM_EXPR from T but do set the MEM_SIZE from T. > The bitpos will be applied either way, so I thought MEM_SIZE should be > the same in both cases. That doesn't fix this problem of course, it's > just an argument that the relationship between the width of the reference > mode, the MEM_SIZE and the width of T seems pretty complicated with the > current interface. MEM_SIZE and MEM_EXPR are used alone by the aliasing machinery to disambiguate memory references, so they need be conservative wrt the actual memory access. > Maybe set_mem_attributes_minus_bitpos (but not set_mem_attributes) > should only set the MEM_EXPR and leave the MEM_SIZE unchanged? > > Before submitting the patched linked above, I tried getting rid > of set_mem_attributes_minus_bitpos and passing the tree down instead. > Then we could set the attributes at the time of the offset-and-narrowing > operation, where the size and offset of the final reference are known. > That didn't seem like an easy change to make though, and became a > bit of a distraction from the main patches. > > Anyway, given the breakage that this series has already caused, > I'd prefer not to tackle stuff like this as well. I'd only used > MEM_SIZE in the first attempted patch out of habit. I think the > revised patch more obviously matches the *_fixed_bit_field functions > and is more generally in keeping with the existing checks. > (It's deliberately more conservative though, only using register > bitfields if both the bit_field_mode_iterator and strict volatile > bitfield rules are met.) Well, rewriting the bitfield machinery of the middle-end is a once-in-a-decade undertaking, so some fallouts are to be expected. :-) That wasn't too bad in the end. But I agree with the cautious approach from now on. -- Eric Botcazou