From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by sourceware.org (Postfix) with ESMTPS id 731213858D28 for ; Wed, 26 Apr 2023 03:07:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 731213858D28 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-1a92513abebso69598695ad.2 for ; Tue, 25 Apr 2023 20:07:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1682478440; x=1685070440; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=Nihd8oiMmaavxerBnjgxWq9sFfI/IK2D5UEy9wSsV4M=; b=VQHBx8YIXmtzXHzuJ3YHWJg/G0/uQbxhfN3QuvUVe9V0r3bUa1sNvofOR2YvpUJeXM lKm23H1kfpNJ2Zww43Prodk942x3jWlOWjiN/fEhA2LTukYA27Cc7X5U2Xe+3+e36vHG Nmb9O1Q1gL/T5zzwXcqEsmdGITxdj/9nvLWOSzc5+zV+YB5xd1yEOmIbkD99rYJz7AEi 54sV4jAJVyTKM1kZaBtCZzlEx4IcdakkT1GInExHx11qXbuE9HYT17Sy+3Lw3k0lTBbc WqYxMCdxI3lVA5gGOz7EaD3x0IQg+ff6tAwlR3XUXNEK0WtWsz/4V+/Sc4KuNCd7rjQo rw3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682478440; x=1685070440; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=Nihd8oiMmaavxerBnjgxWq9sFfI/IK2D5UEy9wSsV4M=; b=kBKDSpQ9jihPoDCT695+QurfhQQ1KjX8b4+ZSf3YP0lJzx3gWvVKS/5fxaMnEzqbBR AJl/8oLi0lqcvlLc1lX+9ffnc8A7ilXtJkgPNk2dUvOiTUa40v45nObD6CKGdGOum3/q PE2wgbcAEpa0zW+B+7flzK2R/3QwoEKJgB2I1uLc1Ti25hLtoejN0SDs74E38EFkCB6P IzeAQ7a31v/JkXt4Y0Foi7PVn/7LVmZM5XsUKJbjvDR6TP/cDIsLZhOraQom6ZL80490 88eKSQ9F7HZdZdmiBV6BD7kV4Is1wlgAyJ4/SgKtuRHcIft8XzIBzllV68V0CLdYvdzk v9Hw== X-Gm-Message-State: AC+VfDyK8FD7qSivH+Z/PhabV45nku6hg+WaTrhtA1oG5KnTSYiOdTcn u0T6kCIAJuVfJIcQ2JRuIWM= X-Google-Smtp-Source: ACHHUZ7hbJkoHqNLf9naLyQn4ntx3+s6myD6NAbDbbA1Zj/+6FS9ajTgiJzmAqBu21y4ITofyMWTfw== X-Received: by 2002:a17:902:c412:b0:1a9:88a0:9b5d with SMTP id k18-20020a170902c41200b001a988a09b5dmr6999779plk.57.1682478440290; Tue, 25 Apr 2023 20:07:20 -0700 (PDT) Received: from ?IPV6:2601:681:8600:13d0::99f? ([2601:681:8600:13d0::99f]) by smtp.gmail.com with ESMTPSA id c5-20020a170902c1c500b001a20b30e8b0sm8882775plc.243.2023.04.25.20.07.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 25 Apr 2023 20:07:19 -0700 (PDT) Message-ID: <40604399-23e4-41ae-19d9-39966b767670@gmail.com> Date: Tue, 25 Apr 2023 21:07:18 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH 1/3 V2] RISC-V: Add auto-vectorization compile option for RVV Content-Language: en-US To: juzhe.zhong@rivai.ai, gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com References: <20230419164214.1032017-1-juzhe.zhong@rivai.ai> <20230419164214.1032017-2-juzhe.zhong@rivai.ai> From: Jeff Law In-Reply-To: <20230419164214.1032017-2-juzhe.zhong@rivai.ai> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 4/19/23 10:42, juzhe.zhong@rivai.ai wrote: > From: Ju-Zhe Zhong > > This patch is adding 2 compile option for RVV auto-vectorization. > 1. -param=riscv-autovec-preference= > This option is to specify the auto-vectorization approach for RVV. > Currently, we only support scalable and fixed-vlmax. > > - scalable means VLA auto-vectorization. The vector-length to compiler is > unknown and runtime invariant. Such approach can allow us compile the code > run on any vector-length RVV CPU. > > - fixed-vlmax means the compile known the RVV CPU vector-length, compile option > in fixed-length VLS auto-vectorization. Meaning if we specify vector-length=512. > The execution file can only run on vector-length = 512 RVV CPU. > > - TODO: we may need to support min-length VLS auto-vectorization, means the execution > file can run on larger length RVV CPU. > 2. -param=riscv-autovec-lmul= > Specify LMUL choosing for RVV auto-vectorization. > > gcc/ChangeLog: > > * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for auto-vectorization preference. > (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV auto-vectorization. > * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization. I've pushed this to the trunk. Thanks, jeff