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From: Jeff Law <jeffreyalaw@gmail.com>
To: Oleg Endo <oleg.endo@t-online.de>,
	"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: Re: [committed] Remove compromised sh test
Date: Wed, 26 Jun 2024 18:30:32 -0600	[thread overview]
Message-ID: <4210b775-a58d-42e1-af2b-2bbe893f75e7@gmail.com> (raw)
In-Reply-To: <f0e8dc4de9e28694365d6c87744864119d8a77aa.camel@t-online.de>



On 6/26/24 4:44 PM, Oleg Endo wrote:
> 
> 
> On Wed, 2024-06-26 at 16:39 -0600, Jeff Law wrote:
>>
>> On 6/26/24 4:12 PM, Oleg Endo wrote:
>>>
>>>
>>> On Wed, 2024-06-26 at 07:22 -0600, Jeff Law wrote:
>>>> Surya's recent patch to IRA improves the code for sh/pr54602-1.c
>>>> slightly.  Specifically it's able to eliminate a save/restore in the
>>>> prologue/epilogue and a bit of register shuffling.
>>>>
>>>> As a result there literally aren't any insns that can be used to fill
>>>> the delay slot of the return, so a nop gets emitted and the test fails.
>>>>
>>>> Given there literally aren't any insns to move into the delay slot, the
>>>> best course of action is to just drop the test.
>>>>
>>>> Pushed to the trunk.
>>>>
>>>> Jeff
>>>
>>> I can't reproduce what you are saying.
>>> Which triplet and flags is your test setup using?
>>>
>>> For this test case, GCC 13 with -m4 -ml -O1 -fno-pic:
>> No -m flags at all.   As plain of a testrun as you can do.
>>
> 
> OK, then what's the default config of your test setup / triplet?
> Can you please show the generated code that you get?  Because - like I said
> - I can't reproduce it.
test01:
         sts.l   pr,@-r15        ! 31    [c=4 l=2]  movsi_i/10
         add     #-4,r15 ! 32    [c=4 l=2]  *addsi3/0
         mov.l   .L3,r0  ! 26    [c=10 l=2]  movsi_i/0
         jsr     @r0     ! 12    [c=5 l=2]  call_valuei
         mov.l   r6,@r15 ! 4     [c=4 l=2]  movsi_i/8
         mov.l   @r15,r1 ! 29    [c=1 l=2]  movsi_i/5
         add     r1,r0   ! 30    [c=4 l=2]  *addsi3/0
         add     #4,r15  ! 36    [c=4 l=2]  *addsi3/0
         lds.l   @r15+,pr        ! 38    [c=1 l=2]  movsi_i/14
         rts
         nop             ! 40    [c=0 l=4]  *return_i


Note that there's a scheduling barrier in the RTL between insns 30 and 
36.  So instructions prior to insn 36 can't be used to fill the delay slot.

jeff

  reply	other threads:[~2024-06-27  0:30 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-26 13:22 Jeff Law
2024-06-26 22:12 ` Oleg Endo
2024-06-26 22:39   ` Jeff Law
2024-06-26 22:44     ` Oleg Endo
2024-06-27  0:30       ` Jeff Law [this message]
2024-06-27  1:27         ` Oleg Endo
2024-06-27  1:54           ` Jeff Law
  -- strict thread matches above, loose matches on Subject: below --
2024-06-26 13:21 Jeff Law

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