From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 176133882ACB for ; Tue, 18 Jun 2024 16:48:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 176133882ACB Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 176133882ACB Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=148.163.158.5 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718729284; cv=none; b=TdTXOEcIShSQv1KsTEnpcB34W3lq3ZFxyE7xFAf2aHFd6qDBHXR5fLU03ZgsZT0vCXqJLtgeV/Fsw6O7auRvIScQeytiv6/5/wzica76DA0f13ynPRqntB8Gm4uq/5jGMLhVjviqLSrtW7FEFfnrxv1dI9cEHHge2Bn8/qJrK8A= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718729284; c=relaxed/simple; bh=qEDA3VeLE48UKnGGknv4+LgIiuTfuLhbvh4NxPx4WZU=; h=DKIM-Signature:Message-ID:Date:MIME-Version:Subject:To:From; b=BYIuExJ7/IE/HlY+Eg8sRh8+DwNbrZRoD9cfIqXmJ0jIVQW6AAcx3/wyAqNmyTKLtGL0ksK+y5jMe5pRuEQY7p6ywXmXigAkZNhXBdfm+mjylT8nM8i3OHfdwJnVoB4fEBGiboDGuyOsBLdI+N6WOlHTarLcoiRbXADDIbFcDZQ= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from pps.filterd (m0360072.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 45IGUofK007807; Tue, 18 Jun 2024 16:48:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h= message-id:date:mime-version:subject:to:references:from :in-reply-to:content-type:content-transfer-encoding; s=pp1; bh=2 KF9zkED3DzwzrY+HTJOKra5j3SmyYqjVcAn2AqTrU4=; b=HpxjWoC1JIk/odrzM 2yw2EKfljb5WtC/OHgJ31A2FMo7mJGC7LUQmy6IjRqB4IMFqDijROGQe4o5SudHZ 4ZyBIUB9jTp4Kj2luPwwQ+az17co2et1CbBEcaJeEkLMlewslAdSP/+esTPLBuZc lzpm2mwVki14h8tCrmbnMQRCYD1lI8bR7rYsKmtRlQjPJamiuWtQh3kqOygmYQ4u UfOZnYLBHIk7sIBdxNJT4zmBOYwItTlJF+KgD8qwHhh6T4bKRKqSR4yMMD34d0p5 XpQBBiW6/BjNKg8LiL1maPTy16U0KhNkzugSsVVnfwFZJWGvqX4xVQo4KBikKkQh WqzRA== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3yudt701sy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Jun 2024 16:47:59 +0000 (GMT) Received: from m0360072.ppops.net (m0360072.ppops.net [127.0.0.1]) by pps.reinject (8.18.0.8/8.18.0.8) with ESMTP id 45IGlwgt000686; Tue, 18 Jun 2024 16:47:58 GMT Received: from ppma12.dal12v.mail.ibm.com (dc.9e.1632.ip4.static.sl-reverse.com [50.22.158.220]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3yudt701sw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Jun 2024 16:47:58 +0000 (GMT) Received: from pps.filterd (ppma12.dal12v.mail.ibm.com [127.0.0.1]) by ppma12.dal12v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 45IG3tUY006285; Tue, 18 Jun 2024 16:47:58 GMT Received: from smtprelay04.dal12v.mail.ibm.com ([172.16.1.6]) by ppma12.dal12v.mail.ibm.com (PPS) with ESMTPS id 3ysn9undyy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Jun 2024 16:47:58 +0000 Received: from smtpav05.wdc07v.mail.ibm.com (smtpav05.wdc07v.mail.ibm.com [10.39.53.232]) by smtprelay04.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 45IGlsbs25494020 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 18 Jun 2024 16:47:57 GMT Received: from smtpav05.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A448058059; Tue, 18 Jun 2024 16:47:54 +0000 (GMT) Received: from smtpav05.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2F34958043; Tue, 18 Jun 2024 16:47:51 +0000 (GMT) Received: from [9.43.25.201] (unknown [9.43.25.201]) by smtpav05.wdc07v.mail.ibm.com (Postfix) with ESMTP; Tue, 18 Jun 2024 16:47:50 +0000 (GMT) Message-ID: <43657e9f-91f9-426d-8bef-05b78755995f@linux.ibm.com> Date: Tue, 18 Jun 2024 22:17:49 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [Patch, rs6000, middle-end] v2: Add implementation for different targets for pair mem fusion To: Alex Coplan , "Kewen.Lin" , Segher Boessenkool , Michael Meissner , Peter Bergner , David Edelsohn , gcc-patches , richard.sandiford@arm.com References: <870719f4-0923-497d-bba2-c83e46a4b13a@linux.ibm.com> Content-Language: en-US From: Ajit Agarwal In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: pjQvW6Ud14tO52IjYFmPOEh5RoIU1JOz X-Proofpoint-ORIG-GUID: uoc3C39XtpPlFvQjk8Fqg5IAYaOQii79 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-18_02,2024-06-17_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 suspectscore=0 phishscore=0 adultscore=0 bulkscore=0 clxscore=1015 malwarescore=0 spamscore=0 mlxlogscore=861 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406180123 X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,KAM_MANYTO,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hello Richard: On 14/06/24 4:26 pm, Richard Sandiford wrote: > Ajit Agarwal writes: >> Hello Richard: >> >> All comments are addressed. > > I don't think this addresses the following comments from the previous > reviews: > > (1) It is not correct to mark existing insn uses as live-out. > The patch mustn't try to do this. > Addressed in v3 of the patch. > (2) To quote a previous review: > > It's probably better to create a fresh OO register, rather than > change an existing 128-bit register to 256 bits. If we do that, > and if reg:V16QI 125 is the destination of the second load > (which I assume it is from the 16 offset in the subreg), > then the new RTL should be: > > (vec_select:HI (subreg:V8HI (reg:OO NEW_REG) 16) ...) > > It's possible to get this by using insn_propagation to replace > (reg:V16QI 125) with (subreg:V16QI (reg:OO NEW_REG) 16). > insn_propagation should then take care of the rest. > > There are no existing rtl-ssa routines for handling new registers > though. (The idea was to add things as the need arose.) > > The reason for (2) is that changing the mode of an existing pseudo > invalidates all existing references to that pseudo. Although the > patch tries to fix things up, it's doing that at a stage where > there is already "garbage in" (in the sense that the starting > RTL is invalid). Just changing the mode would also invalidate > things like REG_EXPR, for example. > > In contrast, the advantage of creating a new pseudo means that every > insn transformation is from structurally valid RTL to structurally > valid RTL. It also prevents information being incorrectly carried > over from the old pseudo. > x Addressed in v3 of the patch. > Thanks, > Richard Thanks & Regards Ajit