From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 49341 invoked by alias); 26 Sep 2016 06:44:54 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 49267 invoked by uid 89); 26 Sep 2016 06:44:53 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=AMOUNT, lieu X-HELO: smtp.eu.adacore.com Received: from mel.act-europe.fr (HELO smtp.eu.adacore.com) (194.98.77.210) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 26 Sep 2016 06:44:43 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id 05BA181339; Mon, 26 Sep 2016 08:44:40 +0200 (CEST) Received: from smtp.eu.adacore.com ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id sDPVIKYc5zjq; Mon, 26 Sep 2016 08:44:39 +0200 (CEST) Received: from polaris.localnet (bon31-6-88-161-99-133.fbx.proxad.net [88.161.99.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.eu.adacore.com (Postfix) with ESMTPSA id D25EE81337; Mon, 26 Sep 2016 08:44:39 +0200 (CEST) From: Eric Botcazou To: Jeff Law Cc: gcc-patches@gcc.gnu.org Subject: Re: [patch] Fix ICE on ACATS test for Aarch64 at -O Date: Mon, 26 Sep 2016 07:33:00 -0000 Message-ID: <4485071.DuJRMUeJTt@polaris> User-Agent: KMail/4.14.10 (Linux/3.16.7-42-desktop; KDE/4.14.9; x86_64; ; ) In-Reply-To: <73ddb77a-0c10-f73b-25e6-9088acdd139b@redhat.com> References: <1566344.Esnov9ALD2@polaris> <73ddb77a-0c10-f73b-25e6-9088acdd139b@redhat.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="nextPart5808760.RQoN4BIhIb" Content-Transfer-Encoding: 7Bit X-SW-Source: 2016-09/txt/msg01783.txt.bz2 This is a multi-part message in MIME format. --nextPart5808760.RQoN4BIhIb Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Content-length: 520 > So while emit_store_flag_force knows what to do upon NULL return, I'm > not sure the other users of expand_shift/expand_shift_1 do. Revised patch attached, tested on x86-64/Linux, OK for the mainline? 2016-09-26 Eric Botcazou * expmed.c (expand_shift_1): Add MAY_FAIL parameter and do not assert that the result is non-zero if it is true. (maybe_expand_shift): New wrapper around expand_shift_1. (emit_store_flag): Call maybe_expand_shift in lieu of expand_shift. -- Eric Botcazou --nextPart5808760.RQoN4BIhIb Content-Disposition: attachment; filename="p.diff" Content-Transfer-Encoding: 7Bit Content-Type: text/x-patch; charset="UTF-8"; name="p.diff" Content-length: 2599 Index: expmed.c =================================================================== --- expmed.c (revision 240311) +++ expmed.c (working copy) @@ -2247,11 +2247,13 @@ expand_dec (rtx target, rtx dec) and AMOUNT the rtx for the amount to shift by. Store the result in the rtx TARGET, if that is convenient. If UNSIGNEDP is nonzero, do a logical shift; otherwise, arithmetic. - Return the rtx for where the value is. */ + Return the rtx for where the value is. + If that cannot be done, abort the compilation unless MAY_FAIL is true, + in which case 0 is returned. */ static rtx expand_shift_1 (enum tree_code code, machine_mode mode, rtx shifted, - rtx amount, rtx target, int unsignedp) + rtx amount, rtx target, int unsignedp, bool may_fail = false) { rtx op1, temp = 0; int left = (code == LSHIFT_EXPR || code == LROTATE_EXPR); @@ -2448,7 +2450,7 @@ expand_shift_1 (enum tree_code code, mac define_expand for lshrsi3 was added to vax.md. */ } - gcc_assert (temp); + gcc_assert (temp != NULL_RTX || may_fail); return temp; } @@ -2467,6 +2469,16 @@ expand_shift (enum tree_code code, machi shifted, GEN_INT (amount), target, unsignedp); } +/* Likewise, but return 0 if that cannot be done. */ + +static rtx +maybe_expand_shift (enum tree_code code, machine_mode mode, rtx shifted, + int amount, rtx target, int unsignedp) +{ + return expand_shift_1 (code, mode, + shifted, GEN_INT (amount), target, unsignedp, true); +} + /* Output a shift instruction for expression code CODE, with SHIFTED being the rtx for the value to shift, and AMOUNT the tree for the amount to shift by. @@ -5753,11 +5765,12 @@ emit_store_flag (rtx target, enum rtx_co if (rtx_equal_p (subtarget, op0)) subtarget = 0; - tem = expand_shift (RSHIFT_EXPR, mode, op0, - GET_MODE_BITSIZE (mode) - 1, - subtarget, 0); - tem = expand_binop (mode, sub_optab, tem, op0, subtarget, 0, - OPTAB_WIDEN); + tem = maybe_expand_shift (RSHIFT_EXPR, mode, op0, + GET_MODE_BITSIZE (mode) - 1, + subtarget, 0); + if (tem) + tem = expand_binop (mode, sub_optab, tem, op0, subtarget, 0, + OPTAB_WIDEN); } if (code == EQ || code == NE) @@ -5819,9 +5832,9 @@ emit_store_flag (rtx target, enum rtx_co } if (tem && normalizep) - tem = expand_shift (RSHIFT_EXPR, mode, tem, - GET_MODE_BITSIZE (mode) - 1, - subtarget, normalizep == 1); + tem = maybe_expand_shift (RSHIFT_EXPR, mode, tem, + GET_MODE_BITSIZE (mode) - 1, + subtarget, normalizep == 1); if (tem) { --nextPart5808760.RQoN4BIhIb--