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From: Szabolcs Nagy <szabolcs.nagy@arm.com>
To: <gcc-patches@gcc.gnu.org>
Subject: [PATCH v2 4/7] aarch64: Disable branch-protection for pcs tests
Date: Fri, 3 Nov 2023 15:36:26 +0000	[thread overview]
Message-ID: <448b7663e4422d8ee68c2744544567484f309bd2.1699025214.git.szabolcs.nagy@arm.com> (raw)
In-Reply-To: <cover.1699025214.git.szabolcs.nagy@arm.com>

The tests manipulate the return address in abitest-2.h and thus not
compatible with -mbranch-protection=pac-ret+leaf or
-mbranch-protection=gcs.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/aapcs64/func-ret-1.c: Disable branch-protection.
	* gcc.target/aarch64/aapcs64/func-ret-2.c: Likewise.
	* gcc.target/aarch64/aapcs64/func-ret-3.c: Likewise.
	* gcc.target/aarch64/aapcs64/func-ret-4.c: Likewise.
	* gcc.target/aarch64/aapcs64/func-ret-64x1_1.c: Likewise.
---
unchanged compared to v1
already approved at
https://gcc.gnu.org/pipermail/gcc-patches/2023-September/629353.html
---
 gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c      | 1 +
 gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c      | 1 +
 gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c      | 1 +
 gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c      | 1 +
 gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c | 1 +
 5 files changed, 5 insertions(+)

diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c
index 5405e1e4920..7bd7757efe6 100644
--- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c
+++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c
@@ -4,6 +4,7 @@
    AAPCS64 \S 4.1.  */
 
 /* { dg-do run { target aarch64*-*-* } } */
+/* { dg-additional-options "-mbranch-protection=none" } */
 /* { dg-additional-sources "abitest.S" } */
 
 #ifndef IN_FRAMEWORK
diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c
index 6b171c46fbb..85a822ace4a 100644
--- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c
+++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c
@@ -4,6 +4,7 @@
    Homogeneous floating-point aggregate types are covered in func-ret-3.c.  */
 
 /* { dg-do run { target aarch64*-*-* } } */
+/* { dg-additional-options "-mbranch-protection=none" } */
 /* { dg-additional-sources "abitest.S" } */
 
 #ifndef IN_FRAMEWORK
diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c
index ad312b675b9..1d35ebf14b4 100644
--- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c
+++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c
@@ -4,6 +4,7 @@
    in AAPCS64 \S 4.3.5.  */
 
 /* { dg-do run { target aarch64-*-* } } */
+/* { dg-additional-options "-mbranch-protection=none" } */
 /* { dg-additional-sources "abitest.S" } */
 /* { dg-require-effective-target aarch64_big_endian } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c
index af05fbe9fdf..15e1408c62d 100644
--- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c
+++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c
@@ -5,6 +5,7 @@
    are treated as general composite types.  */
 
 /* { dg-do run { target aarch64*-*-* } } */
+/* { dg-additional-options "-mbranch-protection=none" } */
 /* { dg-additional-sources "abitest.S" } */
 /* { dg-require-effective-target aarch64_big_endian } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c
index 05957e2dcae..fe7bbb6a835 100644
--- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c
@@ -3,6 +3,7 @@
   Test 64-bit singleton vector types which should be in FP/SIMD registers.  */
 
 /* { dg-do run { target aarch64*-*-* } } */
+/* { dg-additional-options "-mbranch-protection=none" } */
 /* { dg-additional-sources "abitest.S" } */
 
 #ifndef IN_FRAMEWORK
-- 
2.25.1


  parent reply	other threads:[~2023-11-03 15:36 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-03 15:36 [PATCH v2 0/7] aarch64 GCS preliminary patches Szabolcs Nagy
2023-11-03 15:36 ` [PATCH v2 1/7] aarch64: Use br instead of ret for eh_return Szabolcs Nagy
2023-11-13  0:27   ` Hans-Peter Nilsson
2023-11-13 11:18     ` Szabolcs Nagy
2023-11-26 12:11   ` Richard Sandiford
2023-11-03 15:36 ` [PATCH v2 2/7] aarch64: Do not force a stack frame for EH returns Szabolcs Nagy
2023-11-26 12:12   ` Richard Sandiford
2023-11-03 15:36 ` [PATCH v2 3/7] aarch64: Add eh_return compile tests Szabolcs Nagy
2023-11-26 14:37   ` Richard Sandiford
2023-11-27 10:04     ` Szabolcs Nagy
2023-11-27 15:57     ` Szabolcs Nagy
2023-12-02 19:23   ` Andrew Pinski
2023-11-03 15:36 ` Szabolcs Nagy [this message]
2023-11-03 15:36 ` [PATCH v2 5/7] aarch64,arm: Remove accepted_branch_protection_string Szabolcs Nagy
2023-11-26 14:50   ` Richard Sandiford
2023-11-03 15:36 ` [PATCH v2 6/7] aarch64,arm: Fix branch-protection= parsing Szabolcs Nagy
2023-12-07 13:02   ` Richard Earnshaw
2023-11-03 15:36 ` [PATCH v2 7/7] aarch64,arm: Move branch-protection data to targets Szabolcs Nagy
2023-12-07 13:13   ` Richard Earnshaw
2024-01-11 14:43     ` Szabolcs Nagy
2024-01-11 14:49       ` Richard Earnshaw (lists)

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