[PATCH] Re: MIPS support for __builtin_flush_icache() breaks -mips16

[Sandra Loosemore <sandra@codesourcery.com>]

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David Daney wrote:
> Sandra Loosemore wrote:
>> Now that mainline HEAD is buildable on MIPS again, I've observed that 
>> this patch
>>
>> http://gcc.gnu.org/ml/gcc-patches/2007-07/msg01026.html
>>
>> causes failures with -mips16, e.g. on 
>> gcc.c-torture/compile/20050122-2.c.
> 
> That makes sense to me.  However I am have never tested mips16.
> 
> There are several options:
> 
> 1) Tell me how you configured and tested.  I think one of my boards will 
> do mips16 so I could probably test it if I hacked around a little.
> 
> 2) You could prepare a patch and test with that change as it seems that 
> you are able to do mips16 testing.

Well, the answer to 1) is that I'm building mipsisa32r2-elfoabi and testing 
using the GDB simulator.  But, if you're not set up to do this, 2) is probably 
easier all around, so I built and tested the attached patch overnight, and 
verified that it fixes the MIPS16 regressions.

OK to commit?

-Sandra

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2007-07-30  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/
	* config/mips/mips.h (ISA_HAS_SYNCI):  Add !TARGET_MIPS16 test.

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Index: gcc/config/mips/mips.h
===================================================================
*** gcc/config/mips/mips.h	(revision 127056)
--- gcc/config/mips/mips.h	(working copy)
*************** extern const struct mips_rtx_cost_data *
*** 819,825 ****
  				 || TARGET_MIPS5500)
  
  /* ISA includes synci, jr.hb and jalr.hb.  */
! #define ISA_HAS_SYNCI ISA_MIPS32R2
  
  \f
  /* Add -G xx support.  */
--- 819,825 ----
  				 || TARGET_MIPS5500)
  
  /* ISA includes synci, jr.hb and jalr.hb.  */
! #define ISA_HAS_SYNCI (ISA_MIPS32R2 && !TARGET_MIPS16)
  
  \f
  /* Add -G xx support.  */