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* MIPS support for __builtin_flush_icache() breaks -mips16
@ 2007-07-30  3:15 Sandra Loosemore
  2007-07-30  7:54 ` David Daney
  0 siblings, 1 reply; 5+ messages in thread
From: Sandra Loosemore @ 2007-07-30  3:15 UTC (permalink / raw)
  To: David Daney; +Cc: GCC Patches, Richard Sandiford

Now that mainline HEAD is buildable on MIPS again, I've observed that this patch

http://gcc.gnu.org/ml/gcc-patches/2007-07/msg01026.html

causes failures with -mips16, e.g. on gcc.c-torture/compile/20050122-2.c.  You 
probably want to do

#define ISA_HAS_SYNCI (ISA_MIPS32R2 && !TARGET_MIPS16)

or something like that, right?

-Sandra

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: MIPS support for __builtin_flush_icache() breaks -mips16
  2007-07-30  3:15 MIPS support for __builtin_flush_icache() breaks -mips16 Sandra Loosemore
@ 2007-07-30  7:54 ` David Daney
  2007-07-30 12:53   ` [PATCH] " Sandra Loosemore
  0 siblings, 1 reply; 5+ messages in thread
From: David Daney @ 2007-07-30  7:54 UTC (permalink / raw)
  To: Sandra Loosemore; +Cc: GCC Patches, Richard Sandiford

Sandra Loosemore wrote:
> Now that mainline HEAD is buildable on MIPS again, I've observed that 
> this patch
>
> http://gcc.gnu.org/ml/gcc-patches/2007-07/msg01026.html
>
> causes failures with -mips16, e.g. on 
> gcc.c-torture/compile/20050122-2.c.  You probably want to do
>
> #define ISA_HAS_SYNCI (ISA_MIPS32R2 && !TARGET_MIPS16)
>
> or something like that, right?
>

That makes sense to me.  However I am have never tested mips16.

There are several options:

1) Tell me how you configured and tested.  I think one of my boards will 
do mips16 so I could probably test it if I hacked around a little.

2) You could prepare a patch and test with that change as it seems that 
you are able to do mips16 testing.

Thanks,
David Daney

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH] Re: MIPS support for __builtin_flush_icache() breaks -mips16
  2007-07-30  7:54 ` David Daney
@ 2007-07-30 12:53   ` Sandra Loosemore
  2007-07-31  7:33     ` Richard Sandiford
  0 siblings, 1 reply; 5+ messages in thread
From: Sandra Loosemore @ 2007-07-30 12:53 UTC (permalink / raw)
  To: David Daney; +Cc: GCC Patches, Richard Sandiford

[-- Attachment #1: Type: text/plain, Size: 948 bytes --]

David Daney wrote:
> Sandra Loosemore wrote:
>> Now that mainline HEAD is buildable on MIPS again, I've observed that 
>> this patch
>>
>> http://gcc.gnu.org/ml/gcc-patches/2007-07/msg01026.html
>>
>> causes failures with -mips16, e.g. on 
>> gcc.c-torture/compile/20050122-2.c.
> 
> That makes sense to me.  However I am have never tested mips16.
> 
> There are several options:
> 
> 1) Tell me how you configured and tested.  I think one of my boards will 
> do mips16 so I could probably test it if I hacked around a little.
> 
> 2) You could prepare a patch and test with that change as it seems that 
> you are able to do mips16 testing.

Well, the answer to 1) is that I'm building mipsisa32r2-elfoabi and testing 
using the GDB simulator.  But, if you're not set up to do this, 2) is probably 
easier all around, so I built and tested the attached patch overnight, and 
verified that it fixes the MIPS16 regressions.

OK to commit?

-Sandra

[-- Attachment #2: synci.log --]
[-- Type: text/x-log, Size: 128 bytes --]

2007-07-30  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/
	* config/mips/mips.h (ISA_HAS_SYNCI):  Add !TARGET_MIPS16 test.

[-- Attachment #3: synci.patch --]
[-- Type: text/x-patch, Size: 596 bytes --]

Index: gcc/config/mips/mips.h
===================================================================
*** gcc/config/mips/mips.h	(revision 127056)
--- gcc/config/mips/mips.h	(working copy)
*************** extern const struct mips_rtx_cost_data *
*** 819,825 ****
  				 || TARGET_MIPS5500)
  
  /* ISA includes synci, jr.hb and jalr.hb.  */
! #define ISA_HAS_SYNCI ISA_MIPS32R2
  
  \f
  /* Add -G xx support.  */
--- 819,825 ----
  				 || TARGET_MIPS5500)
  
  /* ISA includes synci, jr.hb and jalr.hb.  */
! #define ISA_HAS_SYNCI (ISA_MIPS32R2 && !TARGET_MIPS16)
  
  \f
  /* Add -G xx support.  */

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] Re: MIPS support for __builtin_flush_icache() breaks -mips16
  2007-07-30 12:53   ` [PATCH] " Sandra Loosemore
@ 2007-07-31  7:33     ` Richard Sandiford
  2007-07-31 12:11       ` Sandra Loosemore
  0 siblings, 1 reply; 5+ messages in thread
From: Richard Sandiford @ 2007-07-31  7:33 UTC (permalink / raw)
  To: Sandra Loosemore; +Cc: David Daney, GCC Patches

Sandra Loosemore <sandra@codesourcery.com> writes:
> 	gcc/
> 	* config/mips/mips.h (ISA_HAS_SYNCI):  Add !TARGET_MIPS16 test.

OK thanks.  Sorry to David; I should have thought about this in the review.

Richard

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] Re: MIPS support for __builtin_flush_icache() breaks  -mips16
  2007-07-31  7:33     ` Richard Sandiford
@ 2007-07-31 12:11       ` Sandra Loosemore
  0 siblings, 0 replies; 5+ messages in thread
From: Sandra Loosemore @ 2007-07-31 12:11 UTC (permalink / raw)
  To: David Daney, GCC Patches, richard

Richard Sandiford wrote:
> Sandra Loosemore <sandra@codesourcery.com> writes:
>> 	gcc/
>> 	* config/mips/mips.h (ISA_HAS_SYNCI):  Add !TARGET_MIPS16 test.
> 
> OK thanks.  Sorry to David; I should have thought about this in the review.

OK, committed now.

-Sandra


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2007-07-31 11:16 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2007-07-30  3:15 MIPS support for __builtin_flush_icache() breaks -mips16 Sandra Loosemore
2007-07-30  7:54 ` David Daney
2007-07-30 12:53   ` [PATCH] " Sandra Loosemore
2007-07-31  7:33     ` Richard Sandiford
2007-07-31 12:11       ` Sandra Loosemore

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