* RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
@ 2011-09-26 5:08 Xinyu Qi
0 siblings, 0 replies; 9+ messages in thread
From: Xinyu Qi @ 2011-09-26 5:08 UTC (permalink / raw)
To: Ramana Radhakrishnan; +Cc: gcc-patches
Ping.
http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html
* config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
(builtin_description bdesc_2arg): Revise built in declaration.
(builtin_description bdesc_1arg): Likewise.
(arm_init_iwmmxt_builtins): Revise built in initialization.
(arm_expand_builtin): Revise built in expansion.
At 2011-07-29 11:03:17,"Xinyu Qi" <xyqi@marvell.com> wrote:
> Ping.
>
> http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html
>
> At 2011-07-14 15:38:47,"Xinyu Qi" <xyqi@marvell.com> wrote:
> > > Hi,
> > >
> > > It is the third part of iWMMXt maintenance.
> > >
> >
> > *config/arm/arm.c (enum arm_builtins): Built-in fcode.
> > (builtin_description bdesc_2arg): Built in declare.
> > (builtin_description bdesc_1arg): Ditto.
> > (arm_init_iwmmxt_builtins): Built in initialize.
> > (arm_expand_builtin): Built in expand.
> >
> >
> > Thanks,
> > Xinyu
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
2011-11-18 23:47 ` Ramana Radhakrishnan
` (3 preceding siblings ...)
2012-02-03 2:08 ` Xinyu Qi
@ 2012-03-13 8:56 ` Xinyu Qi
4 siblings, 0 replies; 9+ messages in thread
From: Xinyu Qi @ 2012-03-13 8:56 UTC (permalink / raw)
To: Richard Earnshaw; +Cc: gcc-patches, Ramana Radhakrishnan
PING
At 2012-02-03 10:07:56,"Xinyu Qi" <xyqi@marvell.com> wrote:
> PING
>
> http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01789.html
>
> At 2011-12-29 14:25:23,"Xinyu Qi" <xyqi@marvell.com> wrote:
> > > At 2011-11-24 09:27:04,"Xinyu Qi" <xyqi@marvell.com> wrote:
> > > > At 2011-11-19 07:08:22,"Ramana Radhakrishnan"
> > > > <ramana.radhakrishnan@linaro.org> wrote:
> > > > > On 20 October 2011 08:39, Xinyu Qi <xyqi@marvell.com> wrote:
> > > > > > Ping
> > > > > >
> > > > > > http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html
> > > > > >
> > > > > > * config/arm/arm.c (enum arm_builtins): Revise built-in
> fcode.
> > > > > > (builtin_description bdesc_2arg): Revise built in declaration.
> > > > > > (builtin_description bdesc_1arg): Likewise.
> > > > > > (arm_init_iwmmxt_builtins): Revise built in initialization.
> > > > > > (arm_expand_builtin): Revise built in expansion.
> > > > > >
> > > > >
> > > > > This currently doesn't apply - can you take a look ?
> > > >
> > > > Hi Ramana,
> > > >
> > > > I resolve the patch conflict with the newest trunk gcc. The resolved
> > > > diff is attached.
> > > >
> > > > Thanks,
> > > > Xinyu
> > >
> > > Update the built in expand. Remove some redundant code.
> > > New diff is attached.
> > >
> > > Thanks,
> > > Xinyu
> >
> > * config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
> > (IWMMXT2_BUILTIN): New define.
> > (IWMMXT2_BUILTIN2): Likewise.
> > (iwmmx2_mbuiltin): Likewise.
> > (builtin_description bdesc_2arg): Revise built in declaration.
> > (builtin_description bdesc_1arg): Likewise.
> > (arm_init_iwmmxt_builtins): Revise built in initialization.
> > (arm_expand_builtin): Revise built in expansion.
> >
> > Thanks,
> > Xinyu
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
2011-11-18 23:47 ` Ramana Radhakrishnan
` (2 preceding siblings ...)
2011-12-29 6:39 ` Xinyu Qi
@ 2012-02-03 2:08 ` Xinyu Qi
2012-03-13 8:56 ` Xinyu Qi
4 siblings, 0 replies; 9+ messages in thread
From: Xinyu Qi @ 2012-02-03 2:08 UTC (permalink / raw)
To: Richard Earnshaw; +Cc: gcc-patches, Ramana Radhakrishnan
PING
http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01789.html
At 2011-12-29 14:25:23,"Xinyu Qi" <xyqi@marvell.com> wrote:
> > At 2011-11-24 09:27:04,"Xinyu Qi" <xyqi@marvell.com> wrote:
> > > At 2011-11-19 07:08:22,"Ramana Radhakrishnan"
> > > <ramana.radhakrishnan@linaro.org> wrote:
> > > > On 20 October 2011 08:39, Xinyu Qi <xyqi@marvell.com> wrote:
> > > > > Ping
> > > > >
> > > > > http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html
> > > > >
> > > > > * config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
> > > > > (builtin_description bdesc_2arg): Revise built in declaration.
> > > > > (builtin_description bdesc_1arg): Likewise.
> > > > > (arm_init_iwmmxt_builtins): Revise built in initialization.
> > > > > (arm_expand_builtin): Revise built in expansion.
> > > > >
> > > >
> > > > This currently doesn't apply - can you take a look ?
> > >
> > > Hi Ramana,
> > >
> > > I resolve the patch conflict with the newest trunk gcc. The resolved
> > > diff is attached.
> > >
> > > Thanks,
> > > Xinyu
> >
> > Update the built in expand. Remove some redundant code.
> > New diff is attached.
> >
> > Thanks,
> > Xinyu
>
> * config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
> (IWMMXT2_BUILTIN): New define.
> (IWMMXT2_BUILTIN2): Likewise.
> (iwmmx2_mbuiltin): Likewise.
> (builtin_description bdesc_2arg): Revise built in declaration.
> (builtin_description bdesc_1arg): Likewise.
> (arm_init_iwmmxt_builtins): Revise built in initialization.
> (arm_expand_builtin): Revise built in expansion.
>
> Thanks,
> Xinyu
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
2011-11-18 23:47 ` Ramana Radhakrishnan
2011-11-24 7:09 ` Xinyu Qi
2011-12-22 6:55 ` Xinyu Qi
@ 2011-12-29 6:39 ` Xinyu Qi
2012-02-03 2:08 ` Xinyu Qi
2012-03-13 8:56 ` Xinyu Qi
4 siblings, 0 replies; 9+ messages in thread
From: Xinyu Qi @ 2011-12-29 6:39 UTC (permalink / raw)
To: Richard Earnshaw; +Cc: gcc-patches, Ramana Radhakrishnan
[-- Attachment #1: Type: text/plain, Size: 1429 bytes --]
> At 2011-11-24 09:27:04,"Xinyu Qi" <xyqi@marvell.com> wrote:
> > At 2011-11-19 07:08:22,"Ramana Radhakrishnan"
> > <ramana.radhakrishnan@linaro.org> wrote:
> > > On 20 October 2011 08:39, Xinyu Qi <xyqi@marvell.com> wrote:
> > > > Ping
> > > >
> > > > http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html
> > > >
> > > > * config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
> > > > (builtin_description bdesc_2arg): Revise built in declaration.
> > > > (builtin_description bdesc_1arg): Likewise.
> > > > (arm_init_iwmmxt_builtins): Revise built in initialization.
> > > > (arm_expand_builtin): Revise built in expansion.
> > > >
> > >
> > > This currently doesn't apply - can you take a look ?
> >
> > Hi Ramana,
> >
> > I resolve the patch conflict with the newest trunk gcc. The resolved
> > diff is attached.
> >
> > Thanks,
> > Xinyu
>
> Update the built in expand. Remove some redundant code.
> New diff is attached.
>
> Thanks,
> Xinyu
* config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
(IWMMXT2_BUILTIN): New define.
(IWMMXT2_BUILTIN2): Likewise.
(iwmmx2_mbuiltin): Likewise.
(builtin_description bdesc_2arg): Revise built in declaration.
(builtin_description bdesc_1arg): Likewise.
(arm_init_iwmmxt_builtins): Revise built in initialization.
(arm_expand_builtin): Revise built in expansion.
Thanks,
Xinyu
[-- Attachment #2: 3_arm_c.diff --]
[-- Type: application/octet-stream, Size: 34444 bytes --]
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c (revision 182703)
+++ gcc/config/arm/arm.c (working copy)
@@ -19239,8 +19239,15 @@ static neon_builtin_datum neon_builtin_d
FIXME? */
enum arm_builtins
{
- ARM_BUILTIN_GETWCX,
- ARM_BUILTIN_SETWCX,
+ ARM_BUILTIN_GETWCGR0,
+ ARM_BUILTIN_GETWCGR1,
+ ARM_BUILTIN_GETWCGR2,
+ ARM_BUILTIN_GETWCGR3,
+
+ ARM_BUILTIN_SETWCGR0,
+ ARM_BUILTIN_SETWCGR1,
+ ARM_BUILTIN_SETWCGR2,
+ ARM_BUILTIN_SETWCGR3,
ARM_BUILTIN_WZERO,
@@ -19263,7 +19270,11 @@ enum arm_builtins
ARM_BUILTIN_WSADH,
ARM_BUILTIN_WSADHZ,
- ARM_BUILTIN_WALIGN,
+ ARM_BUILTIN_WALIGNI,
+ ARM_BUILTIN_WALIGNR0,
+ ARM_BUILTIN_WALIGNR1,
+ ARM_BUILTIN_WALIGNR2,
+ ARM_BUILTIN_WALIGNR3,
ARM_BUILTIN_TMIA,
ARM_BUILTIN_TMIAPH,
@@ -19399,6 +19410,81 @@ enum arm_builtins
ARM_BUILTIN_WUNPCKELUH,
ARM_BUILTIN_WUNPCKELUW,
+ ARM_BUILTIN_WABSB,
+ ARM_BUILTIN_WABSH,
+ ARM_BUILTIN_WABSW,
+
+ ARM_BUILTIN_WADDSUBHX,
+ ARM_BUILTIN_WSUBADDHX,
+
+ ARM_BUILTIN_WABSDIFFB,
+ ARM_BUILTIN_WABSDIFFH,
+ ARM_BUILTIN_WABSDIFFW,
+
+ ARM_BUILTIN_WADDCH,
+ ARM_BUILTIN_WADDCW,
+
+ ARM_BUILTIN_WAVG4,
+ ARM_BUILTIN_WAVG4R,
+
+ ARM_BUILTIN_WMADDSX,
+ ARM_BUILTIN_WMADDUX,
+
+ ARM_BUILTIN_WMADDSN,
+ ARM_BUILTIN_WMADDUN,
+
+ ARM_BUILTIN_WMULWSM,
+ ARM_BUILTIN_WMULWUM,
+
+ ARM_BUILTIN_WMULWSMR,
+ ARM_BUILTIN_WMULWUMR,
+
+ ARM_BUILTIN_WMULWL,
+
+ ARM_BUILTIN_WMULSMR,
+ ARM_BUILTIN_WMULUMR,
+
+ ARM_BUILTIN_WQMULM,
+ ARM_BUILTIN_WQMULMR,
+
+ ARM_BUILTIN_WQMULWM,
+ ARM_BUILTIN_WQMULWMR,
+
+ ARM_BUILTIN_WADDBHUSM,
+ ARM_BUILTIN_WADDBHUSL,
+
+ ARM_BUILTIN_WQMIABB,
+ ARM_BUILTIN_WQMIABT,
+ ARM_BUILTIN_WQMIATB,
+ ARM_BUILTIN_WQMIATT,
+
+ ARM_BUILTIN_WQMIABBN,
+ ARM_BUILTIN_WQMIABTN,
+ ARM_BUILTIN_WQMIATBN,
+ ARM_BUILTIN_WQMIATTN,
+
+ ARM_BUILTIN_WMIABB,
+ ARM_BUILTIN_WMIABT,
+ ARM_BUILTIN_WMIATB,
+ ARM_BUILTIN_WMIATT,
+
+ ARM_BUILTIN_WMIABBN,
+ ARM_BUILTIN_WMIABTN,
+ ARM_BUILTIN_WMIATBN,
+ ARM_BUILTIN_WMIATTN,
+
+ ARM_BUILTIN_WMIAWBB,
+ ARM_BUILTIN_WMIAWBT,
+ ARM_BUILTIN_WMIAWTB,
+ ARM_BUILTIN_WMIAWTT,
+
+ ARM_BUILTIN_WMIAWBBN,
+ ARM_BUILTIN_WMIAWBTN,
+ ARM_BUILTIN_WMIAWTBN,
+ ARM_BUILTIN_WMIAWTTN,
+
+ ARM_BUILTIN_WMERGE,
+
ARM_BUILTIN_THREAD_POINTER,
ARM_BUILTIN_NEON_BASE,
@@ -19931,6 +20017,10 @@ static const struct builtin_description
{ FL_IWMMXT, CODE_FOR_##code, "__builtin_arm_" string, \
ARM_BUILTIN_##builtin, UNKNOWN, 0 },
+#define IWMMXT2_BUILTIN(code, string, builtin) \
+ { FL_IWMMXT2, CODE_FOR_##code, "__builtin_arm_" string, \
+ ARM_BUILTIN_##builtin, UNKNOWN, 0 },
+
IWMMXT_BUILTIN (addv8qi3, "waddb", WADDB)
IWMMXT_BUILTIN (addv4hi3, "waddh", WADDH)
IWMMXT_BUILTIN (addv2si3, "waddw", WADDW)
@@ -19987,44 +20077,45 @@ static const struct builtin_description
IWMMXT_BUILTIN (iwmmxt_wunpckihb, "wunpckihb", WUNPCKIHB)
IWMMXT_BUILTIN (iwmmxt_wunpckihh, "wunpckihh", WUNPCKIHH)
IWMMXT_BUILTIN (iwmmxt_wunpckihw, "wunpckihw", WUNPCKIHW)
- IWMMXT_BUILTIN (iwmmxt_wmadds, "wmadds", WMADDS)
- IWMMXT_BUILTIN (iwmmxt_wmaddu, "wmaddu", WMADDU)
+ IWMMXT2_BUILTIN (iwmmxt_waddsubhx, "waddsubhx", WADDSUBHX)
+ IWMMXT2_BUILTIN (iwmmxt_wsubaddhx, "wsubaddhx", WSUBADDHX)
+ IWMMXT2_BUILTIN (iwmmxt_wabsdiffb, "wabsdiffb", WABSDIFFB)
+ IWMMXT2_BUILTIN (iwmmxt_wabsdiffh, "wabsdiffh", WABSDIFFH)
+ IWMMXT2_BUILTIN (iwmmxt_wabsdiffw, "wabsdiffw", WABSDIFFW)
+ IWMMXT2_BUILTIN (iwmmxt_avg4, "wavg4", WAVG4)
+ IWMMXT2_BUILTIN (iwmmxt_avg4r, "wavg4r", WAVG4R)
+ IWMMXT2_BUILTIN (iwmmxt_wmulwsm, "wmulwsm", WMULWSM)
+ IWMMXT2_BUILTIN (iwmmxt_wmulwum, "wmulwum", WMULWUM)
+ IWMMXT2_BUILTIN (iwmmxt_wmulwsmr, "wmulwsmr", WMULWSMR)
+ IWMMXT2_BUILTIN (iwmmxt_wmulwumr, "wmulwumr", WMULWUMR)
+ IWMMXT2_BUILTIN (iwmmxt_wmulwl, "wmulwl", WMULWL)
+ IWMMXT2_BUILTIN (iwmmxt_wmulsmr, "wmulsmr", WMULSMR)
+ IWMMXT2_BUILTIN (iwmmxt_wmulumr, "wmulumr", WMULUMR)
+ IWMMXT2_BUILTIN (iwmmxt_wqmulm, "wqmulm", WQMULM)
+ IWMMXT2_BUILTIN (iwmmxt_wqmulmr, "wqmulmr", WQMULMR)
+ IWMMXT2_BUILTIN (iwmmxt_wqmulwm, "wqmulwm", WQMULWM)
+ IWMMXT2_BUILTIN (iwmmxt_wqmulwmr, "wqmulwmr", WQMULWMR)
+ IWMMXT_BUILTIN (iwmmxt_walignr0, "walignr0", WALIGNR0)
+ IWMMXT_BUILTIN (iwmmxt_walignr1, "walignr1", WALIGNR1)
+ IWMMXT_BUILTIN (iwmmxt_walignr2, "walignr2", WALIGNR2)
+ IWMMXT_BUILTIN (iwmmxt_walignr3, "walignr3", WALIGNR3)
#define IWMMXT_BUILTIN2(code, builtin) \
{ FL_IWMMXT, CODE_FOR_##code, NULL, ARM_BUILTIN_##builtin, UNKNOWN, 0 },
+#define IWMMXT2_BUILTIN2(code, builtin) \
+ { FL_IWMMXT2, CODE_FOR_##code, NULL, ARM_BUILTIN_##builtin, UNKNOWN, 0 },
+
+ IWMMXT2_BUILTIN2 (iwmmxt_waddbhusm, WADDBHUSM)
+ IWMMXT2_BUILTIN2 (iwmmxt_waddbhusl, WADDBHUSL)
IWMMXT_BUILTIN2 (iwmmxt_wpackhss, WPACKHSS)
IWMMXT_BUILTIN2 (iwmmxt_wpackwss, WPACKWSS)
IWMMXT_BUILTIN2 (iwmmxt_wpackdss, WPACKDSS)
IWMMXT_BUILTIN2 (iwmmxt_wpackhus, WPACKHUS)
IWMMXT_BUILTIN2 (iwmmxt_wpackwus, WPACKWUS)
IWMMXT_BUILTIN2 (iwmmxt_wpackdus, WPACKDUS)
- IWMMXT_BUILTIN2 (ashlv4hi3_di, WSLLH)
- IWMMXT_BUILTIN2 (ashlv4hi3_iwmmxt, WSLLHI)
- IWMMXT_BUILTIN2 (ashlv2si3_di, WSLLW)
- IWMMXT_BUILTIN2 (ashlv2si3_iwmmxt, WSLLWI)
- IWMMXT_BUILTIN2 (ashldi3_di, WSLLD)
- IWMMXT_BUILTIN2 (ashldi3_iwmmxt, WSLLDI)
- IWMMXT_BUILTIN2 (lshrv4hi3_di, WSRLH)
- IWMMXT_BUILTIN2 (lshrv4hi3_iwmmxt, WSRLHI)
- IWMMXT_BUILTIN2 (lshrv2si3_di, WSRLW)
- IWMMXT_BUILTIN2 (lshrv2si3_iwmmxt, WSRLWI)
- IWMMXT_BUILTIN2 (lshrdi3_di, WSRLD)
- IWMMXT_BUILTIN2 (lshrdi3_iwmmxt, WSRLDI)
- IWMMXT_BUILTIN2 (ashrv4hi3_di, WSRAH)
- IWMMXT_BUILTIN2 (ashrv4hi3_iwmmxt, WSRAHI)
- IWMMXT_BUILTIN2 (ashrv2si3_di, WSRAW)
- IWMMXT_BUILTIN2 (ashrv2si3_iwmmxt, WSRAWI)
- IWMMXT_BUILTIN2 (ashrdi3_di, WSRAD)
- IWMMXT_BUILTIN2 (ashrdi3_iwmmxt, WSRADI)
- IWMMXT_BUILTIN2 (rorv4hi3_di, WRORH)
- IWMMXT_BUILTIN2 (rorv4hi3, WRORHI)
- IWMMXT_BUILTIN2 (rorv2si3_di, WRORW)
- IWMMXT_BUILTIN2 (rorv2si3, WRORWI)
- IWMMXT_BUILTIN2 (rordi3_di, WRORD)
- IWMMXT_BUILTIN2 (rordi3, WRORDI)
- IWMMXT_BUILTIN2 (iwmmxt_wmacuz, WMACUZ)
- IWMMXT_BUILTIN2 (iwmmxt_wmacsz, WMACSZ)
+ IWMMXT_BUILTIN2 (iwmmxt_wmacuz, WMACUZ)
+ IWMMXT_BUILTIN2 (iwmmxt_wmacsz, WMACSZ)
};
static const struct builtin_description bdesc_1arg[] =
@@ -20047,6 +20138,12 @@ static const struct builtin_description
IWMMXT_BUILTIN (iwmmxt_wunpckelsb, "wunpckelsb", WUNPCKELSB)
IWMMXT_BUILTIN (iwmmxt_wunpckelsh, "wunpckelsh", WUNPCKELSH)
IWMMXT_BUILTIN (iwmmxt_wunpckelsw, "wunpckelsw", WUNPCKELSW)
+ IWMMXT2_BUILTIN (iwmmxt_wabsv8qi3, "wabsb", WABSB)
+ IWMMXT2_BUILTIN (iwmmxt_wabsv4hi3, "wabsh", WABSH)
+ IWMMXT2_BUILTIN (iwmmxt_wabsv2si3, "wabsw", WABSW)
+ IWMMXT_BUILTIN (tbcstv8qi, "tbcstb", TBCSTB)
+ IWMMXT_BUILTIN (tbcstv4hi, "tbcsth", TBCSTH)
+ IWMMXT_BUILTIN (tbcstv2si, "tbcstw", TBCSTW)
};
/* Set up all the iWMMXt builtins. This is not called if
@@ -20062,9 +20159,6 @@ arm_init_iwmmxt_builtins (void)
tree V4HI_type_node = build_vector_type_for_mode (intHI_type_node, V4HImode);
tree V8QI_type_node = build_vector_type_for_mode (intQI_type_node, V8QImode);
- tree int_ftype_int
- = build_function_type_list (integer_type_node,
- integer_type_node, NULL_TREE);
tree v8qi_ftype_v8qi_v8qi_int
= build_function_type_list (V8QI_type_node,
V8QI_type_node, V8QI_type_node,
@@ -20126,6 +20220,9 @@ arm_init_iwmmxt_builtins (void)
tree v4hi_ftype_v2si_v2si
= build_function_type_list (V4HI_type_node,
V2SI_type_node, V2SI_type_node, NULL_TREE);
+ tree v8qi_ftype_v4hi_v8qi
+ = build_function_type_list (V8QI_type_node,
+ V4HI_type_node, V8QI_type_node, NULL_TREE);
tree v2si_ftype_v4hi_v4hi
= build_function_type_list (V2SI_type_node,
V4HI_type_node, V4HI_type_node, NULL_TREE);
@@ -20140,12 +20237,10 @@ arm_init_iwmmxt_builtins (void)
= build_function_type_list (V2SI_type_node,
V2SI_type_node, long_long_integer_type_node,
NULL_TREE);
- tree void_ftype_int_int
- = build_function_type_list (void_type_node,
- integer_type_node, integer_type_node,
- NULL_TREE);
tree di_ftype_void
= build_function_type_list (long_long_unsigned_type_node, NULL_TREE);
+ tree int_ftype_void
+ = build_function_type_list (integer_type_node, NULL_TREE);
tree di_ftype_v8qi
= build_function_type_list (long_long_integer_type_node,
V8QI_type_node, NULL_TREE);
@@ -20161,6 +20256,15 @@ arm_init_iwmmxt_builtins (void)
tree v4hi_ftype_v8qi
= build_function_type_list (V4HI_type_node,
V8QI_type_node, NULL_TREE);
+ tree v8qi_ftype_v8qi
+ = build_function_type_list (V8QI_type_node,
+ V8QI_type_node, NULL_TREE);
+ tree v4hi_ftype_v4hi
+ = build_function_type_list (V4HI_type_node,
+ V4HI_type_node, NULL_TREE);
+ tree v2si_ftype_v2si
+ = build_function_type_list (V2SI_type_node,
+ V2SI_type_node, NULL_TREE);
tree di_ftype_di_v4hi_v4hi
= build_function_type_list (long_long_unsigned_type_node,
@@ -20173,6 +20277,48 @@ arm_init_iwmmxt_builtins (void)
V4HI_type_node,V4HI_type_node,
NULL_TREE);
+ tree v2si_ftype_v2si_v4hi_v4hi
+ = build_function_type_list (V2SI_type_node,
+ V2SI_type_node, V4HI_type_node,
+ V4HI_type_node, NULL_TREE);
+
+ tree v2si_ftype_v2si_v8qi_v8qi
+ = build_function_type_list (V2SI_type_node,
+ V2SI_type_node, V8QI_type_node,
+ V8QI_type_node, NULL_TREE);
+
+ tree di_ftype_di_v2si_v2si
+ = build_function_type_list (long_long_unsigned_type_node,
+ long_long_unsigned_type_node,
+ V2SI_type_node, V2SI_type_node,
+ NULL_TREE);
+
+ tree di_ftype_di_di_int
+ = build_function_type_list (long_long_unsigned_type_node,
+ long_long_unsigned_type_node,
+ long_long_unsigned_type_node,
+ integer_type_node, NULL_TREE);
+
+ tree void_ftype_void
+ = build_function_type_list (void_type_node,
+ NULL_TREE);
+
+ tree void_ftype_int
+ = build_function_type_list (void_type_node,
+ integer_type_node, NULL_TREE);
+
+ tree v8qi_ftype_char
+ = build_function_type_list (V8QI_type_node,
+ signed_char_type_node, NULL_TREE);
+
+ tree v4hi_ftype_short
+ = build_function_type_list (V4HI_type_node,
+ short_integer_type_node, NULL_TREE);
+
+ tree v2si_ftype_int
+ = build_function_type_list (V2SI_type_node,
+ integer_type_node, NULL_TREE);
+
/* Normal vector binops. */
tree v8qi_ftype_v8qi_v8qi
= build_function_type_list (V8QI_type_node,
@@ -20230,9 +20376,19 @@ arm_init_iwmmxt_builtins (void)
def_mbuiltin (FL_IWMMXT, "__builtin_arm_" NAME, (TYPE), \
ARM_BUILTIN_ ## CODE)
+#define iwmmx2_mbuiltin(NAME, TYPE, CODE) \
+ def_mbuiltin (FL_IWMMXT2, "__builtin_arm_" NAME, (TYPE), \
+ ARM_BUILTIN_ ## CODE)
+
iwmmx_mbuiltin ("wzero", di_ftype_void, WZERO);
- iwmmx_mbuiltin ("setwcx", void_ftype_int_int, SETWCX);
- iwmmx_mbuiltin ("getwcx", int_ftype_int, GETWCX);
+ iwmmx_mbuiltin ("setwcgr0", void_ftype_int, SETWCGR0);
+ iwmmx_mbuiltin ("setwcgr1", void_ftype_int, SETWCGR1);
+ iwmmx_mbuiltin ("setwcgr2", void_ftype_int, SETWCGR2);
+ iwmmx_mbuiltin ("setwcgr3", void_ftype_int, SETWCGR3);
+ iwmmx_mbuiltin ("getwcgr0", int_ftype_void, GETWCGR0);
+ iwmmx_mbuiltin ("getwcgr1", int_ftype_void, GETWCGR1);
+ iwmmx_mbuiltin ("getwcgr2", int_ftype_void, GETWCGR2);
+ iwmmx_mbuiltin ("getwcgr3", int_ftype_void, GETWCGR3);
iwmmx_mbuiltin ("wsllh", v4hi_ftype_v4hi_di, WSLLH);
iwmmx_mbuiltin ("wsllw", v2si_ftype_v2si_di, WSLLW);
@@ -20264,8 +20420,14 @@ arm_init_iwmmxt_builtins (void)
iwmmx_mbuiltin ("wshufh", v4hi_ftype_v4hi_int, WSHUFH);
- iwmmx_mbuiltin ("wsadb", v2si_ftype_v8qi_v8qi, WSADB);
- iwmmx_mbuiltin ("wsadh", v2si_ftype_v4hi_v4hi, WSADH);
+ iwmmx_mbuiltin ("wsadb", v2si_ftype_v2si_v8qi_v8qi, WSADB);
+ iwmmx_mbuiltin ("wsadh", v2si_ftype_v2si_v4hi_v4hi, WSADH);
+ iwmmx_mbuiltin ("wmadds", v2si_ftype_v4hi_v4hi, WMADDS);
+ iwmmx2_mbuiltin ("wmaddsx", v2si_ftype_v4hi_v4hi, WMADDSX);
+ iwmmx2_mbuiltin ("wmaddsn", v2si_ftype_v4hi_v4hi, WMADDSN);
+ iwmmx_mbuiltin ("wmaddu", v2si_ftype_v4hi_v4hi, WMADDU);
+ iwmmx2_mbuiltin ("wmaddux", v2si_ftype_v4hi_v4hi, WMADDUX);
+ iwmmx2_mbuiltin ("wmaddun", v2si_ftype_v4hi_v4hi, WMADDUN);
iwmmx_mbuiltin ("wsadbz", v2si_ftype_v8qi_v8qi, WSADBZ);
iwmmx_mbuiltin ("wsadhz", v2si_ftype_v4hi_v4hi, WSADHZ);
@@ -20287,6 +20449,9 @@ arm_init_iwmmxt_builtins (void)
iwmmx_mbuiltin ("tmovmskh", int_ftype_v4hi, TMOVMSKH);
iwmmx_mbuiltin ("tmovmskw", int_ftype_v2si, TMOVMSKW);
+ iwmmx2_mbuiltin ("waddbhusm", v8qi_ftype_v4hi_v8qi, WADDBHUSM);
+ iwmmx2_mbuiltin ("waddbhusl", v8qi_ftype_v4hi_v8qi, WADDBHUSL);
+
iwmmx_mbuiltin ("wpackhss", v8qi_ftype_v4hi_v4hi, WPACKHSS);
iwmmx_mbuiltin ("wpackhus", v8qi_ftype_v4hi_v4hi, WPACKHUS);
iwmmx_mbuiltin ("wpackwus", v4hi_ftype_v2si_v2si, WPACKWUS);
@@ -20312,7 +20477,7 @@ arm_init_iwmmxt_builtins (void)
iwmmx_mbuiltin ("wmacu", di_ftype_di_v4hi_v4hi, WMACU);
iwmmx_mbuiltin ("wmacuz", di_ftype_v4hi_v4hi, WMACUZ);
- iwmmx_mbuiltin ("walign", v8qi_ftype_v8qi_v8qi_int, WALIGN);
+ iwmmx_mbuiltin ("walign", v8qi_ftype_v8qi_v8qi_int, WALIGNI);
iwmmx_mbuiltin ("tmia", di_ftype_di_int_int, TMIA);
iwmmx_mbuiltin ("tmiaph", di_ftype_di_int_int, TMIAPH);
iwmmx_mbuiltin ("tmiabb", di_ftype_di_int_int, TMIABB);
@@ -20320,7 +20485,48 @@ arm_init_iwmmxt_builtins (void)
iwmmx_mbuiltin ("tmiatb", di_ftype_di_int_int, TMIATB);
iwmmx_mbuiltin ("tmiatt", di_ftype_di_int_int, TMIATT);
+ iwmmx2_mbuiltin ("wabsb", v8qi_ftype_v8qi, WABSB);
+ iwmmx2_mbuiltin ("wabsh", v4hi_ftype_v4hi, WABSH);
+ iwmmx2_mbuiltin ("wabsw", v2si_ftype_v2si, WABSW);
+
+ iwmmx2_mbuiltin ("wqmiabb", v2si_ftype_v2si_v4hi_v4hi, WQMIABB);
+ iwmmx2_mbuiltin ("wqmiabt", v2si_ftype_v2si_v4hi_v4hi, WQMIABT);
+ iwmmx2_mbuiltin ("wqmiatb", v2si_ftype_v2si_v4hi_v4hi, WQMIATB);
+ iwmmx2_mbuiltin ("wqmiatt", v2si_ftype_v2si_v4hi_v4hi, WQMIATT);
+
+ iwmmx2_mbuiltin ("wqmiabbn", v2si_ftype_v2si_v4hi_v4hi, WQMIABBN);
+ iwmmx2_mbuiltin ("wqmiabtn", v2si_ftype_v2si_v4hi_v4hi, WQMIABTN);
+ iwmmx2_mbuiltin ("wqmiatbn", v2si_ftype_v2si_v4hi_v4hi, WQMIATBN);
+ iwmmx2_mbuiltin ("wqmiattn", v2si_ftype_v2si_v4hi_v4hi, WQMIATTN);
+
+ iwmmx2_mbuiltin ("wmiabb", di_ftype_di_v4hi_v4hi, WMIABB);
+ iwmmx2_mbuiltin ("wmiabt", di_ftype_di_v4hi_v4hi, WMIABT);
+ iwmmx2_mbuiltin ("wmiatb", di_ftype_di_v4hi_v4hi, WMIATB);
+ iwmmx2_mbuiltin ("wmiatt", di_ftype_di_v4hi_v4hi, WMIATT);
+
+ iwmmx2_mbuiltin ("wmiabbn", di_ftype_di_v4hi_v4hi, WMIABBN);
+ iwmmx2_mbuiltin ("wmiabtn", di_ftype_di_v4hi_v4hi, WMIABTN);
+ iwmmx2_mbuiltin ("wmiatbn", di_ftype_di_v4hi_v4hi, WMIATBN);
+ iwmmx2_mbuiltin ("wmiattn", di_ftype_di_v4hi_v4hi, WMIATTN);
+
+ iwmmx2_mbuiltin ("wmiawbb", di_ftype_di_v2si_v2si, WMIAWBB);
+ iwmmx2_mbuiltin ("wmiawbt", di_ftype_di_v2si_v2si, WMIAWBT);
+ iwmmx2_mbuiltin ("wmiawtb", di_ftype_di_v2si_v2si, WMIAWTB);
+ iwmmx2_mbuiltin ("wmiawtt", di_ftype_di_v2si_v2si, WMIAWTT);
+
+ iwmmx2_mbuiltin ("wmiawbbn", di_ftype_di_v2si_v2si, WMIAWBBN);
+ iwmmx2_mbuiltin ("wmiawbtn", di_ftype_di_v2si_v2si, WMIAWBTN);
+ iwmmx2_mbuiltin ("wmiawtbn", di_ftype_di_v2si_v2si, WMIAWTBN);
+ iwmmx2_mbuiltin ("wmiawttn", di_ftype_di_v2si_v2si, WMIAWTTN);
+
+ iwmmx2_mbuiltin ("wmerge", di_ftype_di_di_int, WMERGE);
+
+ iwmmx_mbuiltin ("tbcstb", v8qi_ftype_char, TBCSTB);
+ iwmmx_mbuiltin ("tbcsth", v4hi_ftype_short, TBCSTH);
+ iwmmx_mbuiltin ("tbcstw", v2si_ftype_int, TBCSTW);
+
#undef iwmmx_mbuiltin
+#undef iwmmx2_mbuiltin
}
static void
@@ -20926,6 +21132,10 @@ arm_expand_builtin (tree exp,
enum machine_mode mode0;
enum machine_mode mode1;
enum machine_mode mode2;
+ int opint;
+ int selector;
+ int mask;
+ int imm;
if (fcode >= ARM_BUILTIN_NEON_BASE)
return arm_expand_neon_builtin (fcode, exp, target);
@@ -20960,6 +21170,24 @@ arm_expand_builtin (tree exp,
error ("selector must be an immediate");
return gen_reg_rtx (tmode);
}
+
+ opint = INTVAL (op1);
+ if (fcode == ARM_BUILTIN_TEXTRMSB || fcode == ARM_BUILTIN_TEXTRMUB)
+ {
+ if (opint > 7 || opint < 0)
+ error ("the range of selector should be in 0 to 7");
+ }
+ else if (fcode == ARM_BUILTIN_TEXTRMSH || fcode == ARM_BUILTIN_TEXTRMUH)
+ {
+ if (opint > 3 || opint < 0)
+ error ("the range of selector should be in 0 to 3");
+ }
+ else /* ARM_BUILTIN_TEXTRMSW || ARM_BUILTIN_TEXTRMUW. */
+ {
+ if (opint > 1 || opint < 0)
+ error ("the range of selector should be in 0 to 1");
+ }
+
if (target == 0
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
@@ -20970,11 +21198,61 @@ arm_expand_builtin (tree exp,
emit_insn (pat);
return target;
+ case ARM_BUILTIN_WALIGNI:
+ /* If op2 is immediate, call walighi, else call walighr. */
+ arg0 = CALL_EXPR_ARG (exp, 0);
+ arg1 = CALL_EXPR_ARG (exp, 1);
+ arg2 = CALL_EXPR_ARG (exp, 2);
+ op0 = expand_normal (arg0);
+ op1 = expand_normal (arg1);
+ op2 = expand_normal (arg2);
+ if (GET_CODE (op2) == CONST_INT)
+ {
+ icode = CODE_FOR_iwmmxt_waligni;
+ tmode = insn_data[icode].operand[0].mode;
+ mode0 = insn_data[icode].operand[1].mode;
+ mode1 = insn_data[icode].operand[2].mode;
+ mode2 = insn_data[icode].operand[3].mode;
+ if (!(*insn_data[icode].operand[1].predicate) (op0, mode0))
+ op0 = copy_to_mode_reg (mode0, op0);
+ if (!(*insn_data[icode].operand[2].predicate) (op1, mode1))
+ op1 = copy_to_mode_reg (mode1, op1);
+ gcc_assert ((*insn_data[icode].operand[3].predicate) (op2, mode2));
+ selector = INTVAL (op2);
+ if (selector > 7 || selector < 0)
+ error ("the range of selector should be in 0 to 7");
+ }
+ else
+ {
+ icode = CODE_FOR_iwmmxt_walignr;
+ tmode = insn_data[icode].operand[0].mode;
+ mode0 = insn_data[icode].operand[1].mode;
+ mode1 = insn_data[icode].operand[2].mode;
+ mode2 = insn_data[icode].operand[3].mode;
+ if (!(*insn_data[icode].operand[1].predicate) (op0, mode0))
+ op0 = copy_to_mode_reg (mode0, op0);
+ if (!(*insn_data[icode].operand[2].predicate) (op1, mode1))
+ op1 = copy_to_mode_reg (mode1, op1);
+ if (!(*insn_data[icode].operand[3].predicate) (op2, mode2))
+ op2 = copy_to_mode_reg (mode2, op2);
+ }
+ if (target == 0
+ || GET_MODE (target) != tmode
+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+ pat = GEN_FCN (icode) (target, op0, op1, op2);
+ if (!pat)
+ return 0;
+ emit_insn (pat);
+ return target;
+
case ARM_BUILTIN_TINSRB:
case ARM_BUILTIN_TINSRH:
case ARM_BUILTIN_TINSRW:
+ case ARM_BUILTIN_WMERGE:
icode = (fcode == ARM_BUILTIN_TINSRB ? CODE_FOR_iwmmxt_tinsrb
: fcode == ARM_BUILTIN_TINSRH ? CODE_FOR_iwmmxt_tinsrh
+ : fcode == ARM_BUILTIN_WMERGE ? CODE_FOR_iwmmxt_wmerge
: CODE_FOR_iwmmxt_tinsrw);
arg0 = CALL_EXPR_ARG (exp, 0);
arg1 = CALL_EXPR_ARG (exp, 1);
@@ -20993,10 +21271,30 @@ arm_expand_builtin (tree exp,
op1 = copy_to_mode_reg (mode1, op1);
if (! (*insn_data[icode].operand[3].predicate) (op2, mode2))
{
- /* @@@ better error message */
error ("selector must be an immediate");
return const0_rtx;
}
+ if (icode == CODE_FOR_iwmmxt_wmerge)
+ {
+ selector = INTVAL (op2);
+ if (selector > 7 || selector < 0)
+ error ("the range of selector should be in 0 to 7");
+ }
+ if ((icode == CODE_FOR_iwmmxt_tinsrb)
+ || (icode == CODE_FOR_iwmmxt_tinsrh)
+ || (icode == CODE_FOR_iwmmxt_tinsrw))
+ {
+ mask = 0x01;
+ selector= INTVAL (op2);
+ if (icode == CODE_FOR_iwmmxt_tinsrb && (selector < 0 || selector > 7))
+ error ("the range of selector should be in 0 to 7");
+ else if (icode == CODE_FOR_iwmmxt_tinsrh && (selector < 0 ||selector > 3))
+ error ("the range of selector should be in 0 to 3");
+ else if (icode == CODE_FOR_iwmmxt_tinsrw && (selector < 0 ||selector > 1))
+ error ("the range of selector should be in 0 to 1");
+ mask <<= selector;
+ op2 = gen_rtx_CONST_INT (SImode, mask);
+ }
if (target == 0
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
@@ -21007,19 +21305,42 @@ arm_expand_builtin (tree exp,
emit_insn (pat);
return target;
- case ARM_BUILTIN_SETWCX:
+ case ARM_BUILTIN_SETWCGR0:
+ case ARM_BUILTIN_SETWCGR1:
+ case ARM_BUILTIN_SETWCGR2:
+ case ARM_BUILTIN_SETWCGR3:
+ icode = (fcode == ARM_BUILTIN_SETWCGR0 ? CODE_FOR_iwmmxt_setwcgr0
+ : fcode == ARM_BUILTIN_SETWCGR1 ? CODE_FOR_iwmmxt_setwcgr1
+ : fcode == ARM_BUILTIN_SETWCGR2 ? CODE_FOR_iwmmxt_setwcgr2
+ : CODE_FOR_iwmmxt_setwcgr3);
arg0 = CALL_EXPR_ARG (exp, 0);
- arg1 = CALL_EXPR_ARG (exp, 1);
- op0 = force_reg (SImode, expand_normal (arg0));
- op1 = expand_normal (arg1);
- emit_insn (gen_iwmmxt_tmcr (op1, op0));
+ op0 = expand_normal (arg0);
+ mode0 = insn_data[icode].operand[0].mode;
+ if (!(*insn_data[icode].operand[0].predicate) (op0, mode0))
+ op0 = copy_to_mode_reg (mode0, op0);
+ pat = GEN_FCN (icode) (op0);
+ if (!pat)
+ return 0;
+ emit_insn (pat);
return 0;
- case ARM_BUILTIN_GETWCX:
- arg0 = CALL_EXPR_ARG (exp, 0);
- op0 = expand_normal (arg0);
- target = gen_reg_rtx (SImode);
- emit_insn (gen_iwmmxt_tmrc (target, op0));
+ case ARM_BUILTIN_GETWCGR0:
+ case ARM_BUILTIN_GETWCGR1:
+ case ARM_BUILTIN_GETWCGR2:
+ case ARM_BUILTIN_GETWCGR3:
+ icode = (fcode == ARM_BUILTIN_GETWCGR0 ? CODE_FOR_iwmmxt_getwcgr0
+ : fcode == ARM_BUILTIN_GETWCGR1 ? CODE_FOR_iwmmxt_getwcgr1
+ : fcode == ARM_BUILTIN_GETWCGR2 ? CODE_FOR_iwmmxt_getwcgr2
+ : CODE_FOR_iwmmxt_getwcgr3);
+ tmode = insn_data[icode].operand[0].mode;
+ if (target == 0
+ || GET_MODE (target) != tmode
+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+ pat = GEN_FCN (icode) (target);
+ if (!pat)
+ return 0;
+ emit_insn (pat);
return target;
case ARM_BUILTIN_WSHUFH:
@@ -21036,10 +21357,12 @@ arm_expand_builtin (tree exp,
op0 = copy_to_mode_reg (mode1, op0);
if (! (*insn_data[icode].operand[2].predicate) (op1, mode2))
{
- /* @@@ better error message */
error ("mask must be an immediate");
return const0_rtx;
}
+ selector = INTVAL (op1);
+ if (selector < 0 || selector > 255)
+ error ("the range of mask should be in 0 to 255");
if (target == 0
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
@@ -21050,10 +21373,18 @@ arm_expand_builtin (tree exp,
emit_insn (pat);
return target;
- case ARM_BUILTIN_WSADB:
- return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadb, exp, target);
- case ARM_BUILTIN_WSADH:
- return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadh, exp, target);
+ case ARM_BUILTIN_WMADDS:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmadds, exp, target);
+ case ARM_BUILTIN_WMADDSX:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddsx, exp, target);
+ case ARM_BUILTIN_WMADDSN:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddsn, exp, target);
+ case ARM_BUILTIN_WMADDU:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddu, exp, target);
+ case ARM_BUILTIN_WMADDUX:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddux, exp, target);
+ case ARM_BUILTIN_WMADDUN:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddun, exp, target);
case ARM_BUILTIN_WSADBZ:
return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadbz, exp, target);
case ARM_BUILTIN_WSADHZ:
@@ -21062,13 +21393,38 @@ arm_expand_builtin (tree exp,
/* Several three-argument builtins. */
case ARM_BUILTIN_WMACS:
case ARM_BUILTIN_WMACU:
- case ARM_BUILTIN_WALIGN:
case ARM_BUILTIN_TMIA:
case ARM_BUILTIN_TMIAPH:
case ARM_BUILTIN_TMIATT:
case ARM_BUILTIN_TMIATB:
case ARM_BUILTIN_TMIABT:
case ARM_BUILTIN_TMIABB:
+ case ARM_BUILTIN_WQMIABB:
+ case ARM_BUILTIN_WQMIABT:
+ case ARM_BUILTIN_WQMIATB:
+ case ARM_BUILTIN_WQMIATT:
+ case ARM_BUILTIN_WQMIABBN:
+ case ARM_BUILTIN_WQMIABTN:
+ case ARM_BUILTIN_WQMIATBN:
+ case ARM_BUILTIN_WQMIATTN:
+ case ARM_BUILTIN_WMIABB:
+ case ARM_BUILTIN_WMIABT:
+ case ARM_BUILTIN_WMIATB:
+ case ARM_BUILTIN_WMIATT:
+ case ARM_BUILTIN_WMIABBN:
+ case ARM_BUILTIN_WMIABTN:
+ case ARM_BUILTIN_WMIATBN:
+ case ARM_BUILTIN_WMIATTN:
+ case ARM_BUILTIN_WMIAWBB:
+ case ARM_BUILTIN_WMIAWBT:
+ case ARM_BUILTIN_WMIAWTB:
+ case ARM_BUILTIN_WMIAWTT:
+ case ARM_BUILTIN_WMIAWBBN:
+ case ARM_BUILTIN_WMIAWBTN:
+ case ARM_BUILTIN_WMIAWTBN:
+ case ARM_BUILTIN_WMIAWTTN:
+ case ARM_BUILTIN_WSADB:
+ case ARM_BUILTIN_WSADH:
icode = (fcode == ARM_BUILTIN_WMACS ? CODE_FOR_iwmmxt_wmacs
: fcode == ARM_BUILTIN_WMACU ? CODE_FOR_iwmmxt_wmacu
: fcode == ARM_BUILTIN_TMIA ? CODE_FOR_iwmmxt_tmia
@@ -21077,7 +21433,32 @@ arm_expand_builtin (tree exp,
: fcode == ARM_BUILTIN_TMIABT ? CODE_FOR_iwmmxt_tmiabt
: fcode == ARM_BUILTIN_TMIATB ? CODE_FOR_iwmmxt_tmiatb
: fcode == ARM_BUILTIN_TMIATT ? CODE_FOR_iwmmxt_tmiatt
- : CODE_FOR_iwmmxt_walign);
+ : fcode == ARM_BUILTIN_WQMIABB ? CODE_FOR_iwmmxt_wqmiabb
+ : fcode == ARM_BUILTIN_WQMIABT ? CODE_FOR_iwmmxt_wqmiabt
+ : fcode == ARM_BUILTIN_WQMIATB ? CODE_FOR_iwmmxt_wqmiatb
+ : fcode == ARM_BUILTIN_WQMIATT ? CODE_FOR_iwmmxt_wqmiatt
+ : fcode == ARM_BUILTIN_WQMIABBN ? CODE_FOR_iwmmxt_wqmiabbn
+ : fcode == ARM_BUILTIN_WQMIABTN ? CODE_FOR_iwmmxt_wqmiabtn
+ : fcode == ARM_BUILTIN_WQMIATBN ? CODE_FOR_iwmmxt_wqmiatbn
+ : fcode == ARM_BUILTIN_WQMIATTN ? CODE_FOR_iwmmxt_wqmiattn
+ : fcode == ARM_BUILTIN_WMIABB ? CODE_FOR_iwmmxt_wmiabb
+ : fcode == ARM_BUILTIN_WMIABT ? CODE_FOR_iwmmxt_wmiabt
+ : fcode == ARM_BUILTIN_WMIATB ? CODE_FOR_iwmmxt_wmiatb
+ : fcode == ARM_BUILTIN_WMIATT ? CODE_FOR_iwmmxt_wmiatt
+ : fcode == ARM_BUILTIN_WMIABBN ? CODE_FOR_iwmmxt_wmiabbn
+ : fcode == ARM_BUILTIN_WMIABTN ? CODE_FOR_iwmmxt_wmiabtn
+ : fcode == ARM_BUILTIN_WMIATBN ? CODE_FOR_iwmmxt_wmiatbn
+ : fcode == ARM_BUILTIN_WMIATTN ? CODE_FOR_iwmmxt_wmiattn
+ : fcode == ARM_BUILTIN_WMIAWBB ? CODE_FOR_iwmmxt_wmiawbb
+ : fcode == ARM_BUILTIN_WMIAWBT ? CODE_FOR_iwmmxt_wmiawbt
+ : fcode == ARM_BUILTIN_WMIAWTB ? CODE_FOR_iwmmxt_wmiawtb
+ : fcode == ARM_BUILTIN_WMIAWTT ? CODE_FOR_iwmmxt_wmiawtt
+ : fcode == ARM_BUILTIN_WMIAWBBN ? CODE_FOR_iwmmxt_wmiawbbn
+ : fcode == ARM_BUILTIN_WMIAWBTN ? CODE_FOR_iwmmxt_wmiawbtn
+ : fcode == ARM_BUILTIN_WMIAWTBN ? CODE_FOR_iwmmxt_wmiawtbn
+ : fcode == ARM_BUILTIN_WMIAWTTN ? CODE_FOR_iwmmxt_wmiawttn
+ : fcode == ARM_BUILTIN_WSADB ? CODE_FOR_iwmmxt_wsadb
+ : CODE_FOR_iwmmxt_wsadh);
arg0 = CALL_EXPR_ARG (exp, 0);
arg1 = CALL_EXPR_ARG (exp, 1);
arg2 = CALL_EXPR_ARG (exp, 2);
@@ -21110,6 +21491,123 @@ arm_expand_builtin (tree exp,
emit_insn (gen_iwmmxt_clrdi (target));
return target;
+ case ARM_BUILTIN_WSRLHI:
+ case ARM_BUILTIN_WSRLWI:
+ case ARM_BUILTIN_WSRLDI:
+ case ARM_BUILTIN_WSLLHI:
+ case ARM_BUILTIN_WSLLWI:
+ case ARM_BUILTIN_WSLLDI:
+ case ARM_BUILTIN_WSRAHI:
+ case ARM_BUILTIN_WSRAWI:
+ case ARM_BUILTIN_WSRADI:
+ case ARM_BUILTIN_WRORHI:
+ case ARM_BUILTIN_WRORWI:
+ case ARM_BUILTIN_WRORDI:
+ case ARM_BUILTIN_WSRLH:
+ case ARM_BUILTIN_WSRLW:
+ case ARM_BUILTIN_WSRLD:
+ case ARM_BUILTIN_WSLLH:
+ case ARM_BUILTIN_WSLLW:
+ case ARM_BUILTIN_WSLLD:
+ case ARM_BUILTIN_WSRAH:
+ case ARM_BUILTIN_WSRAW:
+ case ARM_BUILTIN_WSRAD:
+ case ARM_BUILTIN_WRORH:
+ case ARM_BUILTIN_WRORW:
+ case ARM_BUILTIN_WRORD:
+ icode = (fcode == ARM_BUILTIN_WSRLHI ? CODE_FOR_lshrv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRLWI ? CODE_FOR_lshrv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRLDI ? CODE_FOR_lshrdi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLHI ? CODE_FOR_ashlv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLWI ? CODE_FOR_ashlv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLDI ? CODE_FOR_ashldi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRAHI ? CODE_FOR_ashrv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRAWI ? CODE_FOR_ashrv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRADI ? CODE_FOR_ashrdi3_iwmmxt
+ : fcode == ARM_BUILTIN_WRORHI ? CODE_FOR_rorv4hi3
+ : fcode == ARM_BUILTIN_WRORWI ? CODE_FOR_rorv2si3
+ : fcode == ARM_BUILTIN_WRORDI ? CODE_FOR_rordi3
+ : fcode == ARM_BUILTIN_WSRLH ? CODE_FOR_lshrv4hi3_di
+ : fcode == ARM_BUILTIN_WSRLW ? CODE_FOR_lshrv2si3_di
+ : fcode == ARM_BUILTIN_WSRLD ? CODE_FOR_lshrdi3_di
+ : fcode == ARM_BUILTIN_WSLLH ? CODE_FOR_ashlv4hi3_di
+ : fcode == ARM_BUILTIN_WSLLW ? CODE_FOR_ashlv2si3_di
+ : fcode == ARM_BUILTIN_WSLLD ? CODE_FOR_ashldi3_di
+ : fcode == ARM_BUILTIN_WSRAH ? CODE_FOR_ashrv4hi3_di
+ : fcode == ARM_BUILTIN_WSRAW ? CODE_FOR_ashrv2si3_di
+ : fcode == ARM_BUILTIN_WSRAD ? CODE_FOR_ashrdi3_di
+ : fcode == ARM_BUILTIN_WRORH ? CODE_FOR_rorv4hi3_di
+ : fcode == ARM_BUILTIN_WRORW ? CODE_FOR_rorv2si3_di
+ : fcode == ARM_BUILTIN_WRORD ? CODE_FOR_rordi3_di
+ : CODE_FOR_nothing);
+ arg1 = CALL_EXPR_ARG (exp, 1);
+ op1 = expand_normal (arg1);
+ if (GET_MODE (op1) == VOIDmode)
+ {
+ imm = INTVAL (op1);
+ if ((fcode == ARM_BUILTIN_WRORHI || fcode == ARM_BUILTIN_WRORWI
+ || fcode == ARM_BUILTIN_WRORH || fcode == ARM_BUILTIN_WRORW)
+ && (imm < 0 || imm > 32))
+ {
+ if (fcode == ARM_BUILTIN_WRORHI)
+ error ("the range of count should be in 0 to 32. please check the intrinsic _mm_rori_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WRORWI)
+ error ("the range of count should be in 0 to 32. please check the intrinsic _mm_rori_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WRORH)
+ error ("the range of count should be in 0 to 32. please check the intrinsic _mm_ror_pi16 in code.");
+ else
+ error ("the range of count should be in 0 to 32. please check the intrinsic _mm_ror_pi32 in code.");
+ }
+ else if ((fcode == ARM_BUILTIN_WRORDI || fcode == ARM_BUILTIN_WRORD)
+ && (imm < 0 || imm > 64))
+ {
+ if (fcode == ARM_BUILTIN_WRORDI)
+ error ("the range of count should be in 0 to 64. please check the intrinsic _mm_rori_si64 in code.");
+ else
+ error ("the range of count should be in 0 to 64. please check the intrinsic _mm_ror_si64 in code.");
+ }
+ else if (imm < 0)
+ {
+ if (fcode == ARM_BUILTIN_WSRLHI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srli_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLWI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srli_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLDI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srli_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLHI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_slli_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLWI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_slli_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLDI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_slli_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSRAHI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srai_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSRAWI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srai_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSRADI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srai_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLH)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srl_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLW)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srl_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLD)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srl_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLH)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sll_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLW)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sll_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLD)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sll_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSRAH)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sra_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSRAW)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sra_pi32 in code.");
+ else
+ error ("the count should be no less than 0. please check the intrinsic _mm_sra_si64 in code.");
+ }
+ }
+ return arm_expand_binop_builtin (icode, exp, target);
+
case ARM_BUILTIN_THREAD_POINTER:
return arm_load_tp (target);
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
2011-11-18 23:47 ` Ramana Radhakrishnan
2011-11-24 7:09 ` Xinyu Qi
@ 2011-12-22 6:55 ` Xinyu Qi
2011-12-29 6:39 ` Xinyu Qi
` (2 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Xinyu Qi @ 2011-12-22 6:55 UTC (permalink / raw)
To: Richard Earnshaw; +Cc: gcc-patches, Ramana Radhakrishnan
[-- Attachment #1: Type: text/plain, Size: 969 bytes --]
At 2011-11-24 09:27:04,"Xinyu Qi" <xyqi@marvell.com> wrote:
> At 2011-11-19 07:08:22,"Ramana Radhakrishnan"
> <ramana.radhakrishnan@linaro.org> wrote:
> > On 20 October 2011 08:39, Xinyu Qi <xyqi@marvell.com> wrote:
> > > Ping
> > >
> > > http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html
> > >
> > > * config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
> > > (builtin_description bdesc_2arg): Revise built in declaration.
> > > (builtin_description bdesc_1arg): Likewise.
> > > (arm_init_iwmmxt_builtins): Revise built in initialization.
> > > (arm_expand_builtin): Revise built in expansion.
> > >
> >
> > This currently doesn't apply - can you take a look ?
>
> Hi Ramana,
>
> I resolve the patch conflict with the newest trunk gcc. The resolved diff is
> attached.
>
> Thanks,
> Xinyu
Update the built in expand. Remove some redundant code.
New diff is attached.
Thanks,
Xinyu
[-- Attachment #2: 3_arm_c.diff --]
[-- Type: application/octet-stream, Size: 34016 bytes --]
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c (revision 182518)
+++ gcc/config/arm/arm.c (working copy)
@@ -19230,8 +19230,15 @@ static neon_builtin_datum neon_builtin_d
FIXME? */
enum arm_builtins
{
- ARM_BUILTIN_GETWCX,
- ARM_BUILTIN_SETWCX,
+ ARM_BUILTIN_GETWCGR0,
+ ARM_BUILTIN_GETWCGR1,
+ ARM_BUILTIN_GETWCGR2,
+ ARM_BUILTIN_GETWCGR3,
+
+ ARM_BUILTIN_SETWCGR0,
+ ARM_BUILTIN_SETWCGR1,
+ ARM_BUILTIN_SETWCGR2,
+ ARM_BUILTIN_SETWCGR3,
ARM_BUILTIN_WZERO,
@@ -19254,7 +19261,11 @@ enum arm_builtins
ARM_BUILTIN_WSADH,
ARM_BUILTIN_WSADHZ,
- ARM_BUILTIN_WALIGN,
+ ARM_BUILTIN_WALIGNI,
+ ARM_BUILTIN_WALIGNR0,
+ ARM_BUILTIN_WALIGNR1,
+ ARM_BUILTIN_WALIGNR2,
+ ARM_BUILTIN_WALIGNR3,
ARM_BUILTIN_TMIA,
ARM_BUILTIN_TMIAPH,
@@ -19390,6 +19401,81 @@ enum arm_builtins
ARM_BUILTIN_WUNPCKELUH,
ARM_BUILTIN_WUNPCKELUW,
+ ARM_BUILTIN_WABSB,
+ ARM_BUILTIN_WABSH,
+ ARM_BUILTIN_WABSW,
+
+ ARM_BUILTIN_WADDSUBHX,
+ ARM_BUILTIN_WSUBADDHX,
+
+ ARM_BUILTIN_WABSDIFFB,
+ ARM_BUILTIN_WABSDIFFH,
+ ARM_BUILTIN_WABSDIFFW,
+
+ ARM_BUILTIN_WADDCH,
+ ARM_BUILTIN_WADDCW,
+
+ ARM_BUILTIN_WAVG4,
+ ARM_BUILTIN_WAVG4R,
+
+ ARM_BUILTIN_WMADDSX,
+ ARM_BUILTIN_WMADDUX,
+
+ ARM_BUILTIN_WMADDSN,
+ ARM_BUILTIN_WMADDUN,
+
+ ARM_BUILTIN_WMULWSM,
+ ARM_BUILTIN_WMULWUM,
+
+ ARM_BUILTIN_WMULWSMR,
+ ARM_BUILTIN_WMULWUMR,
+
+ ARM_BUILTIN_WMULWL,
+
+ ARM_BUILTIN_WMULSMR,
+ ARM_BUILTIN_WMULUMR,
+
+ ARM_BUILTIN_WQMULM,
+ ARM_BUILTIN_WQMULMR,
+
+ ARM_BUILTIN_WQMULWM,
+ ARM_BUILTIN_WQMULWMR,
+
+ ARM_BUILTIN_WADDBHUSM,
+ ARM_BUILTIN_WADDBHUSL,
+
+ ARM_BUILTIN_WQMIABB,
+ ARM_BUILTIN_WQMIABT,
+ ARM_BUILTIN_WQMIATB,
+ ARM_BUILTIN_WQMIATT,
+
+ ARM_BUILTIN_WQMIABBN,
+ ARM_BUILTIN_WQMIABTN,
+ ARM_BUILTIN_WQMIATBN,
+ ARM_BUILTIN_WQMIATTN,
+
+ ARM_BUILTIN_WMIABB,
+ ARM_BUILTIN_WMIABT,
+ ARM_BUILTIN_WMIATB,
+ ARM_BUILTIN_WMIATT,
+
+ ARM_BUILTIN_WMIABBN,
+ ARM_BUILTIN_WMIABTN,
+ ARM_BUILTIN_WMIATBN,
+ ARM_BUILTIN_WMIATTN,
+
+ ARM_BUILTIN_WMIAWBB,
+ ARM_BUILTIN_WMIAWBT,
+ ARM_BUILTIN_WMIAWTB,
+ ARM_BUILTIN_WMIAWTT,
+
+ ARM_BUILTIN_WMIAWBBN,
+ ARM_BUILTIN_WMIAWBTN,
+ ARM_BUILTIN_WMIAWTBN,
+ ARM_BUILTIN_WMIAWTTN,
+
+ ARM_BUILTIN_WMERGE,
+
ARM_BUILTIN_THREAD_POINTER,
ARM_BUILTIN_NEON_BASE,
@@ -19978,44 +20064,54 @@ static const struct builtin_description
IWMMXT_BUILTIN (iwmmxt_wunpckihb, "wunpckihb", WUNPCKIHB)
IWMMXT_BUILTIN (iwmmxt_wunpckihh, "wunpckihh", WUNPCKIHH)
IWMMXT_BUILTIN (iwmmxt_wunpckihw, "wunpckihw", WUNPCKIHW)
- IWMMXT_BUILTIN (iwmmxt_wmadds, "wmadds", WMADDS)
- IWMMXT_BUILTIN (iwmmxt_wmaddu, "wmaddu", WMADDU)
+ IWMMXT_BUILTIN (iwmmxt_waddsubhx, "waddsubhx", WADDSUBHX)
+ IWMMXT_BUILTIN (iwmmxt_wsubaddhx, "wsubaddhx", WSUBADDHX)
+ IWMMXT_BUILTIN (iwmmxt_wabsdiffb, "wabsdiffb", WABSDIFFB)
+ IWMMXT_BUILTIN (iwmmxt_wabsdiffh, "wabsdiffh", WABSDIFFH)
+ IWMMXT_BUILTIN (iwmmxt_wabsdiffw, "wabsdiffw", WABSDIFFW)
+ IWMMXT_BUILTIN (iwmmxt_avg4, "wavg4", WAVG4)
+ IWMMXT_BUILTIN (iwmmxt_avg4r, "wavg4r", WAVG4R)
+ IWMMXT_BUILTIN (iwmmxt_wmulwsm, "wmulwsm", WMULWSM)
+ IWMMXT_BUILTIN (iwmmxt_wmulwum, "wmulwum", WMULWUM)
+ IWMMXT_BUILTIN (iwmmxt_wmulwsmr, "wmulwsmr", WMULWSMR)
+ IWMMXT_BUILTIN (iwmmxt_wmulwumr, "wmulwumr", WMULWUMR)
+ IWMMXT_BUILTIN (iwmmxt_wmulwl, "wmulwl", WMULWL)
+ IWMMXT_BUILTIN (iwmmxt_wmulsmr, "wmulsmr", WMULSMR)
+ IWMMXT_BUILTIN (iwmmxt_wmulumr, "wmulumr", WMULUMR)
+ IWMMXT_BUILTIN (iwmmxt_wqmulm, "wqmulm", WQMULM)
+ IWMMXT_BUILTIN (iwmmxt_wqmulmr, "wqmulmr", WQMULMR)
+ IWMMXT_BUILTIN (iwmmxt_wqmulwm, "wqmulwm", WQMULWM)
+ IWMMXT_BUILTIN (iwmmxt_wqmulwmr, "wqmulwmr", WQMULWMR)
+ IWMMXT_BUILTIN (iwmmxt_walignr0, "walignr0", WALIGNR0)
+ IWMMXT_BUILTIN (iwmmxt_walignr1, "walignr1", WALIGNR1)
+ IWMMXT_BUILTIN (iwmmxt_walignr2, "walignr2", WALIGNR2)
+ IWMMXT_BUILTIN (iwmmxt_walignr3, "walignr3", WALIGNR3)
#define IWMMXT_BUILTIN2(code, builtin) \
{ FL_IWMMXT, CODE_FOR_##code, NULL, ARM_BUILTIN_##builtin, UNKNOWN, 0 },
+ IWMMXT_BUILTIN2 (iwmmxt_waddbhusm, WADDBHUSM)
+ IWMMXT_BUILTIN2 (iwmmxt_waddbhusl, WADDBHUSL)
IWMMXT_BUILTIN2 (iwmmxt_wpackhss, WPACKHSS)
IWMMXT_BUILTIN2 (iwmmxt_wpackwss, WPACKWSS)
IWMMXT_BUILTIN2 (iwmmxt_wpackdss, WPACKDSS)
IWMMXT_BUILTIN2 (iwmmxt_wpackhus, WPACKHUS)
IWMMXT_BUILTIN2 (iwmmxt_wpackwus, WPACKWUS)
IWMMXT_BUILTIN2 (iwmmxt_wpackdus, WPACKDUS)
- IWMMXT_BUILTIN2 (ashlv4hi3_di, WSLLH)
- IWMMXT_BUILTIN2 (ashlv4hi3_iwmmxt, WSLLHI)
- IWMMXT_BUILTIN2 (ashlv2si3_di, WSLLW)
- IWMMXT_BUILTIN2 (ashlv2si3_iwmmxt, WSLLWI)
- IWMMXT_BUILTIN2 (ashldi3_di, WSLLD)
- IWMMXT_BUILTIN2 (ashldi3_iwmmxt, WSLLDI)
- IWMMXT_BUILTIN2 (lshrv4hi3_di, WSRLH)
- IWMMXT_BUILTIN2 (lshrv4hi3_iwmmxt, WSRLHI)
- IWMMXT_BUILTIN2 (lshrv2si3_di, WSRLW)
- IWMMXT_BUILTIN2 (lshrv2si3_iwmmxt, WSRLWI)
- IWMMXT_BUILTIN2 (lshrdi3_di, WSRLD)
- IWMMXT_BUILTIN2 (lshrdi3_iwmmxt, WSRLDI)
- IWMMXT_BUILTIN2 (ashrv4hi3_di, WSRAH)
- IWMMXT_BUILTIN2 (ashrv4hi3_iwmmxt, WSRAHI)
- IWMMXT_BUILTIN2 (ashrv2si3_di, WSRAW)
- IWMMXT_BUILTIN2 (ashrv2si3_iwmmxt, WSRAWI)
- IWMMXT_BUILTIN2 (ashrdi3_di, WSRAD)
- IWMMXT_BUILTIN2 (ashrdi3_iwmmxt, WSRADI)
- IWMMXT_BUILTIN2 (rorv4hi3_di, WRORH)
- IWMMXT_BUILTIN2 (rorv4hi3, WRORHI)
- IWMMXT_BUILTIN2 (rorv2si3_di, WRORW)
- IWMMXT_BUILTIN2 (rorv2si3, WRORWI)
- IWMMXT_BUILTIN2 (rordi3_di, WRORD)
- IWMMXT_BUILTIN2 (rordi3, WRORDI)
- IWMMXT_BUILTIN2 (iwmmxt_wmacuz, WMACUZ)
- IWMMXT_BUILTIN2 (iwmmxt_wmacsz, WMACSZ)
+ IWMMXT_BUILTIN2 (ashlv4hi3_di, WSLLH)
+ IWMMXT_BUILTIN2 (ashlv2si3_di, WSLLW)
+ IWMMXT_BUILTIN2 (ashldi3_di, WSLLD)
+ IWMMXT_BUILTIN2 (lshrv4hi3_di, WSRLH)
+ IWMMXT_BUILTIN2 (lshrv2si3_di, WSRLW)
+ IWMMXT_BUILTIN2 (lshrdi3_di, WSRLD)
+ IWMMXT_BUILTIN2 (ashrv4hi3_di, WSRAH)
+ IWMMXT_BUILTIN2 (ashrv2si3_di, WSRAW)
+ IWMMXT_BUILTIN2 (ashrdi3_di, WSRAD)
+ IWMMXT_BUILTIN2 (rorv4hi3_di, WRORH)
+ IWMMXT_BUILTIN2 (rorv2si3_di, WRORW)
+ IWMMXT_BUILTIN2 (rordi3_di, WRORD)
+ IWMMXT_BUILTIN2 (iwmmxt_wmacuz, WMACUZ)
+ IWMMXT_BUILTIN2 (iwmmxt_wmacsz, WMACSZ)
};
static const struct builtin_description bdesc_1arg[] =
@@ -20038,6 +20134,12 @@ static const struct builtin_description
IWMMXT_BUILTIN (iwmmxt_wunpckelsb, "wunpckelsb", WUNPCKELSB)
IWMMXT_BUILTIN (iwmmxt_wunpckelsh, "wunpckelsh", WUNPCKELSH)
IWMMXT_BUILTIN (iwmmxt_wunpckelsw, "wunpckelsw", WUNPCKELSW)
+ IWMMXT_BUILTIN (iwmmxt_wabsv8qi3, "wabsb", WABSB)
+ IWMMXT_BUILTIN (iwmmxt_wabsv4hi3, "wabsh", WABSH)
+ IWMMXT_BUILTIN (iwmmxt_wabsv2si3, "wabsw", WABSW)
+ IWMMXT_BUILTIN (tbcstv8qi, "tbcstb", TBCSTB)
+ IWMMXT_BUILTIN (tbcstv4hi, "tbcsth", TBCSTH)
+ IWMMXT_BUILTIN (tbcstv2si, "tbcstw", TBCSTW)
};
/* Set up all the iWMMXt builtins. This is not called if
@@ -20053,9 +20155,6 @@ arm_init_iwmmxt_builtins (void)
tree V4HI_type_node = build_vector_type_for_mode (intHI_type_node, V4HImode);
tree V8QI_type_node = build_vector_type_for_mode (intQI_type_node, V8QImode);
- tree int_ftype_int
- = build_function_type_list (integer_type_node,
- integer_type_node, NULL_TREE);
tree v8qi_ftype_v8qi_v8qi_int
= build_function_type_list (V8QI_type_node,
V8QI_type_node, V8QI_type_node,
@@ -20117,6 +20216,9 @@ arm_init_iwmmxt_builtins (void)
tree v4hi_ftype_v2si_v2si
= build_function_type_list (V4HI_type_node,
V2SI_type_node, V2SI_type_node, NULL_TREE);
+ tree v8qi_ftype_v4hi_v8qi
+ = build_function_type_list (V8QI_type_node,
+ V4HI_type_node, V8QI_type_node, NULL_TREE);
tree v2si_ftype_v4hi_v4hi
= build_function_type_list (V2SI_type_node,
V4HI_type_node, V4HI_type_node, NULL_TREE);
@@ -20131,12 +20233,10 @@ arm_init_iwmmxt_builtins (void)
= build_function_type_list (V2SI_type_node,
V2SI_type_node, long_long_integer_type_node,
NULL_TREE);
- tree void_ftype_int_int
- = build_function_type_list (void_type_node,
- integer_type_node, integer_type_node,
- NULL_TREE);
tree di_ftype_void
= build_function_type_list (long_long_unsigned_type_node, NULL_TREE);
+ tree int_ftype_void
+ = build_function_type_list (integer_type_node, NULL_TREE);
tree di_ftype_v8qi
= build_function_type_list (long_long_integer_type_node,
V8QI_type_node, NULL_TREE);
@@ -20152,6 +20252,15 @@ arm_init_iwmmxt_builtins (void)
tree v4hi_ftype_v8qi
= build_function_type_list (V4HI_type_node,
V8QI_type_node, NULL_TREE);
+ tree v8qi_ftype_v8qi
+ = build_function_type_list (V8QI_type_node,
+ V8QI_type_node, NULL_TREE);
+ tree v4hi_ftype_v4hi
+ = build_function_type_list (V4HI_type_node,
+ V4HI_type_node, NULL_TREE);
+ tree v2si_ftype_v2si
+ = build_function_type_list (V2SI_type_node,
+ V2SI_type_node, NULL_TREE);
tree di_ftype_di_v4hi_v4hi
= build_function_type_list (long_long_unsigned_type_node,
@@ -20164,6 +20273,48 @@ arm_init_iwmmxt_builtins (void)
V4HI_type_node,V4HI_type_node,
NULL_TREE);
+ tree v2si_ftype_v2si_v4hi_v4hi
+ = build_function_type_list (V2SI_type_node,
+ V2SI_type_node, V4HI_type_node,
+ V4HI_type_node, NULL_TREE);
+
+ tree v2si_ftype_v2si_v8qi_v8qi
+ = build_function_type_list (V2SI_type_node,
+ V2SI_type_node, V8QI_type_node,
+ V8QI_type_node, NULL_TREE);
+
+ tree di_ftype_di_v2si_v2si
+ = build_function_type_list (long_long_unsigned_type_node,
+ long_long_unsigned_type_node,
+ V2SI_type_node, V2SI_type_node,
+ NULL_TREE);
+
+ tree di_ftype_di_di_int
+ = build_function_type_list (long_long_unsigned_type_node,
+ long_long_unsigned_type_node,
+ long_long_unsigned_type_node,
+ integer_type_node, NULL_TREE);
+
+ tree void_ftype_void
+ = build_function_type_list (void_type_node,
+ NULL_TREE);
+
+ tree void_ftype_int
+ = build_function_type_list (void_type_node,
+ integer_type_node, NULL_TREE);
+
+ tree v8qi_ftype_char
+ = build_function_type_list (V8QI_type_node,
+ signed_char_type_node, NULL_TREE);
+
+ tree v4hi_ftype_short
+ = build_function_type_list (V4HI_type_node,
+ short_integer_type_node, NULL_TREE);
+
+ tree v2si_ftype_int
+ = build_function_type_list (V2SI_type_node,
+ integer_type_node, NULL_TREE);
+
/* Normal vector binops. */
tree v8qi_ftype_v8qi_v8qi
= build_function_type_list (V8QI_type_node,
@@ -20222,8 +20373,14 @@ arm_init_iwmmxt_builtins (void)
ARM_BUILTIN_ ## CODE)
iwmmx_mbuiltin ("wzero", di_ftype_void, WZERO);
- iwmmx_mbuiltin ("setwcx", void_ftype_int_int, SETWCX);
- iwmmx_mbuiltin ("getwcx", int_ftype_int, GETWCX);
+ iwmmx_mbuiltin ("setwcgr0", void_ftype_int, SETWCGR0);
+ iwmmx_mbuiltin ("setwcgr1", void_ftype_int, SETWCGR1);
+ iwmmx_mbuiltin ("setwcgr2", void_ftype_int, SETWCGR2);
+ iwmmx_mbuiltin ("setwcgr3", void_ftype_int, SETWCGR3);
+ iwmmx_mbuiltin ("getwcgr0", int_ftype_void, GETWCGR0);
+ iwmmx_mbuiltin ("getwcgr1", int_ftype_void, GETWCGR1);
+ iwmmx_mbuiltin ("getwcgr2", int_ftype_void, GETWCGR2);
+ iwmmx_mbuiltin ("getwcgr3", int_ftype_void, GETWCGR3);
iwmmx_mbuiltin ("wsllh", v4hi_ftype_v4hi_di, WSLLH);
iwmmx_mbuiltin ("wsllw", v2si_ftype_v2si_di, WSLLW);
@@ -20255,8 +20412,14 @@ arm_init_iwmmxt_builtins (void)
iwmmx_mbuiltin ("wshufh", v4hi_ftype_v4hi_int, WSHUFH);
- iwmmx_mbuiltin ("wsadb", v2si_ftype_v8qi_v8qi, WSADB);
- iwmmx_mbuiltin ("wsadh", v2si_ftype_v4hi_v4hi, WSADH);
+ iwmmx_mbuiltin ("wsadb", v2si_ftype_v2si_v8qi_v8qi, WSADB);
+ iwmmx_mbuiltin ("wsadh", v2si_ftype_v2si_v4hi_v4hi, WSADH);
+ iwmmx_mbuiltin ("wmadds", v2si_ftype_v4hi_v4hi, WMADDS);
+ iwmmx_mbuiltin ("wmaddsx", v2si_ftype_v4hi_v4hi, WMADDSX);
+ iwmmx_mbuiltin ("wmaddsn", v2si_ftype_v4hi_v4hi, WMADDSN);
+ iwmmx_mbuiltin ("wmaddu", v2si_ftype_v4hi_v4hi, WMADDU);
+ iwmmx_mbuiltin ("wmaddux", v2si_ftype_v4hi_v4hi, WMADDUX);
+ iwmmx_mbuiltin ("wmaddun", v2si_ftype_v4hi_v4hi, WMADDUN);
iwmmx_mbuiltin ("wsadbz", v2si_ftype_v8qi_v8qi, WSADBZ);
iwmmx_mbuiltin ("wsadhz", v2si_ftype_v4hi_v4hi, WSADHZ);
@@ -20278,6 +20441,9 @@ arm_init_iwmmxt_builtins (void)
iwmmx_mbuiltin ("tmovmskh", int_ftype_v4hi, TMOVMSKH);
iwmmx_mbuiltin ("tmovmskw", int_ftype_v2si, TMOVMSKW);
+ iwmmx_mbuiltin ("waddbhusm", v8qi_ftype_v4hi_v8qi, WADDBHUSM);
+ iwmmx_mbuiltin ("waddbhusl", v8qi_ftype_v4hi_v8qi, WADDBHUSL);
+
iwmmx_mbuiltin ("wpackhss", v8qi_ftype_v4hi_v4hi, WPACKHSS);
iwmmx_mbuiltin ("wpackhus", v8qi_ftype_v4hi_v4hi, WPACKHUS);
iwmmx_mbuiltin ("wpackwus", v4hi_ftype_v2si_v2si, WPACKWUS);
@@ -20303,7 +20469,7 @@ arm_init_iwmmxt_builtins (void)
iwmmx_mbuiltin ("wmacu", di_ftype_di_v4hi_v4hi, WMACU);
iwmmx_mbuiltin ("wmacuz", di_ftype_v4hi_v4hi, WMACUZ);
- iwmmx_mbuiltin ("walign", v8qi_ftype_v8qi_v8qi_int, WALIGN);
+ iwmmx_mbuiltin ("walign", v8qi_ftype_v8qi_v8qi_int, WALIGNI);
iwmmx_mbuiltin ("tmia", di_ftype_di_int_int, TMIA);
iwmmx_mbuiltin ("tmiaph", di_ftype_di_int_int, TMIAPH);
iwmmx_mbuiltin ("tmiabb", di_ftype_di_int_int, TMIABB);
@@ -20311,6 +20477,46 @@ arm_init_iwmmxt_builtins (void)
iwmmx_mbuiltin ("tmiatb", di_ftype_di_int_int, TMIATB);
iwmmx_mbuiltin ("tmiatt", di_ftype_di_int_int, TMIATT);
+ iwmmx_mbuiltin ("wabsb", v8qi_ftype_v8qi, WABSB);
+ iwmmx_mbuiltin ("wabsh", v4hi_ftype_v4hi, WABSH);
+ iwmmx_mbuiltin ("wabsw", v2si_ftype_v2si, WABSW);
+
+ iwmmx_mbuiltin ("wqmiabb", v2si_ftype_v2si_v4hi_v4hi, WQMIABB);
+ iwmmx_mbuiltin ("wqmiabt", v2si_ftype_v2si_v4hi_v4hi, WQMIABT);
+ iwmmx_mbuiltin ("wqmiatb", v2si_ftype_v2si_v4hi_v4hi, WQMIATB);
+ iwmmx_mbuiltin ("wqmiatt", v2si_ftype_v2si_v4hi_v4hi, WQMIATT);
+
+ iwmmx_mbuiltin ("wqmiabbn", v2si_ftype_v2si_v4hi_v4hi, WQMIABBN);
+ iwmmx_mbuiltin ("wqmiabtn", v2si_ftype_v2si_v4hi_v4hi, WQMIABTN);
+ iwmmx_mbuiltin ("wqmiatbn", v2si_ftype_v2si_v4hi_v4hi, WQMIATBN);
+ iwmmx_mbuiltin ("wqmiattn", v2si_ftype_v2si_v4hi_v4hi, WQMIATTN);
+
+ iwmmx_mbuiltin ("wmiabb", di_ftype_di_v4hi_v4hi, WMIABB);
+ iwmmx_mbuiltin ("wmiabt", di_ftype_di_v4hi_v4hi, WMIABT);
+ iwmmx_mbuiltin ("wmiatb", di_ftype_di_v4hi_v4hi, WMIATB);
+ iwmmx_mbuiltin ("wmiatt", di_ftype_di_v4hi_v4hi, WMIATT);
+
+ iwmmx_mbuiltin ("wmiabbn", di_ftype_di_v4hi_v4hi, WMIABBN);
+ iwmmx_mbuiltin ("wmiabtn", di_ftype_di_v4hi_v4hi, WMIABTN);
+ iwmmx_mbuiltin ("wmiatbn", di_ftype_di_v4hi_v4hi, WMIATBN);
+ iwmmx_mbuiltin ("wmiattn", di_ftype_di_v4hi_v4hi, WMIATTN);
+
+ iwmmx_mbuiltin ("wmiawbb", di_ftype_di_v2si_v2si, WMIAWBB);
+ iwmmx_mbuiltin ("wmiawbt", di_ftype_di_v2si_v2si, WMIAWBT);
+ iwmmx_mbuiltin ("wmiawtb", di_ftype_di_v2si_v2si, WMIAWTB);
+ iwmmx_mbuiltin ("wmiawtt", di_ftype_di_v2si_v2si, WMIAWTT);
+
+ iwmmx_mbuiltin ("wmiawbbn", di_ftype_di_v2si_v2si, WMIAWBBN);
+ iwmmx_mbuiltin ("wmiawbtn", di_ftype_di_v2si_v2si, WMIAWBTN);
+ iwmmx_mbuiltin ("wmiawtbn", di_ftype_di_v2si_v2si, WMIAWTBN);
+ iwmmx_mbuiltin ("wmiawttn", di_ftype_di_v2si_v2si, WMIAWTTN);
+
+ iwmmx_mbuiltin ("wmerge", di_ftype_di_di_int, WMERGE);
+
+ iwmmx_mbuiltin ("tbcstb", v8qi_ftype_char, TBCSTB);
+ iwmmx_mbuiltin ("tbcsth", v4hi_ftype_short, TBCSTH);
+ iwmmx_mbuiltin ("tbcstw", v2si_ftype_int, TBCSTW);
+
#undef iwmmx_mbuiltin
}
@@ -20917,6 +21123,10 @@ arm_expand_builtin (tree exp,
enum machine_mode mode0;
enum machine_mode mode1;
enum machine_mode mode2;
+ int opint;
+ int selector;
+ int mask;
+ int imm;
if (fcode >= ARM_BUILTIN_NEON_BASE)
return arm_expand_neon_builtin (fcode, exp, target);
@@ -20951,6 +21161,24 @@ arm_expand_builtin (tree exp,
error ("selector must be an immediate");
return gen_reg_rtx (tmode);
}
+
+ opint = INTVAL (op1);
+ if (fcode == ARM_BUILTIN_TEXTRMSB || fcode == ARM_BUILTIN_TEXTRMUB)
+ {
+ if (opint > 7 || opint < 0)
+ error ("the range of selector should be in 0 to 7");
+ }
+ else if (fcode == ARM_BUILTIN_TEXTRMSH || fcode == ARM_BUILTIN_TEXTRMUH)
+ {
+ if (opint > 3 || opint < 0)
+ error ("the range of selector should be in 0 to 3");
+ }
+ else /* ARM_BUILTIN_TEXTRMSW || ARM_BUILTIN_TEXTRMUW. */
+ {
+ if (opint > 1 || opint < 0)
+ error ("the range of selector should be in 0 to 1");
+ }
+
if (target == 0
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
@@ -20961,11 +21189,61 @@ arm_expand_builtin (tree exp,
emit_insn (pat);
return target;
+ case ARM_BUILTIN_WALIGNI:
+ /* If op2 is immediate, call walighi, else call walighr. */
+ arg0 = CALL_EXPR_ARG (exp, 0);
+ arg1 = CALL_EXPR_ARG (exp, 1);
+ arg2 = CALL_EXPR_ARG (exp, 2);
+ op0 = expand_normal (arg0);
+ op1 = expand_normal (arg1);
+ op2 = expand_normal (arg2);
+ if (GET_CODE (op2) == CONST_INT)
+ {
+ icode = CODE_FOR_iwmmxt_waligni;
+ tmode = insn_data[icode].operand[0].mode;
+ mode0 = insn_data[icode].operand[1].mode;
+ mode1 = insn_data[icode].operand[2].mode;
+ mode2 = insn_data[icode].operand[3].mode;
+ if (!(*insn_data[icode].operand[1].predicate) (op0, mode0))
+ op0 = copy_to_mode_reg (mode0, op0);
+ if (!(*insn_data[icode].operand[2].predicate) (op1, mode1))
+ op1 = copy_to_mode_reg (mode1, op1);
+ gcc_assert ((*insn_data[icode].operand[3].predicate) (op2, mode2));
+ selector = INTVAL (op2);
+ if (selector > 7 || selector < 0)
+ error ("the range of selector should be in 0 to 7");
+ }
+ else
+ {
+ icode = CODE_FOR_iwmmxt_walignr;
+ tmode = insn_data[icode].operand[0].mode;
+ mode0 = insn_data[icode].operand[1].mode;
+ mode1 = insn_data[icode].operand[2].mode;
+ mode2 = insn_data[icode].operand[3].mode;
+ if (!(*insn_data[icode].operand[1].predicate) (op0, mode0))
+ op0 = copy_to_mode_reg (mode0, op0);
+ if (!(*insn_data[icode].operand[2].predicate) (op1, mode1))
+ op1 = copy_to_mode_reg (mode1, op1);
+ if (!(*insn_data[icode].operand[3].predicate) (op2, mode2))
+ op2 = copy_to_mode_reg (mode2, op2);
+ }
+ if (target == 0
+ || GET_MODE (target) != tmode
+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+ pat = GEN_FCN (icode) (target, op0, op1, op2);
+ if (!pat)
+ return 0;
+ emit_insn (pat);
+ return target;
+
case ARM_BUILTIN_TINSRB:
case ARM_BUILTIN_TINSRH:
case ARM_BUILTIN_TINSRW:
+ case ARM_BUILTIN_WMERGE:
icode = (fcode == ARM_BUILTIN_TINSRB ? CODE_FOR_iwmmxt_tinsrb
: fcode == ARM_BUILTIN_TINSRH ? CODE_FOR_iwmmxt_tinsrh
+ : fcode == ARM_BUILTIN_WMERGE ? CODE_FOR_iwmmxt_wmerge
: CODE_FOR_iwmmxt_tinsrw);
arg0 = CALL_EXPR_ARG (exp, 0);
arg1 = CALL_EXPR_ARG (exp, 1);
@@ -20984,10 +21262,30 @@ arm_expand_builtin (tree exp,
op1 = copy_to_mode_reg (mode1, op1);
if (! (*insn_data[icode].operand[3].predicate) (op2, mode2))
{
- /* @@@ better error message */
error ("selector must be an immediate");
return const0_rtx;
}
+ if (icode == CODE_FOR_iwmmxt_wmerge)
+ {
+ selector = INTVAL (op2);
+ if (selector > 7 || selector < 0)
+ error ("the range of selector should be in 0 to 7");
+ }
+ if ((icode == CODE_FOR_iwmmxt_tinsrb)
+ || (icode == CODE_FOR_iwmmxt_tinsrh)
+ || (icode == CODE_FOR_iwmmxt_tinsrw))
+ {
+ mask = 0x01;
+ selector= INTVAL (op2);
+ if (icode == CODE_FOR_iwmmxt_tinsrb && (selector < 0 || selector > 7))
+ error ("the range of selector should be in 0 to 7");
+ else if (icode == CODE_FOR_iwmmxt_tinsrh && (selector < 0 ||selector > 3))
+ error ("the range of selector should be in 0 to 3");
+ else if (icode == CODE_FOR_iwmmxt_tinsrw && (selector < 0 ||selector > 1))
+ error ("the range of selector should be in 0 to 1");
+ mask <<= selector;
+ op2 = gen_rtx_CONST_INT (SImode, mask);
+ }
if (target == 0
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
@@ -20998,19 +21296,42 @@ arm_expand_builtin (tree exp,
emit_insn (pat);
return target;
- case ARM_BUILTIN_SETWCX:
+ case ARM_BUILTIN_SETWCGR0:
+ case ARM_BUILTIN_SETWCGR1:
+ case ARM_BUILTIN_SETWCGR2:
+ case ARM_BUILTIN_SETWCGR3:
+ icode = (fcode == ARM_BUILTIN_SETWCGR0 ? CODE_FOR_iwmmxt_setwcgr0
+ : fcode == ARM_BUILTIN_SETWCGR1 ? CODE_FOR_iwmmxt_setwcgr1
+ : fcode == ARM_BUILTIN_SETWCGR2 ? CODE_FOR_iwmmxt_setwcgr2
+ : CODE_FOR_iwmmxt_setwcgr3);
arg0 = CALL_EXPR_ARG (exp, 0);
- arg1 = CALL_EXPR_ARG (exp, 1);
- op0 = force_reg (SImode, expand_normal (arg0));
- op1 = expand_normal (arg1);
- emit_insn (gen_iwmmxt_tmcr (op1, op0));
+ op0 = expand_normal (arg0);
+ mode0 = insn_data[icode].operand[0].mode;
+ if (!(*insn_data[icode].operand[0].predicate) (op0, mode0))
+ op0 = copy_to_mode_reg (mode0, op0);
+ pat = GEN_FCN (icode) (op0);
+ if (!pat)
+ return 0;
+ emit_insn (pat);
return 0;
- case ARM_BUILTIN_GETWCX:
- arg0 = CALL_EXPR_ARG (exp, 0);
- op0 = expand_normal (arg0);
- target = gen_reg_rtx (SImode);
- emit_insn (gen_iwmmxt_tmrc (target, op0));
+ case ARM_BUILTIN_GETWCGR0:
+ case ARM_BUILTIN_GETWCGR1:
+ case ARM_BUILTIN_GETWCGR2:
+ case ARM_BUILTIN_GETWCGR3:
+ icode = (fcode == ARM_BUILTIN_GETWCGR0 ? CODE_FOR_iwmmxt_getwcgr0
+ : fcode == ARM_BUILTIN_GETWCGR1 ? CODE_FOR_iwmmxt_getwcgr1
+ : fcode == ARM_BUILTIN_GETWCGR2 ? CODE_FOR_iwmmxt_getwcgr2
+ : CODE_FOR_iwmmxt_getwcgr3);
+ tmode = insn_data[icode].operand[0].mode;
+ if (target == 0
+ || GET_MODE (target) != tmode
+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+ pat = GEN_FCN (icode) (target);
+ if (!pat)
+ return 0;
+ emit_insn (pat);
return target;
case ARM_BUILTIN_WSHUFH:
@@ -21027,10 +21348,12 @@ arm_expand_builtin (tree exp,
op0 = copy_to_mode_reg (mode1, op0);
if (! (*insn_data[icode].operand[2].predicate) (op1, mode2))
{
- /* @@@ better error message */
error ("mask must be an immediate");
return const0_rtx;
}
+ selector = INTVAL (op1);
+ if (selector < 0 || selector > 255)
+ error ("the range of mask should be in 0 to 255");
if (target == 0
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
@@ -21041,10 +21364,18 @@ arm_expand_builtin (tree exp,
emit_insn (pat);
return target;
- case ARM_BUILTIN_WSADB:
- return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadb, exp, target);
- case ARM_BUILTIN_WSADH:
- return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadh, exp, target);
+ case ARM_BUILTIN_WMADDS:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmadds, exp, target);
+ case ARM_BUILTIN_WMADDSX:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddsx, exp, target);
+ case ARM_BUILTIN_WMADDSN:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddsn, exp, target);
+ case ARM_BUILTIN_WMADDU:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddu, exp, target);
+ case ARM_BUILTIN_WMADDUX:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddux, exp, target);
+ case ARM_BUILTIN_WMADDUN:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddun, exp, target);
case ARM_BUILTIN_WSADBZ:
return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadbz, exp, target);
case ARM_BUILTIN_WSADHZ:
@@ -21053,13 +21384,38 @@ arm_expand_builtin (tree exp,
/* Several three-argument builtins. */
case ARM_BUILTIN_WMACS:
case ARM_BUILTIN_WMACU:
- case ARM_BUILTIN_WALIGN:
case ARM_BUILTIN_TMIA:
case ARM_BUILTIN_TMIAPH:
case ARM_BUILTIN_TMIATT:
case ARM_BUILTIN_TMIATB:
case ARM_BUILTIN_TMIABT:
case ARM_BUILTIN_TMIABB:
+ case ARM_BUILTIN_WQMIABB:
+ case ARM_BUILTIN_WQMIABT:
+ case ARM_BUILTIN_WQMIATB:
+ case ARM_BUILTIN_WQMIATT:
+ case ARM_BUILTIN_WQMIABBN:
+ case ARM_BUILTIN_WQMIABTN:
+ case ARM_BUILTIN_WQMIATBN:
+ case ARM_BUILTIN_WQMIATTN:
+ case ARM_BUILTIN_WMIABB:
+ case ARM_BUILTIN_WMIABT:
+ case ARM_BUILTIN_WMIATB:
+ case ARM_BUILTIN_WMIATT:
+ case ARM_BUILTIN_WMIABBN:
+ case ARM_BUILTIN_WMIABTN:
+ case ARM_BUILTIN_WMIATBN:
+ case ARM_BUILTIN_WMIATTN:
+ case ARM_BUILTIN_WMIAWBB:
+ case ARM_BUILTIN_WMIAWBT:
+ case ARM_BUILTIN_WMIAWTB:
+ case ARM_BUILTIN_WMIAWTT:
+ case ARM_BUILTIN_WMIAWBBN:
+ case ARM_BUILTIN_WMIAWBTN:
+ case ARM_BUILTIN_WMIAWTBN:
+ case ARM_BUILTIN_WMIAWTTN:
+ case ARM_BUILTIN_WSADB:
+ case ARM_BUILTIN_WSADH:
icode = (fcode == ARM_BUILTIN_WMACS ? CODE_FOR_iwmmxt_wmacs
: fcode == ARM_BUILTIN_WMACU ? CODE_FOR_iwmmxt_wmacu
: fcode == ARM_BUILTIN_TMIA ? CODE_FOR_iwmmxt_tmia
@@ -21068,7 +21424,32 @@ arm_expand_builtin (tree exp,
: fcode == ARM_BUILTIN_TMIABT ? CODE_FOR_iwmmxt_tmiabt
: fcode == ARM_BUILTIN_TMIATB ? CODE_FOR_iwmmxt_tmiatb
: fcode == ARM_BUILTIN_TMIATT ? CODE_FOR_iwmmxt_tmiatt
- : CODE_FOR_iwmmxt_walign);
+ : fcode == ARM_BUILTIN_WQMIABB ? CODE_FOR_iwmmxt_wqmiabb
+ : fcode == ARM_BUILTIN_WQMIABT ? CODE_FOR_iwmmxt_wqmiabt
+ : fcode == ARM_BUILTIN_WQMIATB ? CODE_FOR_iwmmxt_wqmiatb
+ : fcode == ARM_BUILTIN_WQMIATT ? CODE_FOR_iwmmxt_wqmiatt
+ : fcode == ARM_BUILTIN_WQMIABBN ? CODE_FOR_iwmmxt_wqmiabbn
+ : fcode == ARM_BUILTIN_WQMIABTN ? CODE_FOR_iwmmxt_wqmiabtn
+ : fcode == ARM_BUILTIN_WQMIATBN ? CODE_FOR_iwmmxt_wqmiatbn
+ : fcode == ARM_BUILTIN_WQMIATTN ? CODE_FOR_iwmmxt_wqmiattn
+ : fcode == ARM_BUILTIN_WMIABB ? CODE_FOR_iwmmxt_wmiabb
+ : fcode == ARM_BUILTIN_WMIABT ? CODE_FOR_iwmmxt_wmiabt
+ : fcode == ARM_BUILTIN_WMIATB ? CODE_FOR_iwmmxt_wmiatb
+ : fcode == ARM_BUILTIN_WMIATT ? CODE_FOR_iwmmxt_wmiatt
+ : fcode == ARM_BUILTIN_WMIABBN ? CODE_FOR_iwmmxt_wmiabbn
+ : fcode == ARM_BUILTIN_WMIABTN ? CODE_FOR_iwmmxt_wmiabtn
+ : fcode == ARM_BUILTIN_WMIATBN ? CODE_FOR_iwmmxt_wmiatbn
+ : fcode == ARM_BUILTIN_WMIATTN ? CODE_FOR_iwmmxt_wmiattn
+ : fcode == ARM_BUILTIN_WMIAWBB ? CODE_FOR_iwmmxt_wmiawbb
+ : fcode == ARM_BUILTIN_WMIAWBT ? CODE_FOR_iwmmxt_wmiawbt
+ : fcode == ARM_BUILTIN_WMIAWTB ? CODE_FOR_iwmmxt_wmiawtb
+ : fcode == ARM_BUILTIN_WMIAWTT ? CODE_FOR_iwmmxt_wmiawtt
+ : fcode == ARM_BUILTIN_WMIAWBBN ? CODE_FOR_iwmmxt_wmiawbbn
+ : fcode == ARM_BUILTIN_WMIAWBTN ? CODE_FOR_iwmmxt_wmiawbtn
+ : fcode == ARM_BUILTIN_WMIAWTBN ? CODE_FOR_iwmmxt_wmiawtbn
+ : fcode == ARM_BUILTIN_WMIAWTTN ? CODE_FOR_iwmmxt_wmiawttn
+ : fcode == ARM_BUILTIN_WSADB ? CODE_FOR_iwmmxt_wsadb
+ : CODE_FOR_iwmmxt_wsadh);
arg0 = CALL_EXPR_ARG (exp, 0);
arg1 = CALL_EXPR_ARG (exp, 1);
arg2 = CALL_EXPR_ARG (exp, 2);
@@ -21101,6 +21482,123 @@ arm_expand_builtin (tree exp,
emit_insn (gen_iwmmxt_clrdi (target));
return target;
+ case ARM_BUILTIN_WSRLHI:
+ case ARM_BUILTIN_WSRLWI:
+ case ARM_BUILTIN_WSRLDI:
+ case ARM_BUILTIN_WSLLHI:
+ case ARM_BUILTIN_WSLLWI:
+ case ARM_BUILTIN_WSLLDI:
+ case ARM_BUILTIN_WSRAHI:
+ case ARM_BUILTIN_WSRAWI:
+ case ARM_BUILTIN_WSRADI:
+ case ARM_BUILTIN_WRORHI:
+ case ARM_BUILTIN_WRORWI:
+ case ARM_BUILTIN_WRORDI:
+ case ARM_BUILTIN_WSRLH:
+ case ARM_BUILTIN_WSRLW:
+ case ARM_BUILTIN_WSRLD:
+ case ARM_BUILTIN_WSLLH:
+ case ARM_BUILTIN_WSLLW:
+ case ARM_BUILTIN_WSLLD:
+ case ARM_BUILTIN_WSRAH:
+ case ARM_BUILTIN_WSRAW:
+ case ARM_BUILTIN_WSRAD:
+ case ARM_BUILTIN_WRORH:
+ case ARM_BUILTIN_WRORW:
+ case ARM_BUILTIN_WRORD:
+ icode = (fcode == ARM_BUILTIN_WSRLHI ? CODE_FOR_lshrv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRLWI ? CODE_FOR_lshrv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRLDI ? CODE_FOR_lshrdi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLHI ? CODE_FOR_ashlv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLWI ? CODE_FOR_ashlv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLDI ? CODE_FOR_ashldi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRAHI ? CODE_FOR_ashrv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRAWI ? CODE_FOR_ashrv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRADI ? CODE_FOR_ashrdi3_iwmmxt
+ : fcode == ARM_BUILTIN_WRORHI ? CODE_FOR_rorv4hi3
+ : fcode == ARM_BUILTIN_WRORWI ? CODE_FOR_rorv2si3
+ : fcode == ARM_BUILTIN_WRORDI ? CODE_FOR_rordi3
+ : fcode == ARM_BUILTIN_WSRLH ? CODE_FOR_lshrv4hi3_di
+ : fcode == ARM_BUILTIN_WSRLW ? CODE_FOR_lshrv2si3_di
+ : fcode == ARM_BUILTIN_WSRLD ? CODE_FOR_lshrdi3_di
+ : fcode == ARM_BUILTIN_WSLLH ? CODE_FOR_ashlv4hi3_di
+ : fcode == ARM_BUILTIN_WSLLW ? CODE_FOR_ashlv2si3_di
+ : fcode == ARM_BUILTIN_WSLLD ? CODE_FOR_ashldi3_di
+ : fcode == ARM_BUILTIN_WSRAH ? CODE_FOR_ashrv4hi3_di
+ : fcode == ARM_BUILTIN_WSRAW ? CODE_FOR_ashrv2si3_di
+ : fcode == ARM_BUILTIN_WSRAD ? CODE_FOR_ashrdi3_di
+ : fcode == ARM_BUILTIN_WRORH ? CODE_FOR_rorv4hi3_di
+ : fcode == ARM_BUILTIN_WRORW ? CODE_FOR_rorv2si3_di
+ : fcode == ARM_BUILTIN_WRORD ? CODE_FOR_rordi3_di
+ : CODE_FOR_nothing);
+ arg1 = CALL_EXPR_ARG (exp, 1);
+ op1 = expand_normal (arg1);
+ if (GET_MODE (op1) == VOIDmode)
+ {
+ imm = INTVAL (op1);
+ if ((fcode == ARM_BUILTIN_WRORHI || fcode == ARM_BUILTIN_WRORWI
+ || fcode == ARM_BUILTIN_WRORH || fcode == ARM_BUILTIN_WRORW)
+ && (imm < 0 || imm > 32))
+ {
+ if (fcode == ARM_BUILTIN_WRORHI)
+ error ("the range of count should be in 0 to 32. please check the intrinsic _mm_rori_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WRORWI)
+ error ("the range of count should be in 0 to 32. please check the intrinsic _mm_rori_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WRORH)
+ error ("the range of count should be in 0 to 32. please check the intrinsic _mm_ror_pi16 in code.");
+ else
+ error ("the range of count should be in 0 to 32. please check the intrinsic _mm_ror_pi32 in code.");
+ }
+ else if ((fcode == ARM_BUILTIN_WRORDI || fcode == ARM_BUILTIN_WRORD)
+ && (imm < 0 || imm > 64))
+ {
+ if (fcode == ARM_BUILTIN_WRORDI)
+ error ("the range of count should be in 0 to 64. please check the intrinsic _mm_rori_si64 in code.");
+ else
+ error ("the range of count should be in 0 to 64. please check the intrinsic _mm_ror_si64 in code.");
+ }
+ else if (imm < 0)
+ {
+ if (fcode == ARM_BUILTIN_WSRLHI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srli_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLWI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srli_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLDI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srli_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLHI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_slli_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLWI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_slli_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLDI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_slli_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSRAHI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srai_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSRAWI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srai_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSRADI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srai_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLH)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srl_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLW)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srl_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLD)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srl_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLH)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sll_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLW)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sll_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLD)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sll_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSRAH)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sra_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSRAW)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sra_pi32 in code.");
+ else
+ error ("the count should be no less than 0. please check the intrinsic _mm_sra_si64 in code.");
+ }
+ }
+ return arm_expand_binop_builtin (icode, exp, target);
+
case ARM_BUILTIN_THREAD_POINTER:
return arm_load_tp (target);
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
2011-11-18 23:47 ` Ramana Radhakrishnan
@ 2011-11-24 7:09 ` Xinyu Qi
2011-12-22 6:55 ` Xinyu Qi
` (3 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Xinyu Qi @ 2011-11-24 7:09 UTC (permalink / raw)
To: Ramana Radhakrishnan; +Cc: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 760 bytes --]
At 2011-11-19 07:08:22,"Ramana Radhakrishnan" <ramana.radhakrishnan@linaro.org> wrote:
> On 20 October 2011 08:39, Xinyu Qi <xyqi@marvell.com> wrote:
> > Ping
> >
> > http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html
> >
> > * config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
> > (builtin_description bdesc_2arg): Revise built in declaration.
> > (builtin_description bdesc_1arg): Likewise.
> > (arm_init_iwmmxt_builtins): Revise built in initialization.
> > (arm_expand_builtin): Revise built in expansion.
> >
>
> This currently doesn't apply - can you take a look ?
Hi Ramana,
I resolve the patch conflict with the newest trunk gcc. The resolved diff is attached.
Thanks,
Xinyu
[-- Attachment #2: 3_arm_c.diff --]
[-- Type: application/octet-stream, Size: 38151 bytes --]
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c (revision 181648)
+++ gcc/config/arm/arm.c (working copy)
@@ -19100,8 +19100,15 @@ static neon_builtin_datum neon_builtin_d
FIXME? */
enum arm_builtins
{
- ARM_BUILTIN_GETWCX,
- ARM_BUILTIN_SETWCX,
+ ARM_BUILTIN_GETWCGR0,
+ ARM_BUILTIN_GETWCGR1,
+ ARM_BUILTIN_GETWCGR2,
+ ARM_BUILTIN_GETWCGR3,
+
+ ARM_BUILTIN_SETWCGR0,
+ ARM_BUILTIN_SETWCGR1,
+ ARM_BUILTIN_SETWCGR2,
+ ARM_BUILTIN_SETWCGR3,
ARM_BUILTIN_WZERO,
@@ -19124,7 +19131,11 @@ enum arm_builtins
ARM_BUILTIN_WSADH,
ARM_BUILTIN_WSADHZ,
- ARM_BUILTIN_WALIGN,
+ ARM_BUILTIN_WALIGNI,
+ ARM_BUILTIN_WALIGNR0,
+ ARM_BUILTIN_WALIGNR1,
+ ARM_BUILTIN_WALIGNR2,
+ ARM_BUILTIN_WALIGNR3,
ARM_BUILTIN_TMIA,
ARM_BUILTIN_TMIAPH,
@@ -19260,6 +19271,97 @@ enum arm_builtins
ARM_BUILTIN_WUNPCKELUH,
ARM_BUILTIN_WUNPCKELUW,
+ ARM_BUILTIN_WABSB,
+ ARM_BUILTIN_WABSH,
+ ARM_BUILTIN_WABSW,
+
+ ARM_BUILTIN_WADDSUBHX,
+ ARM_BUILTIN_WSUBADDHX,
+
+ ARM_BUILTIN_WABSDIFFB,
+ ARM_BUILTIN_WABSDIFFH,
+ ARM_BUILTIN_WABSDIFFW,
+
+ ARM_BUILTIN_WADDCH,
+ ARM_BUILTIN_WADDCW,
+
+ ARM_BUILTIN_WAVG4,
+ ARM_BUILTIN_WAVG4R,
+
+ ARM_BUILTIN_WMADDSX,
+ ARM_BUILTIN_WMADDUX,
+
+ ARM_BUILTIN_WMADDSN,
+ ARM_BUILTIN_WMADDUN,
+
+ ARM_BUILTIN_WMULWSM,
+ ARM_BUILTIN_WMULWUM,
+
+ ARM_BUILTIN_WMULWSMR,
+ ARM_BUILTIN_WMULWUMR,
+
+ ARM_BUILTIN_WMULWL,
+
+ ARM_BUILTIN_WMULSMR,
+ ARM_BUILTIN_WMULUMR,
+
+ ARM_BUILTIN_WQMULM,
+ ARM_BUILTIN_WQMULMR,
+
+ ARM_BUILTIN_WQMULWM,
+ ARM_BUILTIN_WQMULWMR,
+
+ ARM_BUILTIN_WADDBHUSM,
+ ARM_BUILTIN_WADDBHUSL,
+
+ ARM_BUILTIN_WQMIABB,
+ ARM_BUILTIN_WQMIABT,
+ ARM_BUILTIN_WQMIATB,
+ ARM_BUILTIN_WQMIATT,
+
+ ARM_BUILTIN_WQMIABBN,
+ ARM_BUILTIN_WQMIABTN,
+ ARM_BUILTIN_WQMIATBN,
+ ARM_BUILTIN_WQMIATTN,
+
+ ARM_BUILTIN_WMIABB,
+ ARM_BUILTIN_WMIABT,
+ ARM_BUILTIN_WMIATB,
+ ARM_BUILTIN_WMIATT,
+
+ ARM_BUILTIN_WMIABBN,
+ ARM_BUILTIN_WMIABTN,
+ ARM_BUILTIN_WMIATBN,
+ ARM_BUILTIN_WMIATTN,
+
+ ARM_BUILTIN_WMIAWBB,
+ ARM_BUILTIN_WMIAWBT,
+ ARM_BUILTIN_WMIAWTB,
+ ARM_BUILTIN_WMIAWTT,
+
+ ARM_BUILTIN_WMIAWBBN,
+ ARM_BUILTIN_WMIAWBTN,
+ ARM_BUILTIN_WMIAWTBN,
+ ARM_BUILTIN_WMIAWTTN,
+
+ ARM_BUILTIN_WMERGE,
+
+ ARM_BUILTIN_TANDCB,
+ ARM_BUILTIN_TANDCH,
+ ARM_BUILTIN_TANDCW,
+
+ ARM_BUILTIN_TORCB,
+ ARM_BUILTIN_TORCH,
+ ARM_BUILTIN_TORCW,
+
+ ARM_BUILTIN_TORVSCB,
+ ARM_BUILTIN_TORVSCH,
+ ARM_BUILTIN_TORVSCW,
+
+ ARM_BUILTIN_TEXTRCB,
+ ARM_BUILTIN_TEXTRCH,
+ ARM_BUILTIN_TEXTRCW,
+
ARM_BUILTIN_THREAD_POINTER,
ARM_BUILTIN_NEON_BASE,
@@ -19848,44 +19950,56 @@ static const struct builtin_description
IWMMXT_BUILTIN (iwmmxt_wunpckihb, "wunpckihb", WUNPCKIHB)
IWMMXT_BUILTIN (iwmmxt_wunpckihh, "wunpckihh", WUNPCKIHH)
IWMMXT_BUILTIN (iwmmxt_wunpckihw, "wunpckihw", WUNPCKIHW)
- IWMMXT_BUILTIN (iwmmxt_wmadds, "wmadds", WMADDS)
- IWMMXT_BUILTIN (iwmmxt_wmaddu, "wmaddu", WMADDU)
+ IWMMXT_BUILTIN (iwmmxt_waddsubhx, "waddsubhx", WADDSUBHX)
+ IWMMXT_BUILTIN (iwmmxt_wsubaddhx, "wsubaddhx", WSUBADDHX)
+ IWMMXT_BUILTIN (iwmmxt_wabsdiffb, "wabsdiffb", WABSDIFFB)
+ IWMMXT_BUILTIN (iwmmxt_wabsdiffh, "wabsdiffh", WABSDIFFH)
+ IWMMXT_BUILTIN (iwmmxt_wabsdiffw, "wabsdiffw", WABSDIFFW)
+ IWMMXT_BUILTIN (addcv4hi3, "waddhc", WADDCH)
+ IWMMXT_BUILTIN (addcv2si3, "waddwc", WADDCW)
+ IWMMXT_BUILTIN (iwmmxt_avg4, "wavg4", WAVG4)
+ IWMMXT_BUILTIN (iwmmxt_avg4r, "wavg4r", WAVG4R)
+ IWMMXT_BUILTIN (iwmmxt_wmulwsm, "wmulwsm", WMULWSM)
+ IWMMXT_BUILTIN (iwmmxt_wmulwum, "wmulwum", WMULWUM)
+ IWMMXT_BUILTIN (iwmmxt_wmulwsmr, "wmulwsmr", WMULWSMR)
+ IWMMXT_BUILTIN (iwmmxt_wmulwumr, "wmulwumr", WMULWUMR)
+ IWMMXT_BUILTIN (iwmmxt_wmulwl, "wmulwl", WMULWL)
+ IWMMXT_BUILTIN (iwmmxt_wmulsmr, "wmulsmr", WMULSMR)
+ IWMMXT_BUILTIN (iwmmxt_wmulumr, "wmulumr", WMULUMR)
+ IWMMXT_BUILTIN (iwmmxt_wqmulm, "wqmulm", WQMULM)
+ IWMMXT_BUILTIN (iwmmxt_wqmulmr, "wqmulmr", WQMULMR)
+ IWMMXT_BUILTIN (iwmmxt_wqmulwm, "wqmulwm", WQMULWM)
+ IWMMXT_BUILTIN (iwmmxt_wqmulwmr, "wqmulwmr", WQMULWMR)
+ IWMMXT_BUILTIN (iwmmxt_walignr0, "walignr0", WALIGNR0)
+ IWMMXT_BUILTIN (iwmmxt_walignr1, "walignr1", WALIGNR1)
+ IWMMXT_BUILTIN (iwmmxt_walignr2, "walignr2", WALIGNR2)
+ IWMMXT_BUILTIN (iwmmxt_walignr3, "walignr3", WALIGNR3)
#define IWMMXT_BUILTIN2(code, builtin) \
{ FL_IWMMXT, CODE_FOR_##code, NULL, ARM_BUILTIN_##builtin, UNKNOWN, 0 },
+ IWMMXT_BUILTIN2 (iwmmxt_waddbhusm, WADDBHUSM)
+ IWMMXT_BUILTIN2 (iwmmxt_waddbhusl, WADDBHUSL)
IWMMXT_BUILTIN2 (iwmmxt_wpackhss, WPACKHSS)
IWMMXT_BUILTIN2 (iwmmxt_wpackwss, WPACKWSS)
IWMMXT_BUILTIN2 (iwmmxt_wpackdss, WPACKDSS)
IWMMXT_BUILTIN2 (iwmmxt_wpackhus, WPACKHUS)
IWMMXT_BUILTIN2 (iwmmxt_wpackwus, WPACKWUS)
IWMMXT_BUILTIN2 (iwmmxt_wpackdus, WPACKDUS)
- IWMMXT_BUILTIN2 (ashlv4hi3_di, WSLLH)
- IWMMXT_BUILTIN2 (ashlv4hi3_iwmmxt, WSLLHI)
- IWMMXT_BUILTIN2 (ashlv2si3_di, WSLLW)
- IWMMXT_BUILTIN2 (ashlv2si3_iwmmxt, WSLLWI)
- IWMMXT_BUILTIN2 (ashldi3_di, WSLLD)
- IWMMXT_BUILTIN2 (ashldi3_iwmmxt, WSLLDI)
- IWMMXT_BUILTIN2 (lshrv4hi3_di, WSRLH)
- IWMMXT_BUILTIN2 (lshrv4hi3_iwmmxt, WSRLHI)
- IWMMXT_BUILTIN2 (lshrv2si3_di, WSRLW)
- IWMMXT_BUILTIN2 (lshrv2si3_iwmmxt, WSRLWI)
- IWMMXT_BUILTIN2 (lshrdi3_di, WSRLD)
- IWMMXT_BUILTIN2 (lshrdi3_iwmmxt, WSRLDI)
- IWMMXT_BUILTIN2 (ashrv4hi3_di, WSRAH)
- IWMMXT_BUILTIN2 (ashrv4hi3_iwmmxt, WSRAHI)
- IWMMXT_BUILTIN2 (ashrv2si3_di, WSRAW)
- IWMMXT_BUILTIN2 (ashrv2si3_iwmmxt, WSRAWI)
- IWMMXT_BUILTIN2 (ashrdi3_di, WSRAD)
- IWMMXT_BUILTIN2 (ashrdi3_iwmmxt, WSRADI)
- IWMMXT_BUILTIN2 (rorv4hi3_di, WRORH)
- IWMMXT_BUILTIN2 (rorv4hi3, WRORHI)
- IWMMXT_BUILTIN2 (rorv2si3_di, WRORW)
- IWMMXT_BUILTIN2 (rorv2si3, WRORWI)
- IWMMXT_BUILTIN2 (rordi3_di, WRORD)
- IWMMXT_BUILTIN2 (rordi3, WRORDI)
- IWMMXT_BUILTIN2 (iwmmxt_wmacuz, WMACUZ)
- IWMMXT_BUILTIN2 (iwmmxt_wmacsz, WMACSZ)
+ IWMMXT_BUILTIN2 (ashlv4hi3_di, WSLLH)
+ IWMMXT_BUILTIN2 (ashlv2si3_di, WSLLW)
+ IWMMXT_BUILTIN2 (ashldi3_di, WSLLD)
+ IWMMXT_BUILTIN2 (lshrv4hi3_di, WSRLH)
+ IWMMXT_BUILTIN2 (lshrv2si3_di, WSRLW)
+ IWMMXT_BUILTIN2 (lshrdi3_di, WSRLD)
+ IWMMXT_BUILTIN2 (ashrv4hi3_di, WSRAH)
+ IWMMXT_BUILTIN2 (ashrv2si3_di, WSRAW)
+ IWMMXT_BUILTIN2 (ashrdi3_di, WSRAD)
+ IWMMXT_BUILTIN2 (rorv4hi3_di, WRORH)
+ IWMMXT_BUILTIN2 (rorv2si3_di, WRORW)
+ IWMMXT_BUILTIN2 (rordi3_di, WRORD)
+ IWMMXT_BUILTIN2 (iwmmxt_wmacuz, WMACUZ)
+ IWMMXT_BUILTIN2 (iwmmxt_wmacsz, WMACSZ)
};
static const struct builtin_description bdesc_1arg[] =
@@ -19908,6 +20022,12 @@ static const struct builtin_description
IWMMXT_BUILTIN (iwmmxt_wunpckelsb, "wunpckelsb", WUNPCKELSB)
IWMMXT_BUILTIN (iwmmxt_wunpckelsh, "wunpckelsh", WUNPCKELSH)
IWMMXT_BUILTIN (iwmmxt_wunpckelsw, "wunpckelsw", WUNPCKELSW)
+ IWMMXT_BUILTIN (iwmmxt_wabsv8qi3, "wabsb", WABSB)
+ IWMMXT_BUILTIN (iwmmxt_wabsv4hi3, "wabsh", WABSH)
+ IWMMXT_BUILTIN (iwmmxt_wabsv2si3, "wabsw", WABSW)
+ IWMMXT_BUILTIN (tbcstv8qi, "tbcstb", TBCSTB)
+ IWMMXT_BUILTIN (tbcstv4hi, "tbcsth", TBCSTH)
+ IWMMXT_BUILTIN (tbcstv2si, "tbcstw", TBCSTW)
};
/* Set up all the iWMMXt builtins. This is not called if
@@ -19923,9 +20043,6 @@ arm_init_iwmmxt_builtins (void)
tree V4HI_type_node = build_vector_type_for_mode (intHI_type_node, V4HImode);
tree V8QI_type_node = build_vector_type_for_mode (intQI_type_node, V8QImode);
- tree int_ftype_int
- = build_function_type_list (integer_type_node,
- integer_type_node, NULL_TREE);
tree v8qi_ftype_v8qi_v8qi_int
= build_function_type_list (V8QI_type_node,
V8QI_type_node, V8QI_type_node,
@@ -19987,6 +20104,9 @@ arm_init_iwmmxt_builtins (void)
tree v4hi_ftype_v2si_v2si
= build_function_type_list (V4HI_type_node,
V2SI_type_node, V2SI_type_node, NULL_TREE);
+ tree v8qi_ftype_v4hi_v8qi
+ = build_function_type_list (V8QI_type_node,
+ V4HI_type_node, V8QI_type_node, NULL_TREE);
tree v2si_ftype_v4hi_v4hi
= build_function_type_list (V2SI_type_node,
V4HI_type_node, V4HI_type_node, NULL_TREE);
@@ -20001,12 +20121,10 @@ arm_init_iwmmxt_builtins (void)
= build_function_type_list (V2SI_type_node,
V2SI_type_node, long_long_integer_type_node,
NULL_TREE);
- tree void_ftype_int_int
- = build_function_type_list (void_type_node,
- integer_type_node, integer_type_node,
- NULL_TREE);
tree di_ftype_void
= build_function_type_list (long_long_unsigned_type_node, NULL_TREE);
+ tree int_ftype_void
+ = build_function_type_list (integer_type_node, NULL_TREE);
tree di_ftype_v8qi
= build_function_type_list (long_long_integer_type_node,
V8QI_type_node, NULL_TREE);
@@ -20022,6 +20140,15 @@ arm_init_iwmmxt_builtins (void)
tree v4hi_ftype_v8qi
= build_function_type_list (V4HI_type_node,
V8QI_type_node, NULL_TREE);
+ tree v8qi_ftype_v8qi
+ = build_function_type_list (V8QI_type_node,
+ V8QI_type_node, NULL_TREE);
+ tree v4hi_ftype_v4hi
+ = build_function_type_list (V4HI_type_node,
+ V4HI_type_node, NULL_TREE);
+ tree v2si_ftype_v2si
+ = build_function_type_list (V2SI_type_node,
+ V2SI_type_node, NULL_TREE);
tree di_ftype_di_v4hi_v4hi
= build_function_type_list (long_long_unsigned_type_node,
@@ -20034,6 +20161,48 @@ arm_init_iwmmxt_builtins (void)
V4HI_type_node,V4HI_type_node,
NULL_TREE);
+ tree v2si_ftype_v2si_v4hi_v4hi
+ = build_function_type_list (V2SI_type_node,
+ V2SI_type_node, V4HI_type_node,
+ V4HI_type_node, NULL_TREE);
+
+ tree v2si_ftype_v2si_v8qi_v8qi
+ = build_function_type_list (V2SI_type_node,
+ V2SI_type_node, V8QI_type_node,
+ V8QI_type_node, NULL_TREE);
+
+ tree di_ftype_di_v2si_v2si
+ = build_function_type_list (long_long_unsigned_type_node,
+ long_long_unsigned_type_node,
+ V2SI_type_node, V2SI_type_node,
+ NULL_TREE);
+
+ tree di_ftype_di_di_int
+ = build_function_type_list (long_long_unsigned_type_node,
+ long_long_unsigned_type_node,
+ long_long_unsigned_type_node,
+ integer_type_node, NULL_TREE);
+
+ tree void_ftype_void
+ = build_function_type_list (void_type_node,
+ NULL_TREE);
+
+ tree void_ftype_int
+ = build_function_type_list (void_type_node,
+ integer_type_node, NULL_TREE);
+
+ tree v8qi_ftype_char
+ = build_function_type_list (V8QI_type_node,
+ signed_char_type_node, NULL_TREE);
+
+ tree v4hi_ftype_short
+ = build_function_type_list (V4HI_type_node,
+ short_integer_type_node, NULL_TREE);
+
+ tree v2si_ftype_int
+ = build_function_type_list (V2SI_type_node,
+ integer_type_node, NULL_TREE);
+
/* Normal vector binops. */
tree v8qi_ftype_v8qi_v8qi
= build_function_type_list (V8QI_type_node,
@@ -20092,8 +20261,14 @@ arm_init_iwmmxt_builtins (void)
ARM_BUILTIN_ ## CODE)
iwmmx_mbuiltin ("wzero", di_ftype_void, WZERO);
- iwmmx_mbuiltin ("setwcx", void_ftype_int_int, SETWCX);
- iwmmx_mbuiltin ("getwcx", int_ftype_int, GETWCX);
+ iwmmx_mbuiltin ("setwcgr0", void_ftype_int, SETWCGR0);
+ iwmmx_mbuiltin ("setwcgr1", void_ftype_int, SETWCGR1);
+ iwmmx_mbuiltin ("setwcgr2", void_ftype_int, SETWCGR2);
+ iwmmx_mbuiltin ("setwcgr3", void_ftype_int, SETWCGR3);
+ iwmmx_mbuiltin ("getwcgr0", int_ftype_void, GETWCGR0);
+ iwmmx_mbuiltin ("getwcgr1", int_ftype_void, GETWCGR1);
+ iwmmx_mbuiltin ("getwcgr2", int_ftype_void, GETWCGR2);
+ iwmmx_mbuiltin ("getwcgr3", int_ftype_void, GETWCGR3);
iwmmx_mbuiltin ("wsllh", v4hi_ftype_v4hi_di, WSLLH);
iwmmx_mbuiltin ("wsllw", v2si_ftype_v2si_di, WSLLW);
@@ -20125,8 +20300,14 @@ arm_init_iwmmxt_builtins (void)
iwmmx_mbuiltin ("wshufh", v4hi_ftype_v4hi_int, WSHUFH);
- iwmmx_mbuiltin ("wsadb", v2si_ftype_v8qi_v8qi, WSADB);
- iwmmx_mbuiltin ("wsadh", v2si_ftype_v4hi_v4hi, WSADH);
+ iwmmx_mbuiltin ("wsadb", v2si_ftype_v2si_v8qi_v8qi, WSADB);
+ iwmmx_mbuiltin ("wsadh", v2si_ftype_v2si_v4hi_v4hi, WSADH);
+ iwmmx_mbuiltin ("wmadds", v2si_ftype_v4hi_v4hi, WMADDS);
+ iwmmx_mbuiltin ("wmaddsx", v2si_ftype_v4hi_v4hi, WMADDSX);
+ iwmmx_mbuiltin ("wmaddsn", v2si_ftype_v4hi_v4hi, WMADDSN);
+ iwmmx_mbuiltin ("wmaddu", v2si_ftype_v4hi_v4hi, WMADDU);
+ iwmmx_mbuiltin ("wmaddux", v2si_ftype_v4hi_v4hi, WMADDUX);
+ iwmmx_mbuiltin ("wmaddun", v2si_ftype_v4hi_v4hi, WMADDUN);
iwmmx_mbuiltin ("wsadbz", v2si_ftype_v8qi_v8qi, WSADBZ);
iwmmx_mbuiltin ("wsadhz", v2si_ftype_v4hi_v4hi, WSADHZ);
@@ -20148,6 +20329,9 @@ arm_init_iwmmxt_builtins (void)
iwmmx_mbuiltin ("tmovmskh", int_ftype_v4hi, TMOVMSKH);
iwmmx_mbuiltin ("tmovmskw", int_ftype_v2si, TMOVMSKW);
+ iwmmx_mbuiltin ("waddbhusm", v8qi_ftype_v4hi_v8qi, WADDBHUSM);
+ iwmmx_mbuiltin ("waddbhusl", v8qi_ftype_v4hi_v8qi, WADDBHUSL);
+
iwmmx_mbuiltin ("wpackhss", v8qi_ftype_v4hi_v4hi, WPACKHSS);
iwmmx_mbuiltin ("wpackhus", v8qi_ftype_v4hi_v4hi, WPACKHUS);
iwmmx_mbuiltin ("wpackwus", v4hi_ftype_v2si_v2si, WPACKWUS);
@@ -20173,7 +20357,7 @@ arm_init_iwmmxt_builtins (void)
iwmmx_mbuiltin ("wmacu", di_ftype_di_v4hi_v4hi, WMACU);
iwmmx_mbuiltin ("wmacuz", di_ftype_v4hi_v4hi, WMACUZ);
- iwmmx_mbuiltin ("walign", v8qi_ftype_v8qi_v8qi_int, WALIGN);
+ iwmmx_mbuiltin ("walign", v8qi_ftype_v8qi_v8qi_int, WALIGNI);
iwmmx_mbuiltin ("tmia", di_ftype_di_int_int, TMIA);
iwmmx_mbuiltin ("tmiaph", di_ftype_di_int_int, TMIAPH);
iwmmx_mbuiltin ("tmiabb", di_ftype_di_int_int, TMIABB);
@@ -20181,6 +20365,62 @@ arm_init_iwmmxt_builtins (void)
iwmmx_mbuiltin ("tmiatb", di_ftype_di_int_int, TMIATB);
iwmmx_mbuiltin ("tmiatt", di_ftype_di_int_int, TMIATT);
+ iwmmx_mbuiltin ("wabsb", v8qi_ftype_v8qi, WABSB);
+ iwmmx_mbuiltin ("wabsh", v4hi_ftype_v4hi, WABSH);
+ iwmmx_mbuiltin ("wabsw", v2si_ftype_v2si, WABSW);
+
+ iwmmx_mbuiltin ("wqmiabb", v2si_ftype_v2si_v4hi_v4hi, WQMIABB);
+ iwmmx_mbuiltin ("wqmiabt", v2si_ftype_v2si_v4hi_v4hi, WQMIABT);
+ iwmmx_mbuiltin ("wqmiatb", v2si_ftype_v2si_v4hi_v4hi, WQMIATB);
+ iwmmx_mbuiltin ("wqmiatt", v2si_ftype_v2si_v4hi_v4hi, WQMIATT);
+
+ iwmmx_mbuiltin ("wqmiabbn", v2si_ftype_v2si_v4hi_v4hi, WQMIABBN);
+ iwmmx_mbuiltin ("wqmiabtn", v2si_ftype_v2si_v4hi_v4hi, WQMIABTN);
+ iwmmx_mbuiltin ("wqmiatbn", v2si_ftype_v2si_v4hi_v4hi, WQMIATBN);
+ iwmmx_mbuiltin ("wqmiattn", v2si_ftype_v2si_v4hi_v4hi, WQMIATTN);
+
+ iwmmx_mbuiltin ("wmiabb", di_ftype_di_v4hi_v4hi, WMIABB);
+ iwmmx_mbuiltin ("wmiabt", di_ftype_di_v4hi_v4hi, WMIABT);
+ iwmmx_mbuiltin ("wmiatb", di_ftype_di_v4hi_v4hi, WMIATB);
+ iwmmx_mbuiltin ("wmiatt", di_ftype_di_v4hi_v4hi, WMIATT);
+
+ iwmmx_mbuiltin ("wmiabbn", di_ftype_di_v4hi_v4hi, WMIABBN);
+ iwmmx_mbuiltin ("wmiabtn", di_ftype_di_v4hi_v4hi, WMIABTN);
+ iwmmx_mbuiltin ("wmiatbn", di_ftype_di_v4hi_v4hi, WMIATBN);
+ iwmmx_mbuiltin ("wmiattn", di_ftype_di_v4hi_v4hi, WMIATTN);
+
+ iwmmx_mbuiltin ("wmiawbb", di_ftype_di_v2si_v2si, WMIAWBB);
+ iwmmx_mbuiltin ("wmiawbt", di_ftype_di_v2si_v2si, WMIAWBT);
+ iwmmx_mbuiltin ("wmiawtb", di_ftype_di_v2si_v2si, WMIAWTB);
+ iwmmx_mbuiltin ("wmiawtt", di_ftype_di_v2si_v2si, WMIAWTT);
+
+ iwmmx_mbuiltin ("wmiawbbn", di_ftype_di_v2si_v2si, WMIAWBBN);
+ iwmmx_mbuiltin ("wmiawbtn", di_ftype_di_v2si_v2si, WMIAWBTN);
+ iwmmx_mbuiltin ("wmiawtbn", di_ftype_di_v2si_v2si, WMIAWTBN);
+ iwmmx_mbuiltin ("wmiawttn", di_ftype_di_v2si_v2si, WMIAWTTN);
+
+ iwmmx_mbuiltin ("wmerge", di_ftype_di_di_int, WMERGE);
+
+ iwmmx_mbuiltin ("tandcb", void_ftype_void, TANDCB);
+ iwmmx_mbuiltin ("tandch", void_ftype_void, TANDCH);
+ iwmmx_mbuiltin ("tandcw", void_ftype_void, TANDCW);
+
+ iwmmx_mbuiltin ("torcb", void_ftype_void, TORCB);
+ iwmmx_mbuiltin ("torch", void_ftype_void, TORCH);
+ iwmmx_mbuiltin ("torcw", void_ftype_void, TORCW);
+
+ iwmmx_mbuiltin ("torvscb", void_ftype_void, TORVSCB);
+ iwmmx_mbuiltin ("torvsch", void_ftype_void, TORVSCH);
+ iwmmx_mbuiltin ("torvscw", void_ftype_void, TORVSCW);
+
+ iwmmx_mbuiltin ("textrcb", void_ftype_int, TEXTRCB);
+ iwmmx_mbuiltin ("textrch", void_ftype_int, TEXTRCH);
+ iwmmx_mbuiltin ("textrcw", void_ftype_int, TEXTRCW);
+
+ iwmmx_mbuiltin ("tbcstb", v8qi_ftype_char, TBCSTB);
+ iwmmx_mbuiltin ("tbcsth", v4hi_ftype_short, TBCSTH);
+ iwmmx_mbuiltin ("tbcstw", v2si_ftype_int, TBCSTW);
+
#undef iwmmx_mbuiltin
}
@@ -20787,6 +21027,10 @@ arm_expand_builtin (tree exp,
enum machine_mode mode0;
enum machine_mode mode1;
enum machine_mode mode2;
+ int opint;
+ int selector;
+ int mask;
+ int imm;
if (fcode >= ARM_BUILTIN_NEON_BASE)
return arm_expand_neon_builtin (fcode, exp, target);
@@ -20821,6 +21065,24 @@ arm_expand_builtin (tree exp,
error ("selector must be an immediate");
return gen_reg_rtx (tmode);
}
+
+ opint = INTVAL (op1);
+ if (fcode == ARM_BUILTIN_TEXTRMSB || fcode == ARM_BUILTIN_TEXTRMUB)
+ {
+ if (opint > 7 || opint < 0)
+ error ("the range of selector should be in 0 to 7");
+ }
+ else if (fcode == ARM_BUILTIN_TEXTRMSH || fcode == ARM_BUILTIN_TEXTRMUH)
+ {
+ if (opint > 3 || opint < 0)
+ error ("the range of selector should be in 0 to 3");
+ }
+ else /* ARM_BUILTIN_TEXTRMSW || ARM_BUILTIN_TEXTRMUW. */
+ {
+ if (opint > 1 || opint < 0)
+ error ("the range of selector should be in 0 to 1");
+ }
+
if (target == 0
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
@@ -20831,11 +21093,61 @@ arm_expand_builtin (tree exp,
emit_insn (pat);
return target;
+ case ARM_BUILTIN_WALIGNI:
+ /* If op2 is immediate, call walighi, else call walighr. */
+ arg0 = CALL_EXPR_ARG (exp, 0);
+ arg1 = CALL_EXPR_ARG (exp, 1);
+ arg2 = CALL_EXPR_ARG (exp, 2);
+ op0 = expand_normal (arg0);
+ op1 = expand_normal (arg1);
+ op2 = expand_normal (arg2);
+ if (GET_CODE (op2) == CONST_INT)
+ {
+ icode = CODE_FOR_iwmmxt_waligni;
+ tmode = insn_data[icode].operand[0].mode;
+ mode0 = insn_data[icode].operand[1].mode;
+ mode1 = insn_data[icode].operand[2].mode;
+ mode2 = insn_data[icode].operand[3].mode;
+ if (!(*insn_data[icode].operand[1].predicate) (op0, mode0))
+ op0 = copy_to_mode_reg (mode0, op0);
+ if (!(*insn_data[icode].operand[2].predicate) (op1, mode1))
+ op1 = copy_to_mode_reg (mode1, op1);
+ gcc_assert ((*insn_data[icode].operand[3].predicate) (op2, mode2));
+ selector = INTVAL (op2);
+ if (selector > 7 || selector < 0)
+ error ("the range of selector should be in 0 to 7");
+ }
+ else
+ {
+ icode = CODE_FOR_iwmmxt_walignr;
+ tmode = insn_data[icode].operand[0].mode;
+ mode0 = insn_data[icode].operand[1].mode;
+ mode1 = insn_data[icode].operand[2].mode;
+ mode2 = insn_data[icode].operand[3].mode;
+ if (!(*insn_data[icode].operand[1].predicate) (op0, mode0))
+ op0 = copy_to_mode_reg (mode0, op0);
+ if (!(*insn_data[icode].operand[2].predicate) (op1, mode1))
+ op1 = copy_to_mode_reg (mode1, op1);
+ if (!(*insn_data[icode].operand[3].predicate) (op2, mode2))
+ op2 = copy_to_mode_reg (mode2, op2);
+ }
+ if (target == 0
+ || GET_MODE (target) != tmode
+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+ pat = GEN_FCN (icode) (target, op0, op1, op2);
+ if (!pat)
+ return 0;
+ emit_insn (pat);
+ return target;
+
case ARM_BUILTIN_TINSRB:
case ARM_BUILTIN_TINSRH:
case ARM_BUILTIN_TINSRW:
+ case ARM_BUILTIN_WMERGE:
icode = (fcode == ARM_BUILTIN_TINSRB ? CODE_FOR_iwmmxt_tinsrb
: fcode == ARM_BUILTIN_TINSRH ? CODE_FOR_iwmmxt_tinsrh
+ : fcode == ARM_BUILTIN_WMERGE ? CODE_FOR_iwmmxt_wmerge
: CODE_FOR_iwmmxt_tinsrw);
arg0 = CALL_EXPR_ARG (exp, 0);
arg1 = CALL_EXPR_ARG (exp, 1);
@@ -20858,6 +21170,27 @@ arm_expand_builtin (tree exp,
error ("selector must be an immediate");
return const0_rtx;
}
+ if (icode == CODE_FOR_iwmmxt_wmerge)
+ {
+ selector = INTVAL (op2);
+ if (selector > 7 || selector < 0)
+ error ("the range of selector should be in 0 to 7");
+ }
+ if ((icode == CODE_FOR_iwmmxt_tinsrb)
+ || (icode == CODE_FOR_iwmmxt_tinsrh)
+ || (icode == CODE_FOR_iwmmxt_tinsrw))
+ {
+ mask=0x01;
+ selector= INTVAL (op2);
+ if (icode == CODE_FOR_iwmmxt_tinsrb && (selector < 0 || selector > 7))
+ error ("the range of selector should be in 0 to 7");
+ else if (icode == CODE_FOR_iwmmxt_tinsrh && (selector < 0 ||selector > 3))
+ error ("the range of selector should be in 0 to 3");
+ else if (icode == CODE_FOR_iwmmxt_tinsrw && (selector < 0 ||selector > 1))
+ error ("the range of selector should be in 0 to 1");
+ mask <<= selector;
+ op2 = gen_rtx_CONST_INT (SImode, mask);
+ }
if (target == 0
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
@@ -20868,19 +21201,42 @@ arm_expand_builtin (tree exp,
emit_insn (pat);
return target;
- case ARM_BUILTIN_SETWCX:
+ case ARM_BUILTIN_SETWCGR0:
+ case ARM_BUILTIN_SETWCGR1:
+ case ARM_BUILTIN_SETWCGR2:
+ case ARM_BUILTIN_SETWCGR3:
+ icode = (fcode == ARM_BUILTIN_SETWCGR0 ? CODE_FOR_iwmmxt_setwcgr0
+ : fcode == ARM_BUILTIN_SETWCGR1 ? CODE_FOR_iwmmxt_setwcgr1
+ : fcode == ARM_BUILTIN_SETWCGR2 ? CODE_FOR_iwmmxt_setwcgr2
+ : CODE_FOR_iwmmxt_setwcgr3);
arg0 = CALL_EXPR_ARG (exp, 0);
- arg1 = CALL_EXPR_ARG (exp, 1);
- op0 = force_reg (SImode, expand_normal (arg0));
- op1 = expand_normal (arg1);
- emit_insn (gen_iwmmxt_tmcr (op1, op0));
+ op0 = expand_normal (arg0);
+ mode0 = insn_data[icode].operand[0].mode;
+ if (!(*insn_data[icode].operand[0].predicate) (op0, mode0))
+ op0 = copy_to_mode_reg (mode0, op0);
+ pat = GEN_FCN (icode) (op0);
+ if (!pat)
+ return 0;
+ emit_insn (pat);
return 0;
- case ARM_BUILTIN_GETWCX:
- arg0 = CALL_EXPR_ARG (exp, 0);
- op0 = expand_normal (arg0);
- target = gen_reg_rtx (SImode);
- emit_insn (gen_iwmmxt_tmrc (target, op0));
+ case ARM_BUILTIN_GETWCGR0:
+ case ARM_BUILTIN_GETWCGR1:
+ case ARM_BUILTIN_GETWCGR2:
+ case ARM_BUILTIN_GETWCGR3:
+ icode = (fcode == ARM_BUILTIN_GETWCGR0 ? CODE_FOR_iwmmxt_getwcgr0
+ : fcode == ARM_BUILTIN_GETWCGR1 ? CODE_FOR_iwmmxt_getwcgr1
+ : fcode == ARM_BUILTIN_GETWCGR2 ? CODE_FOR_iwmmxt_getwcgr2
+ : CODE_FOR_iwmmxt_getwcgr3);
+ tmode = insn_data[icode].operand[0].mode;
+ if (target == 0
+ || GET_MODE (target) != tmode
+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+ pat = GEN_FCN (icode) (target);
+ if (!pat)
+ return 0;
+ emit_insn (pat);
return target;
case ARM_BUILTIN_WSHUFH:
@@ -20901,6 +21257,9 @@ arm_expand_builtin (tree exp,
error ("mask must be an immediate");
return const0_rtx;
}
+ selector = INTVAL (op1);
+ if (selector < 0 || selector > 255)
+ error ("the range of mask should be in 0 to 255");
if (target == 0
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
@@ -20911,10 +21270,18 @@ arm_expand_builtin (tree exp,
emit_insn (pat);
return target;
- case ARM_BUILTIN_WSADB:
- return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadb, exp, target);
- case ARM_BUILTIN_WSADH:
- return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadh, exp, target);
+ case ARM_BUILTIN_WMADDS:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmadds, exp, target);
+ case ARM_BUILTIN_WMADDSX:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddsx, exp, target);
+ case ARM_BUILTIN_WMADDSN:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddsn, exp, target);
+ case ARM_BUILTIN_WMADDU:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddu, exp, target);
+ case ARM_BUILTIN_WMADDUX:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddux, exp, target);
+ case ARM_BUILTIN_WMADDUN:
+ return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wmaddun, exp, target);
case ARM_BUILTIN_WSADBZ:
return arm_expand_binop_builtin (CODE_FOR_iwmmxt_wsadbz, exp, target);
case ARM_BUILTIN_WSADHZ:
@@ -20923,13 +21290,38 @@ arm_expand_builtin (tree exp,
/* Several three-argument builtins. */
case ARM_BUILTIN_WMACS:
case ARM_BUILTIN_WMACU:
- case ARM_BUILTIN_WALIGN:
case ARM_BUILTIN_TMIA:
case ARM_BUILTIN_TMIAPH:
case ARM_BUILTIN_TMIATT:
case ARM_BUILTIN_TMIATB:
case ARM_BUILTIN_TMIABT:
case ARM_BUILTIN_TMIABB:
+ case ARM_BUILTIN_WQMIABB:
+ case ARM_BUILTIN_WQMIABT:
+ case ARM_BUILTIN_WQMIATB:
+ case ARM_BUILTIN_WQMIATT:
+ case ARM_BUILTIN_WQMIABBN:
+ case ARM_BUILTIN_WQMIABTN:
+ case ARM_BUILTIN_WQMIATBN:
+ case ARM_BUILTIN_WQMIATTN:
+ case ARM_BUILTIN_WMIABB:
+ case ARM_BUILTIN_WMIABT:
+ case ARM_BUILTIN_WMIATB:
+ case ARM_BUILTIN_WMIATT:
+ case ARM_BUILTIN_WMIABBN:
+ case ARM_BUILTIN_WMIABTN:
+ case ARM_BUILTIN_WMIATBN:
+ case ARM_BUILTIN_WMIATTN:
+ case ARM_BUILTIN_WMIAWBB:
+ case ARM_BUILTIN_WMIAWBT:
+ case ARM_BUILTIN_WMIAWTB:
+ case ARM_BUILTIN_WMIAWTT:
+ case ARM_BUILTIN_WMIAWBBN:
+ case ARM_BUILTIN_WMIAWBTN:
+ case ARM_BUILTIN_WMIAWTBN:
+ case ARM_BUILTIN_WMIAWTTN:
+ case ARM_BUILTIN_WSADB:
+ case ARM_BUILTIN_WSADH:
icode = (fcode == ARM_BUILTIN_WMACS ? CODE_FOR_iwmmxt_wmacs
: fcode == ARM_BUILTIN_WMACU ? CODE_FOR_iwmmxt_wmacu
: fcode == ARM_BUILTIN_TMIA ? CODE_FOR_iwmmxt_tmia
@@ -20938,7 +21330,32 @@ arm_expand_builtin (tree exp,
: fcode == ARM_BUILTIN_TMIABT ? CODE_FOR_iwmmxt_tmiabt
: fcode == ARM_BUILTIN_TMIATB ? CODE_FOR_iwmmxt_tmiatb
: fcode == ARM_BUILTIN_TMIATT ? CODE_FOR_iwmmxt_tmiatt
- : CODE_FOR_iwmmxt_walign);
+ : fcode == ARM_BUILTIN_WQMIABB ? CODE_FOR_iwmmxt_wqmiabb
+ : fcode == ARM_BUILTIN_WQMIABT ? CODE_FOR_iwmmxt_wqmiabt
+ : fcode == ARM_BUILTIN_WQMIATB ? CODE_FOR_iwmmxt_wqmiatb
+ : fcode == ARM_BUILTIN_WQMIATT ? CODE_FOR_iwmmxt_wqmiatt
+ : fcode == ARM_BUILTIN_WQMIABBN ? CODE_FOR_iwmmxt_wqmiabbn
+ : fcode == ARM_BUILTIN_WQMIABTN ? CODE_FOR_iwmmxt_wqmiabtn
+ : fcode == ARM_BUILTIN_WQMIATBN ? CODE_FOR_iwmmxt_wqmiatbn
+ : fcode == ARM_BUILTIN_WQMIATTN ? CODE_FOR_iwmmxt_wqmiattn
+ : fcode == ARM_BUILTIN_WMIABB ? CODE_FOR_iwmmxt_wmiabb
+ : fcode == ARM_BUILTIN_WMIABT ? CODE_FOR_iwmmxt_wmiabt
+ : fcode == ARM_BUILTIN_WMIATB ? CODE_FOR_iwmmxt_wmiatb
+ : fcode == ARM_BUILTIN_WMIATT ? CODE_FOR_iwmmxt_wmiatt
+ : fcode == ARM_BUILTIN_WMIABBN ? CODE_FOR_iwmmxt_wmiabbn
+ : fcode == ARM_BUILTIN_WMIABTN ? CODE_FOR_iwmmxt_wmiabtn
+ : fcode == ARM_BUILTIN_WMIATBN ? CODE_FOR_iwmmxt_wmiatbn
+ : fcode == ARM_BUILTIN_WMIATTN ? CODE_FOR_iwmmxt_wmiattn
+ : fcode == ARM_BUILTIN_WMIAWBB ? CODE_FOR_iwmmxt_wmiawbb
+ : fcode == ARM_BUILTIN_WMIAWBT ? CODE_FOR_iwmmxt_wmiawbt
+ : fcode == ARM_BUILTIN_WMIAWTB ? CODE_FOR_iwmmxt_wmiawtb
+ : fcode == ARM_BUILTIN_WMIAWTT ? CODE_FOR_iwmmxt_wmiawtt
+ : fcode == ARM_BUILTIN_WMIAWBBN ? CODE_FOR_iwmmxt_wmiawbbn
+ : fcode == ARM_BUILTIN_WMIAWBTN ? CODE_FOR_iwmmxt_wmiawbtn
+ : fcode == ARM_BUILTIN_WMIAWTBN ? CODE_FOR_iwmmxt_wmiawtbn
+ : fcode == ARM_BUILTIN_WMIAWTTN ? CODE_FOR_iwmmxt_wmiawttn
+ : fcode == ARM_BUILTIN_WSADB ? CODE_FOR_iwmmxt_wsadb
+ : CODE_FOR_iwmmxt_wsadh);
arg0 = CALL_EXPR_ARG (exp, 0);
arg1 = CALL_EXPR_ARG (exp, 1);
arg2 = CALL_EXPR_ARG (exp, 2);
@@ -20971,9 +21388,196 @@ arm_expand_builtin (tree exp,
emit_insn (gen_iwmmxt_clrdi (target));
return target;
+ case ARM_BUILTIN_TANDCB:
+ case ARM_BUILTIN_TANDCH:
+ case ARM_BUILTIN_TANDCW:
+ case ARM_BUILTIN_TORCB:
+ case ARM_BUILTIN_TORCH:
+ case ARM_BUILTIN_TORCW:
+ case ARM_BUILTIN_TORVSCB:
+ case ARM_BUILTIN_TORVSCH:
+ case ARM_BUILTIN_TORVSCW:
+ icode = (fcode == ARM_BUILTIN_TANDCB ? CODE_FOR_iwmmxt_tandcv8qi3
+ : fcode == ARM_BUILTIN_TANDCH ? CODE_FOR_iwmmxt_tandcv4hi3
+ : fcode == ARM_BUILTIN_TANDCW ? CODE_FOR_iwmmxt_tandcv2si3
+ : fcode == ARM_BUILTIN_TORCB ? CODE_FOR_iwmmxt_torcv8qi3
+ : fcode == ARM_BUILTIN_TORCH ? CODE_FOR_iwmmxt_torcv4hi3
+ : fcode == ARM_BUILTIN_TORCW ? CODE_FOR_iwmmxt_torcv2si3
+ : fcode == ARM_BUILTIN_TORVSCB ? CODE_FOR_iwmmxt_torvscv8qi3
+ : fcode == ARM_BUILTIN_TORVSCH ? CODE_FOR_iwmmxt_torvscv4hi3
+ : fcode == ARM_BUILTIN_TORVSCW ? CODE_FOR_iwmmxt_torvscv2si3
+ : CODE_FOR_iwmmxt_tandcv2si3);
+ pat = GEN_FCN (icode) (0);
+ if (!pat)
+ return 0;
+ emit_insn (pat);
+ return target;
+
+ case ARM_BUILTIN_TEXTRCB:
+ case ARM_BUILTIN_TEXTRCH:
+ case ARM_BUILTIN_TEXTRCW:
+ icode = (fcode == ARM_BUILTIN_TEXTRCB ? CODE_FOR_iwmmxt_textrcv8qi3
+ : fcode == ARM_BUILTIN_TEXTRCH ? CODE_FOR_iwmmxt_textrcv4hi3
+ : fcode == ARM_BUILTIN_TEXTRCW ? CODE_FOR_iwmmxt_textrcv2si3
+ : CODE_FOR_iwmmxt_textrcv2si3);
+ arg0 = CALL_EXPR_ARG (exp, 0);
+ op0 = expand_normal (arg0);
+ mode0 = insn_data[icode].operand[0].mode;
+ if (!(*insn_data[icode].operand[0].predicate) (op0, mode0))
+ {
+ /* Need a better error message here. */
+ error ("selector should be an immediate");
+ return const0_rtx;
+ }
+ pat = GEN_FCN (icode) (op0);
+ if (!pat)
+ return 0;
+ emit_insn (pat);
+ return 0;
case ARM_BUILTIN_THREAD_POINTER:
return arm_load_tp (target);
+ case ARM_BUILTIN_WSRLHI:
+ case ARM_BUILTIN_WSRLWI:
+ case ARM_BUILTIN_WSRLDI:
+ case ARM_BUILTIN_WSLLHI:
+ case ARM_BUILTIN_WSLLWI:
+ case ARM_BUILTIN_WSLLDI:
+ case ARM_BUILTIN_WSRAHI:
+ case ARM_BUILTIN_WSRAWI:
+ case ARM_BUILTIN_WSRADI:
+ case ARM_BUILTIN_WRORHI:
+ case ARM_BUILTIN_WRORWI:
+ case ARM_BUILTIN_WRORDI:
+ case ARM_BUILTIN_WSRLH:
+ case ARM_BUILTIN_WSRLW:
+ case ARM_BUILTIN_WSRLD:
+ case ARM_BUILTIN_WSLLH:
+ case ARM_BUILTIN_WSLLW:
+ case ARM_BUILTIN_WSLLD:
+ case ARM_BUILTIN_WSRAH:
+ case ARM_BUILTIN_WSRAW:
+ case ARM_BUILTIN_WSRAD:
+ case ARM_BUILTIN_WRORH:
+ case ARM_BUILTIN_WRORW:
+ case ARM_BUILTIN_WRORD:
+ icode = (fcode == ARM_BUILTIN_WSRLHI ? CODE_FOR_lshrv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRLWI ? CODE_FOR_lshrv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRLDI ? CODE_FOR_lshrdi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLHI ? CODE_FOR_ashlv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLWI ? CODE_FOR_ashlv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLDI ? CODE_FOR_ashldi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRAHI ? CODE_FOR_ashrv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRAWI ? CODE_FOR_ashrv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRADI ? CODE_FOR_ashrdi3_iwmmxt
+ : fcode == ARM_BUILTIN_WRORHI ? CODE_FOR_rorv4hi3
+ : fcode == ARM_BUILTIN_WRORWI ? CODE_FOR_rorv2si3
+ : fcode == ARM_BUILTIN_WRORDI ? CODE_FOR_rordi3
+ : fcode == ARM_BUILTIN_WSRLH ? CODE_FOR_lshrv4hi3_di
+ : fcode == ARM_BUILTIN_WSRLW ? CODE_FOR_lshrv2si3_di
+ : fcode == ARM_BUILTIN_WSRLD ? CODE_FOR_lshrdi3_di
+ : fcode == ARM_BUILTIN_WSLLH ? CODE_FOR_ashlv4hi3_di
+ : fcode == ARM_BUILTIN_WSLLW ? CODE_FOR_ashlv2si3_di
+ : fcode == ARM_BUILTIN_WSLLD ? CODE_FOR_ashldi3_di
+ : fcode == ARM_BUILTIN_WSRAH ? CODE_FOR_ashrv4hi3_di
+ : fcode == ARM_BUILTIN_WSRAW ? CODE_FOR_ashrv2si3_di
+ : fcode == ARM_BUILTIN_WSRAD ? CODE_FOR_ashrdi3_di
+ : fcode == ARM_BUILTIN_WRORH ? CODE_FOR_rorv4hi3_di
+ : fcode == ARM_BUILTIN_WRORW ? CODE_FOR_rorv2si3_di
+ : fcode == ARM_BUILTIN_WRORD ? CODE_FOR_rordi3_di
+ : CODE_FOR_nothing);
+ arg1 = CALL_EXPR_ARG (exp, 1);
+ op1 = expand_normal (arg1);
+ if (GET_MODE (op1) == VOIDmode)
+ {
+ imm = INTVAL (op1);
+ if ((fcode == ARM_BUILTIN_WRORHI || fcode == ARM_BUILTIN_WRORWI
+ || fcode == ARM_BUILTIN_WRORH || fcode == ARM_BUILTIN_WRORW)
+ && (imm < 0 || imm > 32))
+ {
+ if (fcode == ARM_BUILTIN_WRORHI)
+ error ("the range of count should be in 0 to 32. please check the intrinsic _mm_rori_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WRORWI)
+ error ("the range of count should be in 0 to 32. please check the intrinsic _mm_rori_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WRORH)
+ error ("the range of count should be in 0 to 32. please check the intrinsic _mm_ror_pi16 in code.");
+ else
+ error ("the range of count should be in 0 to 32. please check the intrinsic _mm_ror_pi32 in code.");
+ }
+ else if ((fcode == ARM_BUILTIN_WRORDI || fcode == ARM_BUILTIN_WRORD)
+ && (imm < 0 || imm > 64))
+ {
+ if (fcode == ARM_BUILTIN_WRORDI)
+ error ("the range of count should be in 0 to 64. please check the intrinsic _mm_rori_si64 in code.");
+ else
+ error ("the range of count should be in 0 to 64. please check the intrinsic _mm_ror_si64 in code.");
+ }
+ else if (imm < 0)
+ {
+ if (fcode == ARM_BUILTIN_WSRLHI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srli_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLWI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srli_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLDI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srli_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLHI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_slli_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLWI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_slli_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLDI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_slli_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSRAHI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srai_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSRAWI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srai_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSRADI)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srai_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLH)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srl_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLW)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srl_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSRLD)
+ error ("the count should be no less than 0. please check the intrinsic _mm_srl_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLH)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sll_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLW)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sll_pi32 in code.");
+ else if (fcode == ARM_BUILTIN_WSLLD)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sll_si64 in code.");
+ else if (fcode == ARM_BUILTIN_WSRAH)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sra_pi16 in code.");
+ else if (fcode == ARM_BUILTIN_WSRAW)
+ error ("the count should be no less than 0. please check the intrinsic _mm_sra_pi32 in code.");
+ else
+ error ("the count should be no less than 0. please check the intrinsic _mm_sra_si64 in code.");
+ }
+ icode = (fcode == ARM_BUILTIN_WSRLHI ? CODE_FOR_lshriv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRLWI ? CODE_FOR_lshriv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRLDI ? CODE_FOR_lshridi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLHI ? CODE_FOR_ashliv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLWI ? CODE_FOR_ashliv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLDI ? CODE_FOR_ashlidi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRAHI ? CODE_FOR_ashriv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRAWI ? CODE_FOR_ashriv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRADI ? CODE_FOR_ashridi3_iwmmxt
+ : fcode == ARM_BUILTIN_WRORHI ? CODE_FOR_roriv4hi3
+ : fcode == ARM_BUILTIN_WRORWI ? CODE_FOR_roriv2si3
+ : fcode == ARM_BUILTIN_WRORDI ? CODE_FOR_roridi3
+ : fcode == ARM_BUILTIN_WSRLH ? CODE_FOR_lshriv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRLW ? CODE_FOR_lshriv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRLD ? CODE_FOR_lshridi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLH ? CODE_FOR_ashliv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLW ? CODE_FOR_ashliv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSLLD ? CODE_FOR_ashlidi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRAH ? CODE_FOR_ashriv4hi3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRAW ? CODE_FOR_ashriv2si3_iwmmxt
+ : fcode == ARM_BUILTIN_WSRAD ? CODE_FOR_ashridi3_iwmmxt
+ : fcode == ARM_BUILTIN_WRORH ? CODE_FOR_roriv4hi3
+ : fcode == ARM_BUILTIN_WRORW ? CODE_FOR_roriv2si3
+ : fcode == ARM_BUILTIN_WRORD ? CODE_FOR_roridi3
+ : CODE_FOR_nothing);
+ }
+ return arm_expand_binop_builtin (icode, exp, target);
default:
break;
}
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
2011-10-20 8:02 ` Xinyu Qi
@ 2011-11-18 23:47 ` Ramana Radhakrishnan
2011-11-24 7:09 ` Xinyu Qi
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: Ramana Radhakrishnan @ 2011-11-18 23:47 UTC (permalink / raw)
To: Xinyu Qi; +Cc: gcc-patches
On 20 October 2011 08:39, Xinyu Qi <xyqi@marvell.com> wrote:
> Ping
>
> http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html
>
> * config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
> (builtin_description bdesc_2arg): Revise built in declaration.
> (builtin_description bdesc_1arg): Likewise.
> (arm_init_iwmmxt_builtins): Revise built in initialization.
> (arm_expand_builtin): Revise built in expansion.
>
This currently doesn't apply - can you take a look ?
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
@ 2011-10-20 8:02 ` Xinyu Qi
2011-11-18 23:47 ` Ramana Radhakrishnan
0 siblings, 1 reply; 9+ messages in thread
From: Xinyu Qi @ 2011-10-20 8:02 UTC (permalink / raw)
To: Ramana Radhakrishnan, gcc-patches
Ping
http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html
* config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
(builtin_description bdesc_2arg): Revise built in declaration.
(builtin_description bdesc_1arg): Likewise.
(arm_init_iwmmxt_builtins): Revise built in initialization.
(arm_expand_builtin): Revise built in expansion.
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
@ 2011-07-29 4:25 Xinyu Qi
0 siblings, 0 replies; 9+ messages in thread
From: Xinyu Qi @ 2011-07-29 4:25 UTC (permalink / raw)
To: gcc-patches
Ping.
http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html
At 2011-07-14 15:38:47,"Xinyu Qi" <xyqi@marvell.com> wrote:
> > Hi,
> >
> > It is the third part of iWMMXt maintenance.
> >
>
> *config/arm/arm.c (enum arm_builtins): Built-in fcode.
> (builtin_description bdesc_2arg): Built in declare.
> (builtin_description bdesc_1arg): Ditto.
> (arm_init_iwmmxt_builtins): Built in initialize.
> (arm_expand_builtin): Built in expand.
>
>
> Thanks,
> Xinyu
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2012-03-13 8:56 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-09-26 5:08 PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand Xinyu Qi
[not found] <Acw7xRAvD+dx7PPOTJq7pOnokjiE5gGK4C2gAurXkPALlovaUATBQ7Sg>
2011-10-20 8:02 ` Xinyu Qi
2011-11-18 23:47 ` Ramana Radhakrishnan
2011-11-24 7:09 ` Xinyu Qi
2011-12-22 6:55 ` Xinyu Qi
2011-12-29 6:39 ` Xinyu Qi
2012-02-03 2:08 ` Xinyu Qi
2012-03-13 8:56 ` Xinyu Qi
-- strict thread matches above, loose matches on Subject: below --
2011-07-29 4:25 Xinyu Qi
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